Abstract: A bidirectional converter circuit includes a voltage source which provides an input voltage, an energy storage set connected to the voltage source and receives the input voltage, a switch set connected to the energy storage set, wherein the switch set includes a first switch and a second switch; an operating switch set connected to the switch set, wherein the operating switch set includes a first operating switch, a second operating switch, a third operating switch and a fourth operating switch. The bidirectional converter further includes a blocking capacitor set and a (input/output) capacitor set. Wherein, the blocking capacitor set is connected to the switch set and the operating switch set. The first operating switch and the second operating switch are driven complementarily with the first switch, and the third operating switch and the fourth operating switch are driven complementarily with the second switch.

Abstract: Systems and methods are provided for a power supply. A first output stage is configured to supply power from a power source at a target voltage to a device in an integrated circuit in response to a power demand of the device. Load detector circuitry is configured to detect a load resulting from operation of the device, and a supplemental output stage is configured to selectively supply supplemental power from the power source to the device, in addition to the power provided by the first output stage, in response to detection of an additional load resulting from operation of the device.

Abstract: A power converter system for managing power between a power supply and a load, the system including: a first buck-boost circuit connected to the power supply; and a capacitor provided between the buck-boost circuit and the load to buffer power supply for the load. The system may include a second buck-boost circuit between the capacitor and the load. In another embodiment, a power converter system includes: a boost circuit connected to the power supply; a buck circuit connected to the load; and a capacitor provided between the boost circuit and the buck circuit to manage the supply of power to the load.

Abstract: A regulating circuit includes a first comparator configured to control a turning on and a turning off of a first transistor based on a first comparison a reference voltage to a feedback voltage. The first transistor is coupled between an output node and a first voltage supply. A second comparator is configured to control a turning on and a turning off of a second transistor based on a second comparison of the reference voltage to the feedback voltage. The second transistor is coupled to the output node. A high-impedance circuit is coupled in series with the second transistor such that the high-impedance block is disposed between the second transistor and a second power supply. The high-impedance circuit is configured to generate a constant current between the output node and the second voltage supply when the second transistor is turned on.

Abstract: A first-path connects an input-terminal and an output-terminal of a high-potential-side switching-element and includes a high-potential-side rectifying-device and a high-potential-side passive-element. A second-path connects the output-terminal of the high-potential-side switching-element and the output-terminal of a low-potential-side switching-element and includes a low-potential-side rectifying-device and a low-potential-side passive-element. A high-potential-side applying-unit applies voltage to a connecting point between the high-potential-side rectifying-device and the high-potential-side passive-element. A high-potential-side determining-unit determines that an overcurrent is flowing between the input-terminal and the output-terminal of the high-potential-side switching-element by using a first-value. A limiting-unit limits a current between the low-potential-side rectifying-device and the output-terminal of the high-potential-side switching-element if the overcurrent is flowing.

Abstract: In one embodiment an Inductive buck-boost-converter has an input (In) to which an input voltage (Vin) is supplied, an output (Out) at which an output voltage (Vout) is provided as a function of the input voltage (Vin), an inductor (L) having a first and a second terminal (Lx1, Lx2), a first switch (A) which switchably connects the inductor's (L) first terminal (Lx1) to the input (In), a second switch (B) which switchably connects the inductor's (L) first terminal (Lx1) to a ground potential terminal (10), a third switch (C) which switchably connects the inductor's (L) second terminal (Lx2) to the ground potential terminal (10), a fourth switch (D) which switchably connects the inductor's (L) second terminal (Lx2) to the output (Out), and a control unit (CTL) coupled to respective control inputs of first, second, third and fourth switches (A, B, C, D). Therein the converter is operated in three phases (1, 2, 3) by the control unit (CTL).

Abstract: A DC/DC converter has an active energy store, such as an inductance, which can be periodically charged and discharged by one or more semiconductor switches, such as transistors. To avoid voltage overshoot, an RCD element is provided for at least one semiconductor switch, wherein a capacitor and a diode of the RCD element are connected in series, and a resistor of the RCD element can be connected either in parallel with the diode or disconnected from the diode by a switch. The diode of the RCD element is arranged so as to be blocking in the conducting direction of the semiconductor switch.

Abstract: A high efficiency switched capacitor voltage regulator circuit and a method of efficiently generating an enhanced voltage from an input voltage supply. An input voltage Vin from a main power source is the base voltage to be pumped to an enhanced voltage. Auxiliary voltage sources V1 and V2 are from sources (or grounds) available in the system. During phase 1 of a clock signal, a pump capacitor is charged to ?V=V2?V1. During phase 2 of the clock signal, the pump capacitor is connected in series between Vin and an output capacitor, resulting in the sum voltage V=Vin+?V being generated across the output capacitor.

Abstract: Method and device for controlling an inductive load by pulse width modulation, on the basis of a periodic set point control signal having a given set point duty cycle. The set point control signal is, in each period of the set point control signal, in a first logic state determined from the high and low logic states for at least a first duration, and is in the other logic state during the rest of the period. Control signals are generated for activating the inductive load, on the basis of the set point control signal. With the aid of a first counter, the first duration (t0) is determined on the basis of the set point control signal. Via a second counter, a second duration (t0?td2) is determined, for which a logic signal corresponding to an effective control signal observed in the load is in the first determined logic state.

Abstract: A controller includes a difference detector that detects a difference between a switching timing of a first channel of a switching power supply including a plurality of channels, and a switching timing of a second channel of the switching power supply, the plurality of channels being coupled in common to an input power supply and performing switching operations in response to clock signals, and a timing adjuster that, based on a detection result of the difference detector, increases a difference between a timing of a clock signal supplied to the first channel and a timing of a clock signal supplied to the second channel when the difference between the switching timing of the first channel and the switching timing of the second channel is smaller than a first value.

Abstract: A low power DC-DC converter includes a converter stage coupled to an input node, and having a low side switch and a rectifier switch. A peak current detector senses a current at the low side switch and a zero current detector senses a current at the rectifier switch. It is configured to set the low side switch to a non-conductive state and the rectifier switch to a conductive state if the peak current detector detects a predetermined peak current. It is configured to set the rectifier switch to a non-conductive state if the zero current detector detects zero current at the rectifier switch. A time interval between subsequent current peaks is triggered by a charge comparator receiving an average current fed to the low side and rectifier switches from the input node and a reference current coupled to the charge comparator by a reference current source.

Abstract: A apparatus provides a voltage clamp step-up boost converter that is capable of reducing voltage stress on a switch and a diode of the boost converter without using a dissipative snubber and that is capable of reducing a switching loss while maintaining a high input-to-output boost ratio.

Abstract: Single phase inductors have non-linear inductance values, and M-phase coupled inductors having non-linear leakage inductance values. Each inductor includes, for example, at least one of the following: a saturable magnetic element, a gap of non-uniform thickness, a core formed of a distributed gap material, or a non-homogeneous core. A DC-to-DC converter includes an inductor having a non-linear inductance value, a switching subsystem, and an output filer. Another DC-to-DC converter includes an output filter, a coupled inductor having non-linear leakage inductance values, and switching subsystems.

Abstract: A maximum power point tracking (MPPT) apparatus and a MPPT method are disclosed. A converter uses an inductor therein to perform power conversion operations according to a gating signal so as to convert an input electrical energy into an output electrical energy to a load. A controller monitors the voltage difference of the inductor and the element temperature, performs a lookup table operation or calculates the element characteristic according to the element temperature, and further uses the element characteristic and the voltage difference of the inductor for calculating a characteristic value and correspondingly adjusts the gating signal according to the characteristic value so as to track the power of the input electrical energy.

Abstract: A driver circuit using a power converter allows free-wheeling detection and/or provision of supply voltage. A circuit controls a switching state of a power switch. A first port of the switch is coupled to an inductor. The circuit is coupled to a control port of the switch wherein the control port of the switch is different from the first port of the switch. The circuit comprises a unit generating a signal for controlling the switching state of the switch wherein the signal is provided to the control port of the switch. Furthermore, the circuit comprises free-wheeling sensing means to detect an oscillation of a voltage at a measurement port of the switch wherein the measurement port of the switch is different from the first port of the switch and wherein the oscillation of the voltage at the measurement port indicates free-wheeling of the inductor.

Abstract: A power supply controller is connected between a power source and a power-supply path, and includes a switch circuit, a power-supply path protection circuit, and a sleep mode setting circuit. The switch circuit is configured to permit and inhibit power supply from the power source to the load. The protection circuit controls switching operation of the switch circuit according to a power-supply command signal commanding start or stop of the power supply to the load, calculates a temperature of the power-supply path regardless of whether power is supplied to the load, do not calculate the temperature of the power-supply path in a sleep mode, and inhibits power supply to the switch circuit according to the calculated temperature reaching an upper limit. The sleep mode setting circuit sets the power supply controller to the sleep mode according to the power-supply path satisfying a temperature condition.

Abstract: A first direct-current power converter circuit increases an electrical potential difference between a positive electrical potential of a load and a positive electrical potential of a power source by a step-up operation, and a second direct-current power converter circuit increases an electrical potential difference between a negative electrical potential of the load and a negative electrical potential of the power source by a step-up operation. A control device controls switching operations of first and second switching devices included in the first direct-current power converter circuit based on a first duty. The control device controls switching operations of third and fourth switching devices included in the second direct-current power converter circuit based on a second duty. The control device controls a load voltage to be an arbitrary voltage, which is equal to or more than a source voltage.

Abstract: An apparatus and a method for enhancing power output, the apparatus comprising: a thyristor having an anode, a cathode and a gate; and a controller connected to the gate, the cathode and the anode wherein, when the anode is provided with a voltage, the controller is configured for activating the thyristor to allow current flow between the anode and the gate in a first instance and is configured for activating the thyristor to allow current flow between the gate and the cathode in a second instance so as to provide the cathode with an enhanced voltage, the enhanced voltage being an enhancement of the voltage at the anode.

Abstract: A phase gating controller includes a thyristor/triac having a control terminal and two power terminals, a sampling device for sampling a voltage present across the power terminals of the thyristor/triac and a control device configured to provide a control voltage at the control terminal in order to trigger the thyristor/triac. The control device is further configured to switch off the control voltage at the triggered thyristor and to detect an unexpected turning-off of the thyristor/triac if the sampled voltage exceeds a predetermined threshold value.

Abstract: A method of reducing voltage variations in a power supply may include generating an intermediate voltage and setting a first-transistor gate voltage at a first-transistor gate of a first transistor of the power supply based on the intermediate voltage. The method may also include setting an output voltage at an output node of the power supply based on a second-transistor gate voltage at a second-transistor gate of a second transistor. Additionally, the method may include setting the second-transistor gate voltage based on the first-transistor gate voltage such that the output voltage is based on the intermediate voltage, a first-transistor threshold voltage of the first transistor, and a second-transistor threshold voltage of the second transistor and such that variations in the first-transistor threshold voltage and the second-transistor threshold voltage at least partially cancel each other out.

Abstract: In a power conversion apparatus, a main switching element in one main circuit is controlled to repeat an on-off state, and a diode in the other main circuit is used as a freewheeling diode. Multiple snubber circuits each having a resistor, a capacitor, and a second switching element which are serially coupled are coupled in parallel to the main circuit. The second switching elements are turned-on sequentially before the turn-on or turn-off of the main switching element that repeats the on-off state.

Abstract: A load driving device has a switch N1, a driver that performs on/off control of the switch in accordance with SWON, a comparator that compares Vdet1 with Vth, and based on a result of the comparison, generates IPEAKDET, an ADC that converts Vdet1 into ADCOUT, a DAC that converts IPEAKSET into Vth, and a logic portion that, upon receiving inputs of IPEAKDET and ADCOUT, outputs SWON and IPEAKSET. The logic portion includes a computation circuit that calculates Y1 by using a computation equation expressed by Y1=AVE×?+?×Ton/2 (where Y1: a signal value of IPEAKSET; AVE: an average current set value of an output current; ?: an adjustment coefficient for AVE; Ton: an on period; ?: a change rate of AVCOUT). The computation circuit determines ? in accordance with computation mode setting signals ISO and PFC.

Abstract: Provided is a DC-DC converter with improved power conversion efficiency. A transistor which is incorporated in the DC-DC converter and functions as a switching element for controlling output power includes, in its channel formation region, a semiconductor material having a wide band gap and significantly small off current compared with silicon. The transistor further comprises a back gate electrode, in addition to a general gate electrode, and a back gate control circuit for controlling a potential applied to the back gate electrode in accordance with the output power from the DC-DC converter. The control of the potential applied to the back gate electrode by the back gate control circuit enables the threshold voltage to decrease the on-state resistance when the output power is high and to increase the off-state current when the output power is low.

Abstract: A power supply circuit comprises an under voltage protection unit and a voltage conversion unit electrically connected to the under voltage protection unit. The under voltage protection unit and the voltage conversion unit are electrically connected to a power supply. When a voltage of the power supply is in a normal range, the under voltage protection unit outputs a first control signal to the voltage conversion unit. The voltage conversion unit converts the voltage of the power supply into an operation voltage, and outputs the operation voltage. When the voltage of the power supply is less than a threshold voltage, the under voltage protection unit outputs a second control signal to the voltage conversion unit, and the voltage conversion unit does not operate.

Abstract: The present invention provides a pulse modulating power source, which comprises: a plurality of discharging modules connected in series during discharging; a plurality of triggers corresponding to said plurality of discharging modules, wherein each trigger provides a trigger signal to the corresponding discharging module to turn it on; a control logic module for controlling the trigger signals so as to turn on said plurality of discharging modules successively with a time delay; an output terminal for outputting a voltage.

Abstract: A switch-mode voltage converter has a switching transistor coupled between an input voltage (Vin) and the ground and a controller coupled directly between the input voltage (Vin) and the ground. The controller periodically turns on the switching transistor for a generally constant period of time. The controller is further coupled to a DC bias voltage (Vbias) and generates a control current based on the input voltage (Vin) and the DC bias voltage (Vbias) for generating a switching signal to the switching transistor.

Abstract: A dimmable ballast circuit for a compact fluorescent lamp controls the intensity of a lamp tube in response to a phase-control voltage received from a dimmer switch. The ballast circuit comprises a phase-control-to-DC converter circuit that receives the phase-control voltage, which is characterized by a duty cycle defining a target intensity of the lamp tube, and generates a DC voltage representative of the duty cycle of the phase-control voltage. Changes in the duty cycle of the phase-control voltage that are below a threshold amount are filtered out by the converter circuit, while intentional changes in the duty cycle of the phase-control voltage are reflected in changes in the target intensity level and thereby the intensity level of the lamp tube.

Abstract: One embodiment of the present invention sets for a method for monitoring the aging of a circuit. The method includes operating an aging unit included in the circuit beginning at a first time. The method also includes in response to a trigger event, operating a non-aging unit also included in the circuit beginning at a second time wherein the second time is subsequent to the first time. The method further includes detecting a frequency difference between a first frequency generated by the aging unit and a second frequency generated by the non-aging unit. The method also includes generating a modified power supply voltage based on the frequency difference. The method also includes applying the modified power supply voltage to the non-aging unit.

Abstract: The power generating circuit includes: a first transistor having a control terminal to which a second control signal is applied and one end to which a first control signal is applied; and a second transistor having a control terminal to which the first control signal is applied and one end to which the second control signal is applied, wherein the other ends of the first transistor and the second transistor are connected to an output terminal.

Abstract: A voltage converting device includes first and second stage circuits for converting a differential voltage to an output signal that has a magnitude smaller than the differential voltage. The second stage circuit includes input transistors for receiving voltages from the first stage circuit, output transistors for outputting the output signal, and a clamp module to clamp voltages at the input transistors of the second stage circuit.

Abstract: A booster circuit configured to boost a supplied voltage and provide a booster circuit output includes: an oscillator circuit configured to generate a clock signal; a charge pump circuit configured to provide a charge pump output by boosting the supplied voltage with the use of the clock signal; a detection circuit configured to detect a voltage of the booster circuit output and output a detection signal; and an output circuit configured to connect and disconnect the charge pump output to and from the booster circuit output. The oscillator circuit controls activation and deactivation of an output of the oscillator circuit in accordance with the detection signal, and the output circuit controls disconnection of the output circuit in accordance with the detection signal.

Abstract: Systems and methods are disclosed to control a buck converter by performing adaptive digital pulse width modulation (ADPWM) with a plurality of upper power transistors each uniquely controlled to enable greater than 100% duty cycle for the buck converter and a lower power transistor coupled to the plurality of upper power transistors; and driving an inductor having one end coupled to the lower power transistor and the upper power transistors.

Abstract: A charge module is configured to pre-charge a control node to a pre-charged voltage, such that in a case a control module outputs a control voltage, a drive module is activated according to a gate voltage summed by the control voltage and the pre-charged voltage.

Abstract: A sequence circuit includes a power output terminal, first to third power input terminals, first to sixth resistors, first to tenth filed effect transistors (FETs), first to third inductors, a first capacitor, a second capacitor, and first to third drivers. The sequence circuit ensures that different voltages work in a correct sequence.

Abstract: A semiconductor switch circuit includes a switch between an input node and an output node that connects nodes to each other according to a control signal and a level shifter outputting the control signal at a boosted level that is greater than a power supply voltage level. The semiconductor switch circuit also includes a booster circuit to output a boosted voltage at the boosted level higher than a power supply voltage level. A control circuit is configured to control the level shifter output of the control signal to the switch. A capacitance switching circuit is included to change the capacitance of a connection between the booster circuit and the level shifter. The capacitance switching circuit can vary capacitance according to the voltage level of the booster circuit output.

Abstract: According to one embodiment, a power supply circuit includes a first circuit connected to a first line, to which a power supply voltage is applied, and a second line, and a power supply clamp circuit connected to the first and second lines. The power supply clamp circuit includes a current path circuit which connects the first and the second lines to each other, and a control circuit which outputs a control signal to the current path circuit. The current path circuit includes a transistor and a diode group. The power supply clamp circuit is driven during a period in which a first voltage is applied to the first line and controls a potential of the first line so as to become a potential lower than the first voltage.

Abstract: A circuit for DC-DC conversion with current limitation comprises a DC-DC converter (100) with a coil (110) and a controllable switch (120) that can be switched into a low-impedance and a high-impedance state, and a current limiter (300a, 300b) for generating a control signal (IOC) for controlling the state of the controllable switch in the DC-DC converter (100). The current limiter (300a, 300b) is constructed such that the current (IL) through the coil at which the current limitation takes place is nearly independent of the ratio of the on-times and off-times of the controllable switch in the DC-DC converter (100).

Abstract: A power converter includes a single magnetic element in communication with a plurality of output channels. Each output channel includes one or more light-emitting diodes (LEDs) that may output a desired light output. Desired amounts of current may be discharged from the single magnetic element through the LEDs to generate the desired light output. The current may be drawn through the LEDs by switching “on” and “off” switches connected to the LEDs. A controller in communication with the power converter may generate switching signals to turn “on” and “off” the switches to draw the desired amounts of current. The controller may measure the current and determine whether to adjust the switching signals if the measured current draw is not the desired current draw in order to generate the desired light output from the LEDs.

Abstract: A power converter circuit includes an input and an output. A supply circuit is configured to receive an input signal from the input and to generate a number of supply signals from the input signal. A number of converter units are provided. Each of the plurality of converter units is configured to receive one of the plurality of supply signals and to output an output signal to the output.

Abstract: An apparatus for converting a first voltage into a second voltage includes a reconfigurable switched capacitor power converter having a selectable conversion gain. converter includes a cascade multiplier switched capacitor network having capacitors, each of which electrically connects to a stack node and to a phase node. A controller causes the network to transition between first and second operation modes. In the first mode, at least one capacitor is isolated from a charge transfer path of the reconfigurable switched capacitor power converter. Consequently, in the first mode of operation, the power converter operates with a first gain. In the second mode, the power converter operates with a second conversion gain. Meanwhile, a third voltage across the at least one capacitor is free to assume any value.

Abstract: The subject matter of this document can be embodied in a method that includes a voltage regulator having an input terminal and an output terminal. The voltage regulator includes a high-side transistor between the input terminal and an intermediate terminal, and a low-side transistor between the intermediate terminal and ground. The voltage regulator includes a low-side driver circuit including a capacitor and an inverter. The output of the inverter is connected to the gate of the low-side transistor. The voltage regulator also includes a controller that drives the high-side and low-side transistors to alternately couple the intermediate terminal to the input terminal and ground. The controller is configured to drive the low-side transistor by controlling the inverter. The voltage regulator further includes a switch coupled to the low-side driver circuit. The switch is configured to block charge leakage out of the capacitor during an off state of the low-side transistor.

Abstract: Pulse width modulation (PWM) based on selectable phases of a system clock may be implemented with respect to leading-edge-modulation (LEM), trailing-edge-modulation (TEM), and/or dual-edge-modulation. An initial pulse may be generated based on a duty command, synchronous with the system clock, and may be registered with a D flip-flop under control of a selected phase of the system clock. Alternatively, a target count may be derived from the duty command, and an edge of the PWM pulse may be initiated when a count of the selected phase equals the target count. The pulse edge may be registered by a D flip-flop to a SR flip-flop under control of the selected phase. The phases of the system clock may be shared amongst multiple systems to generate multiple PWM signals. A system may include a DLL and digital logic, which may consist essentially of combinational logic and registers.

Abstract: A power converting circuit includes an upper gate switch, a transistor, a current source circuit, a comparator circuit, a delay circuit, and a pulse width modulation signal generating circuit. The transistor and the current source circuit provide a reference signal. The comparator circuit generates a comparing signal according to the reference signal and an output signal provided by the upper gate switch. The delay circuit generates a delay signal according to the comparing signal and a clock signal. The pulse width modulation signal generating circuit generates a control signal for the upper gate switch according to the delay signal and the clock signal for configuring the conduction status of the upper gate switch. The power converting circuit adjusts the conduction time of the upper gate switch according to the reference signal and the output signal.

Abstract: A control circuit for a step-up converter includes a soft start module configured to control states of N transistor pairs of the step-up converter, where N is an integer greater than two. A driver module is in communication with the soft start module and configured to generate a first signal when N transistor pairs of the step-up converter are ready to switch. A first charging circuit is configured to charge (N?1) capacitors of the step-up converter to an input voltage of the step-up converter in response to the first signal and to generate a second signal when charging is complete. A second charging circuit is configured to sequentially charge the (N?1) capacitors of the step-up converter to (N?1) predetermined voltage values in response to the first signal and the second signal and before operation of the step-up converter begins.

Abstract: A multi-level, step-up converter circuit includes an inductor including one terminal in communication with an input voltage supply. N transistor pairs are connected in series, where N is an integer greater than one. First and second transistors of a first pair of the N transistor pairs are connected together at a node. The node is in communication with another terminal of the inductor. Third and fourth transistors of a second pair of the N transistor pairs are connected to the first and second transistors, respectively. (N?1) capacitors have terminals connected between the N transistor pairs, respectively. An output capacitor has a terminal in communication with at least one transistor of the N transistor pair.

Abstract: A fixed voltage generating circuit includes a current mirror, a differential pair, and a resistor coupled to the current mirror. A node of the resistor is coupled to a voltage source. The differential pair includes two resistors coupled to the voltage source to enable the differential pair outputting a stable output voltage.

Abstract: Embodiments of systems, methods and apparatuses of a voltage regulator are disclosed. One apparatus of the voltage regulator includes a series switch element, wherein the series switch element comprises a plurality of partitioned series switch elements, a shunt switch element, and a switching controller. The switching controller is operative to control the series switch element and the shunt switch element in an idle state, wherein none of the plurality of partitioned series switch elements are active, control the series switch element and the shunt switch element in a burst state, wherein N of the plurality of partitioned series switch elements are active, and control the series switch element and the shunt switch element in a transition state, wherein M of the plurality of partitioned series switch elements are active, and wherein M is less than N.

Abstract: Efficiency of a switch mode power supply (SMPS) is optimized by operating the SMPS in an asynchronous mode when current being supplied therefrom is less than a certain current value and operating the SMPS in a synchronous mode when the current being supplied therefrom is equal to or greater than the certain current value. When the SMPS is operating in the synchronous mode high-side and low-side power transistors alternately turn on and off. When the SMPS is operating in the asynchronous mode only the high-side power transistor turns on and off and the low-side power transistor remains off. When charging a battery with the SMPS discharge of the battery is eliminated when operating in the asynchronous mode at a low current output.

Abstract: Power converters that produce less noise are disclosed. For example, in an embodiment, power converter can include a first inductor magnetically coupled to a second inductor, wherein a first end of the second inductor is electrically open and a second end of the second inductor is electrically coupled to ground via a second capacitor, a transistor electrically connected to the first inductor, and control circuitry to control switching of the transistor, wherein when the transistor is repeatedly switched on and off by the control circuitry, a current loop is formed through the transistor, the second capacitor, the first inductor and the second inductor, the current loop causing a reduced amount of switching noise to be generated by the power converter.

Abstract: Embodiments of signal bias generators and regulators are described generally herein. Other embodiments may be described and claimed.