Of An Applied Test Signal Patents (Class 324/523)
  • Patent number: 8513952
    Abstract: Aspects of the present disclosure provide for a cable tester that tests a cable to determine the cable length. The cable tester can include a clock generator that generates a clock that has clock period that is a multiple of the data symbol period and a signal generator that injects the training signal, which can be synchronous with the clock, into the cable. The cable tester can also include a receiver that samples the returned signal from the cable and adaptively filters the returned signal based on the training signal and a controller that determines the cable length from the adaptive filter tap coefficients.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: August 20, 2013
    Assignee: Marvell International Ltd.
    Inventors: Ozdal Barkan, William Lo, Tak-Lap Tsui
  • Patent number: 8471582
    Abstract: A first semiconductor tier has a first tier-to-tier connector for detecting a tier-to-tier coupling in a stacked integrated circuit (IC) device. A second semiconductor tier has a second tier-to-tier connector configured to electrically couple to the first tier-to-tier connector. A tier-to-tier detection circuit electrically couples to the second tier-to-tier connector. The tier-to-tier detection circuit generates an output signal indicative of an electrical coupling between the first semiconductor tier and the second semiconductor tier.
    Type: Grant
    Filed: January 27, 2009
    Date of Patent: June 25, 2013
    Assignee: QUALCOMM Incorporated
    Inventor: Thomas R. Toms
  • Publication number: 20130141111
    Abstract: Methods to determine the location of an arc fault include a first method utilizing the inherent resistance per unit length of the wire. A second and a third method utilize an inherent inductance per unit length of the wire. The second method derives the inherent inductance from the output voltage and a rate of current rise. The third method derives the inherent inductance from a resonant frequency of an oscillating current. The information is useful to locate a fault emanating from a wire member of a wiring harness used to distribute power about an aircraft.
    Type: Application
    Filed: January 29, 2013
    Publication date: June 6, 2013
    Applicant: Astronics Advanced Electronic Systems Corp.
    Inventor: Astronics Advanced Electronic Systems Corp.
  • Publication number: 20130141112
    Abstract: Methods to determine the location of an arc fault include a first method utilizing the inherent resistance per unit length of the wire. A second and a third method utilize an inherent inductance per unit length of the wire. The second method derives the inherent inductance from the output voltage and a rate of current rise. The third method derives the inherent inductance from a resonant frequency of an oscillating current. The information is useful to locate a fault emanating from a wire member of a wiring harness used to distribute power about an aircraft.
    Type: Application
    Filed: January 29, 2013
    Publication date: June 6, 2013
    Applicant: Astronics Advanced Electronic Systems Corp.
    Inventor: Astronics Advanced Electronic Systems Corp.
  • Patent number: 8446163
    Abstract: A test circuit includes a signal level modifying circuit. The signal level modifying circuit modifies at least one of signal levels of an inverting input signal and a noninverting input signal supplied to a differential input circuit in response to a test signal outputted from a signal output circuit to make a difference between signal levels of the inverting input signal and the noninverting input signal smaller than that in a normal operation. Here, the test signal indicates a test mode in which input/output characteristics of the differential input circuit is tested.
    Type: Grant
    Filed: February 3, 2010
    Date of Patent: May 21, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Hiroyuki Kobatake
  • Patent number: 8400321
    Abstract: An electronic trip device is described that includes a test signal generator coupled to at least one of a line conductor and a neutral conductor and configured to create a test signal. The electronic trip device also includes a leakage current detection circuit configured to compare a current in the line conductor and a current in the neutral conductor, the leakage current detection circuit configured to output an error signal if the test signal is not detected.
    Type: Grant
    Filed: November 15, 2010
    Date of Patent: March 19, 2013
    Assignee: General Electric Company
    Inventor: Craig B. Williams
  • Patent number: 8379358
    Abstract: A motor control circuit 1 for controlling driving of a plurality of motors is provided with a plurality of motor driver circuits 7 and 8 for controlling driving of the plurality of motors 3 and 4, a plurality of excess current detection circuits 39 and 40 each for detecting an excess current flowing through corresponding one of the plurality of motors 3 and 4 to determine which motor driver circuit among the plurality of motor driver circuits 7 and 7 caused the excess current. The motor control circuit further includes a nonvolatile memory 46 configured to receive detection results from the plurality of excess current detection circuits 39 and 40 and store information on which motor driver circuit among the plurality of motor driver circuits 7 and 8 caused the excess current.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: February 19, 2013
    Assignee: Semiconductor Components Industries, LLC.
    Inventors: Ryoichi Takahashi, Hiroshi Inoue, Masatoshi Komada
  • Publication number: 20130027050
    Abstract: A system for inspection of electrical circuits including a calibration subsystem operative to apply a time varying voltage to an electrical circuit being inspected during calibration and to sense differences in an electrical state at various different locations in the electrical circuit being inspected, thereby providing an indication of location of defects therein.
    Type: Application
    Filed: July 26, 2011
    Publication date: January 31, 2013
    Applicant: PHOTON DYNAMICS, INC
    Inventors: Sam-Soo JUNG, Raul MARTIN
  • Patent number: 8350573
    Abstract: According to the features discussed herein, through a single generalized arc-fault detection algorithm, various types of series and/or parallel arc faults can be detected without any nuisance trip for either AC or DC Electric Power Systems. Running Discrete Fourier Series (RDFS) formulation for nuisance-free operation and cost-effective implementation is developed. Unlike other methods which require numerous source and load-side current and voltage measurements, only source side current is required. An arc detector may include a first detector to monitor variations of a magnitude of a fundamental component of a current, and a second detector to monitor an overload condition based in an i2t calculation.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: January 8, 2013
    Assignee: Honeywell International Inc.
    Inventors: Hassan Ali Kojori, Yang Ye
  • Publication number: 20130006560
    Abstract: The present document discloses several techniques of evaluating parameters relating to noise and excess current on a power line. The techniques are particularly well-suited for characterizing partial discharge, and for identifying a location of a source of the noise or excess current.
    Type: Application
    Filed: March 4, 2011
    Publication date: January 3, 2013
    Applicant: AMBIENT CORPORATION
    Inventor: Yehuda Cern
  • Patent number: 8326551
    Abstract: A method and system for incorporating electronic signature analysis in a low voltage power supply to centrally monitor current consumption is disclosed. The electrical loads powered by the low voltage power supply can be tested individually via an automatic test routine by measuring and scaling of current through a differential amplifier. The current consumption of each electrical load can be measured by analyzing a “delta” in the current draw of each electrical load's ON and OFF condition. This value can be compared against a stored table of high and low limits for each electrical load. If a load's current is outside the limits, it will be logged for repairs. A current sensing device can be inserted in series with the output(s) of the low voltage power supply, while in test mode, to allow the automatic test routine to run, and then be shorted out for normal operation.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: December 4, 2012
    Assignee: Xerox Corporation
    Inventor: Randall Brian Wirt
  • Publication number: 20120256637
    Abstract: The present invention relates to a fault detection system for detection of line faults on an electrode line in an HVDC system wherein the electrode line comprises a first and second branch connected in parallel. The fault detection system comprises a first and second pulse generation circuit arranged to generate electrical pulses onto the first and second branches, respectively, as well as first and second current measurement devices arranged to generate signals indicative of electrical signals occurring in first and second injection lines, respectively. The possibility of independent generation of electrical pulses onto the first and second branches, respectively, as well as the independent registration of first and second signal patterns representing electrical signals on the first and second injection lines, respectively, increases the information content in the collected data, thereby facilitating for a more reliable analysis of whether or not a fault is present on the electrode line.
    Type: Application
    Filed: December 10, 2009
    Publication date: October 11, 2012
    Applicant: ABB TECHNOLOGY AG
    Inventor: Lars-Erik Juhlin
  • Patent number: 8275569
    Abstract: Provided is a test apparatus that tests a device under test, comprising: a plurality of modules that each include an output circuit that outputs a prescribed output signal to the device under test and a measurement circuit that measures a prescribed characteristic of the device under test; and a control section that, for each module, causes the measurement circuit to measure output of the output circuit and diagnoses the module based on a measurement result of the measurement circuit. Each measurement circuit measures the output of the corresponding output circuit in parallel, and the control section is provided in common to the plurality of modules and sequentially reads the measurement result of the measurement circuit of each module.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: September 25, 2012
    Assignee: Advantest Corporation
    Inventor: Satoshi Horiguchi
  • Patent number: 8269504
    Abstract: Described is a system for locating a partial break in a wire loop antenna. More specifically, the system generates two test signals, each test signal having a signal pattern distinguishable from the other. The system transmits the test signals by way of the antenna such that each test signal radiates from the antenna. The system receives the radiating test signals and generates a signal indicator for each test signal, each signal indicator reflecting properties of its respective test signal. Each signal indicator is analyzed with respect to the other to determine the location of the partial break. Because the test signals have distinguishable signal patterns, the analysis of the signal indicators is simplified and, in certain circumstances, made possible.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: September 18, 2012
    Assignee: Radio Systems Corporation
    Inventor: Duane A. Gerig
  • Patent number: 8219078
    Abstract: Embodiments of the present invention relate to methods and systems of transmitting data signals from at least one transmitting terminal with a spatial diversity capability to at least two receiving user terminals, each provided with spatial diversity receiving device. The methods and systems are useful, for example, in communication between terminals, e.g., wireless communication. In certain embodiments, transmission can be between a base station and two or more user terminals, wherein the base station and user terminals are each equipped with more than one antenna.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: July 10, 2012
    Assignee: IMEC
    Inventors: Andre Bourdoux, Nadia Khaled
  • Publication number: 20120112759
    Abstract: A system, apparatus and method are provided for testing a secondary servo control circuit in a redundant control configuration. A first circuit is configured to receive a control signal and to control an attribute of an actuator based on the control signal using a first control input of the actuator. A second circuit is configured to test operation of an actuator circuit using a test signal. The actuator circuit includes at least part of the second circuit and a second control input of the actuator. The test signal is selected to avoid causing independent motion of the actuator. The actuator could be a dual coil servo valve, and the test signal could be a current (such as a DC current, an AC current, or a pulsed current) having a magnitude less than a bias current of the actuator.
    Type: Application
    Filed: November 9, 2010
    Publication date: May 10, 2012
    Applicant: Honeywell International Inc.
    Inventors: Dinesh Kumar KN, Nagaraja Sundaresh, Karthik Giritharan, Srinivasan Rajagopal, Amol Kinage, Rakesh Damodaran Nair, Sai Krishnan Jagannathan, Sunil M. Ingawale, Sachin Kumar
  • Patent number: 8143880
    Abstract: An electrical current measurement system. A sense impedance and a composite amplifier are in electrical communication and together define a trans-impedance circuit that presents a frequency-compensated impedance lower than the sense impedance to an input electrical current to be measured. A sense amplifier in electrical communication with the sense impedance provides an output indicative of a magnitude of the input electrical current. A current bypass circuit may parallel the trans-impedance circuit and bypass the input electrical current around the trans-impedance circuit when the current reaches a predefined magnitude. The system may be combined with another current sensor to form a dual-range current measurement instrument.
    Type: Grant
    Filed: July 31, 2009
    Date of Patent: March 27, 2012
    Assignee: Agilent Technologies, Inc.
    Inventors: Marko Vulovic, Peyman Safa, Benjamin D. Hoover, Daniel R. Schwartz
  • Patent number: 8143899
    Abstract: A method of detecting partial discharge associated with at least a portion of an electrical system, wherein the electrical system includes at least one electrical machine electrically coupled within the electrical system, includes generating an electromagnetic field within the electrical machine. The method also includes collecting partial discharge data from at least a portion of the electrical system. The method further includes determining a first partial discharge inception voltage (PDIV) value of at least a portion of partial discharge activity within the electrical system. The method also includes generating at least one trending comparison of the first PDIV value and at least one second PDIV value of at least a portion of partial discharge activity within the electrical system. The method further includes outputting the results.
    Type: Grant
    Filed: April 1, 2008
    Date of Patent: March 27, 2012
    Assignee: General Electric Company
    Inventors: Abdelkrim Younsi, Ronald Irving Longwell, Sameh Ramadan Salem, Yingneng Zhou
  • Patent number: 8140916
    Abstract: According to one embodiment, a malfunction predicting unit includes a level reduction unit, a first buffer gate unit, a second buffer gate unit, a comparator unit and a processing unit. The level reduction unit reduces an input digital signal to generate a level-reduced signal. The first buffer gate unit generates a first output signal. The first output signal has first or second level if the digital signal is or is not higher than a preset threshold level, respectively. The second buffer gate unit generates a second output signal. The second output signal has the first or second level if the level-reduced signal is or is not higher than the preset threshold level, respectively. The comparator unit compares the first and second output signals to generate a comparison result. The processing unit determines whether a malfunction will soon occur, based on the comparison result.
    Type: Grant
    Filed: August 26, 2010
    Date of Patent: March 20, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taro Shibagaki, Satoru Nunokawa, Masaki Kato
  • Patent number: 8126452
    Abstract: Techniques for self-calibration of transceivers are described herein.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: February 28, 2012
    Assignee: Intel Mobile Communications GmbH
    Inventors: Christian Ries, Walter Kodim
  • Patent number: 8114265
    Abstract: There is described a method and a system for evaluating damage of a plurality of cells in an electrolyser. The method comprises acquiring a voltage for each one of the cells; comparing the voltage to at least two threshold voltage levels; classifying the cells as one of: severely damaged cells, non-severely damaged cells and undamaged cells, based on the comparison of the voltage with the at least two threshold voltage levels; and deactivating the cells classified as severely damaged cells from the electrolyser.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: February 14, 2012
    Assignee: Recherche 2000 Inc.
    Inventors: Said Berriah, Michel Veillette, Gilles J. Tremblay
  • Patent number: 8061733
    Abstract: A safety system for vehicle occupants includes a control unit and sensors situated remotely from the control unit and connected via conductors to the control unit. The safety system encompasses means for testing the sensors and the conductors to the sensors.
    Type: Grant
    Filed: January 25, 2006
    Date of Patent: November 22, 2011
    Assignee: Robert Bosch GmbH
    Inventors: Gernod Heilmann, Huu-Dat Nguyen
  • Patent number: 8049524
    Abstract: A method for detecting component defects of an analog signal processing circuit, especially for a measurement transmitter. A test signal TS is generated at a first test point TP1 and an associated response signal RS tapped at a second test point TP2 and evaluated in a digital unit. In the evaluation, individual amplitude values of the response signal RS are compared with predetermined, desired values. In the case of significant deviations, a defect report is generated.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: November 1, 2011
    Assignee: Endress + Hauser Conducta Gesellschaft für Mess-und Regeltechnik mbH + Co. KG
    Inventors: Martin Gehrke, Friedrich Füβ
  • Patent number: 8030943
    Abstract: The solder-joint integrity of digital electronic packages, such as FPGAs or microcontrollers that have internally connected input/output buffers, is evaluated by applying a time-varying voltage through one or more solder-joint networks to charge a charge-storage component. Each network includes an I/O buffer on the die in the package and a solder-joint connection, typically one or more such connections inside the package and between the package and a board. The time constant for charging the component is proportional to the resistance of the solder-joint network, hence the voltage across the charge-storage component is a measurement of the integrity of the solder-joint network.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: October 4, 2011
    Assignee: Ridgetop Group, Inc.
    Inventors: Philipp S. Spuhler, Bert M Vermeire, James P Hofmeister
  • Patent number: 8022711
    Abstract: An electrical fault locating system for distributing power from an input to a plurality of output channels provides fault detection and locating for each of the plurality of output channels. Each of the plurality of output channels is monitored by a fault detection circuit to detect the presence of an electrical fault. In response to a detected fault condition, the fault detection circuit isolates the output channel from the input and generates an output identifying the output channel on which the fault was detected. A fault locating device injects a high-frequency (HF) signal onto the input of the electrical system, the HF signal is distributed to each of the plurality of output channels, and the monitored reflection of the HF signal is monitored by the fault locating device to calculate a distance to the detected fault.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: September 20, 2011
    Assignee: Hamilton Sundstrand Corporation
    Inventors: Wayne H. Oldenburg, Donald G. Kilroy
  • Patent number: 8013613
    Abstract: An electrical safety monitor includes line inputs for an L1, an L2, an L3, and a GND three-phase connections, a line monitoring circuit having a plurality of light indicators and configured to produce light if voltage exists between any two of the line inputs to thereby indicate presence of voltage to a user, and a current generating circuit electrically connected to the line monitoring circuit and adapted to generate a test current to the line inputs to transition the device from dead to live thereby allowing the user to discern between a failure state of the line monitoring circuit and an off state of the line monitoring circuit. The current inducing circuit can include a magnet which induces the test current, stored energy, a photocell, an electroactive material or other means for generating the test current.
    Type: Grant
    Filed: December 7, 2006
    Date of Patent: September 6, 2011
    Assignee: Grace Engineered Products, Inc.
    Inventor: Philip Brown Allen, Jr.
  • Patent number: 8013617
    Abstract: A test method for a spark plug ceramic insulator includes placing a first electrode in an inner hole of the ceramic insulator and placing a second electrode on an outer peripheral side of the ceramic insulator, developing a defect in the ceramic insulator by the application of a first voltage onto the ceramic insulator between the first and second electrodes and detecting the defect in the ceramic insulator by the application of a second voltage, which is lower than a flashover voltage that causes a flashover of the ceramic insulator, onto the ceramic insulator between the first and second electrodes.
    Type: Grant
    Filed: March 10, 2008
    Date of Patent: September 6, 2011
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Toshitaka Honda, Hiroyuki Tanabe
  • Patent number: 8010239
    Abstract: The present invention relates generally to a partial discharge counter for the diagnosis of a GIS. The partial discharge counter includes a partial discharge detection sensor for detecting a partial discharge. A first surge inflow prevention circuit separates a surge signal from an output terminal of the partial discharge detection sensor. A channel 1 frequency conversion module forms a low-frequency signal. A noise detection sensor detects noise. A second surge inflow prevention circuit separates a surge signal from an output terminal of the noise detection sensor. A channel 2 frequency conversion module forms a low-frequency signal. An ADC circuit generates partial discharge data and noise data. A synchronization device enables the partial discharge data and the noise data to be output in synchronization with frequency of the phase voltage. A digital signal processing unit counts a number of times the partial discharge occurs. Counting units display a count value.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: August 30, 2011
    Assignee: Hanbit EDS Co., Ltd.
    Inventor: Jae Kee Jeong
  • Patent number: 8000519
    Abstract: A method of evaluating an inline inspection recipe compares the capture rate of metal pattern defects in bounding boxes arising from failed electrical test vectors to the capture rate after the bounding box is shifted. A difference between the first and second capture rates indicates whether the inline inspection recipe is valid for capturing killer defects, or if the inline inspection recipe needs to be adjusted. In a particular example, the electrical test vectors are directed at a selected patterned metal layer of an FPGA (M6), and the metal pattern defect data for the selected patterned metal layer is mapped to the bounding box determined by the electrical test vector.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: August 16, 2011
    Assignee: Xilinx, Inc.
    Inventors: Yongjun Zheng, David Mark, Joe W. Zhao, Felino Encarnacion Pagaduan
  • Publication number: 20110187380
    Abstract: Described is a system for locating a partial break in a wire loop antenna. More specifically, the system generates two test signals, each test signal having a signal pattern distinguishable from the other. The system transmits the test signals by way of the antenna such that each test signal radiates from the antenna. The system receives the radiating test signals and generates a signal indicator for each test signal, each signal indicator reflecting properties of its respective test signal. Each signal indicator is analyzed with respect to the other to determine the location of the partial break. Because the test signals have distinguishable signal patterns, the analysis of the signal indicators is simplified and, in certain circumstances, made possible.
    Type: Application
    Filed: February 1, 2010
    Publication date: August 4, 2011
    Inventor: Duane A. Gerig
  • Patent number: 7982466
    Abstract: A method for inspecting a semiconductor memory having nonvolatile memory cells using ferroelectric capacitors is disclosed which comprises, after shelf-aging the ferroelectric capacitor in a first polarized state, the steps of: (a) writing a second polarized state opposite to the first polarized state; (b) shelf-aging the ferroelectric capacitor in the second polarized state; and (c) reading the second polarized state. The temperature or voltage in the step (a) is lower than the temperature or voltage in the step (c). This method for inspecting a semiconductor memory enables to evaluate the imprint characteristics in a short time.
    Type: Grant
    Filed: November 6, 2006
    Date of Patent: July 19, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Yukinobu Hikosaka, Tomohiro Takamatsu, Yoshinori Obata
  • Patent number: 7982468
    Abstract: A test system including a package with switchable paths. The package may have conductive paths that are selected by switches. The electrically switchable conductive paths may yield increased data without significantly increasing the required testing hardware.
    Type: Grant
    Filed: March 13, 2008
    Date of Patent: July 19, 2011
    Assignee: Oracle America, Inc.
    Inventors: Dan Vacar, David K. McElfresh, Robert H. Melanson, Leoncio D. Lopez
  • Patent number: 7905997
    Abstract: Methods and devices are provided for controlling the impact of undesirable short circuits between non-adjacent but critically matched pairs of electrodes in a co-planar electrochemical sensor. In one embodiment, the size and/or shape of at least one electrode is configured to induce a short circuit between electrode pairs for which connectivity is pre-set to be measured by a meter in order to indicate a short circuit between a different pair for which such connectivity is not pre-set to be measured. In another embodiment, the surface area of one or more electrodes, other than the working electrode, which are designed to be exposed to a sample fluid is significantly limited in relation to the surface area of the working electrode that is exposed to the sample fluid.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: March 15, 2011
    Assignee: Roche Diagnostics Operations, Inc.
    Inventors: Henning Groll, David W. Burke
  • Patent number: 7847560
    Abstract: A defect in a horizontal or vertical seam at the edge of a roof membrane is detected by applying a DC voltage between the roof deck a probe in the form of a flexible wetted sponge and wiping the sponge probe over the seams. The current to the probe is detected and indicated to the operator so that the operator may determine a maximum current at the defect. The receiver provides an audible signal emitter to the operator and includes a calibration circuit arranged to automatically maintain, despite changes in voltage applied between the roof deck and the peripheral conductor, a “0” set calibration point so as to indicate at the calibration point when zero difference in voltage is detected. Conductors can be applied to the membrane to define an area to be tested within the conductors.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: December 7, 2010
    Assignee: Detec Systems LLC.
    Inventor: David E. Vokey
  • Patent number: 7839133
    Abstract: An electrical continuity test system with a tester and a remote probe. The tester includes circuitry for creating a pulsed current, an output for connection to a local end of a first test conductive element, to inject the pulses into the first test conductive element, an input for connection to a local end of a second test conductive element, and a visual and/or aural indication when the injected pulses are present on the second test conductive element. The remote probe includes an input for connection to a remote end of a first unidentified conductive element, an output for connection to a remote end of a second unidentified conductive element, a first visual and/or aural indication when the first unidentified conductive element is the first test conductive element, and a different visual and/or aural indication when the first unidentified conductive element is the second test conductive element.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: November 23, 2010
    Assignee: Extech Instruments Corporation
    Inventor: Joseph Blanchard
  • Patent number: 7773353
    Abstract: An ECU determines based on a voltage from an insulation resistance decrease detector whether the insulation resistance of a power supply device decreases or not. When a load external to the vehicle is not connected to the power supply device, the ECU sets a determination threshold value for determining that the insulation resistance decreases to a normal first value. On the other hand, when the load external to the vehicle is electrically connected to the power supply device, the ECU sets the determination threshold value to a second value which is lower than the first value, in consideration of an increase in the capacitive component due to a capacitor of a Y-capacitor.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: August 10, 2010
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventor: Kenji Uchida
  • Publication number: 20100148791
    Abstract: An electrical fault locating system for distributing power from an input to a plurality of output channels provides fault detection and locating for each of the plurality of output channels. Each of the plurality of output channels is monitored by a fault detection circuit to detect the presence of an electrical fault. In response to a detected fault condition, the fault detection circuit isolates the output channel from the input and generates an output identifying the output channel on which the fault was detected. A fault locating device injects a high-frequency (HF) signal onto the input of the electrical system, the HF signal is distributed to each of the plurality of output channels, and the monitored reflection of the HF signal is monitored by the fault locating device to calculate a distance to the detected fault.
    Type: Application
    Filed: December 17, 2008
    Publication date: June 17, 2010
    Inventors: Wayne H. Oldenburg, Donald G. Kilroy
  • Patent number: 7683796
    Abstract: An open-wire detection system and method includes a current transmitter that can be connected to one or more wires, wherein the current transmitter provides a minimum current and/or a current that is greater than the minimum current. An anti-aliasing filter is connected to an analog-to-digital converter, such that the anti-aliasing filter receives the minimum current provided by the current transmitter and provides an output signal to the analog-to-digital converter. A noise filter is generally connected to an open-wire threshold detector, wherein the noise filter and the open-wire threshold detector permit detection of input levels below the minimum current provided by the current transmitter. An output from the open-wire threshold detector can be sampled multiple times at intervals that correlate with a frequency of a plurality of digital signals to produce sampled data, such that if the sampled data is below the minimum current, one or more of the wires (e.g.
    Type: Grant
    Filed: October 4, 2006
    Date of Patent: March 23, 2010
    Assignee: Honeywell International Inc.
    Inventors: Benjamin J. Stad, Sudhir Thalore
  • Patent number: 7652481
    Abstract: A leak in a membrane on top of a horizontal roof deck is located by applying conductive wires on the membrane underneath the aggregate in a grid pattern. A measuring and switching circuit generates voltage having a positive attached to the roof deck and a negative attached to the wires. The circuit has a relay for each wire which can be switched between a current sensor system and the negative potential. The sensor system is arranged to sense at each of the wires in turn the current flowing from the roof deck through any leak in the membrane to the wire. A microprocessor operates the relays in turn to connect all the other wires to the negative as a shield while each wire is sensed. From the output of the grid the changes in current in the x and y directions are analyzed to locate the leak in the membrane.
    Type: Grant
    Filed: August 17, 2007
    Date of Patent: January 26, 2010
    Assignee: Detec Systems LLC
    Inventor: Davie E. Vokey
  • Patent number: 7642789
    Abstract: The present invention provides a storage device and a writing unit diagnosing method, which can determine a defect in a writing unit at an early stage. There is provided a storage device, which includes writing units that write data to a storage medium, current application units that apply a current to the writing units, electric property measurement units that measure the electric property of the writing units at the time of applying a current by the current application units, and obtain electric property measured values, a storage unit that stores the electric property measured values obtained by the electric property measurement units, and a judgment unit that judges whether or not the writing units are abnormal based on the electric property measured values stored in the storage unit.
    Type: Grant
    Filed: January 30, 2007
    Date of Patent: January 5, 2010
    Assignee: Toshiba Storage Device Corporation
    Inventors: Nobuyoshi Yamasaki, Masao Kondo
  • Patent number: 7636224
    Abstract: The invention refers to a method and an apparatus (1) for protecting people against leakage currents while using appliances such as home appliances or the like. The apparatus (1) is provided with a differential switch (20) normally open and a differential current transformer (39) which generates a signal proportional to the leakage current, an elaboration unit (50) interfaced with the latter acquires said signal and keeps the switch (20) closed until a dangerous condition is met, corresponding to an acquired signal having a magnitude greater than a limit value.
    Type: Grant
    Filed: April 19, 2004
    Date of Patent: December 22, 2009
    Assignee: Trinity S.A.
    Inventor: Sandro Zandonella Balco
  • Publication number: 20090284263
    Abstract: The present invention provides a method and an apparatus for in situ test of transducers comprising sensing elements and associated conditioning preamplifiers. The invention makes it possible to evaluate the characteristics of the complete transducer by means of higher integration of the transducer circuitry. Tests can be performed from a remote central location without additional wiring and while the transducer is in operating environment. Testing is performed by superposing test signals and test sequence control signals on the wiring for the transducer output signal, hereby offering flexibility without sacrificing simplicity. Test signalling is by additional circuitry in the transducer interpreted and routed to the input of the conditioning preamplifier based on signalling from the remote test generator, and the signals engendered from the test signals can be analyzed from a remote analyzing system for complete qualifications of the transducer under test.
    Type: Application
    Filed: May 13, 2008
    Publication date: November 19, 2009
    Inventors: Morten KIRKELUND, Lars Munch KOFOED
  • Patent number: 7609068
    Abstract: A particulate (soot) sensor system has a diagnostic feature for verifying the integrity of the wiring leads. The sensor system includes a sensor and processing circuitry. The sensor has a substrate, first and second sensing electrodes on the substrate and a heater electrode. The heater electrode is electrically isolated from the first and second sensing electrodes, although there is a parasitic capacitance between them. The processing circuitry includes a heater driver, a measurement circuit connected to the sensing electrodes by wire leads, and a detector. The heater driver, in addition to energizing the heater, produces a stimulus signal that is applied to the heating electrode, which is then coupled via the parasitic capacitance to the sensing electrodes. The detector is coupled to the wiring leads and is configured to detect the stimulus signal when there is electrical conductivity over the leads to the sensing electrodes.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: October 27, 2009
    Assignee: Delphi Technologies, Inc.
    Inventor: Eugene V. Ripley
  • Patent number: 7545155
    Abstract: A method for making electrical measurements of a first and a second DUT, the DUTs being in sufficient proximity to exhibit crosstalk therebetween, the method comprising: applying a first signal to the first DUT; applying a second signal to the second DUT, the first signal and the second signal being contemporaneous and orthogonal to each other; measuring a first DUT response; and measuring a second DUT response. The first and second DUT responses exhibit independence from the second and first signals, respectively.
    Type: Grant
    Filed: April 20, 2007
    Date of Patent: June 9, 2009
    Assignee: Keithley Instruments, Inc.
    Inventor: Wayne C. Goeke
  • Patent number: 7521937
    Abstract: There is provided a measurement circuit including a main amplifier that generates a direct voltage in accordance with an input voltage and applies the generated voltage to a device under test, a feedback element that feeds back the direct voltage to the main amplifier and controls the direct voltage generated from the main amplifier to a voltage according to the input voltage, a current detecting circuit that outputs a detecting voltage according to a current value of the direct current, and a clamping circuit that restricts the current value of the direct current output from the main amplifier, in which the clamping circuit includes a first limiting-voltage output section that outputs a limiting voltage according to a limiting value of the direct current, a first bias generating section that generates a bias voltage making use of the input voltage as a reference voltage based on a magnitude relation between the limiting voltage and the detecting voltage, and a limiting-current supplying element that is provi
    Type: Grant
    Filed: May 15, 2007
    Date of Patent: April 21, 2009
    Assignee: Advantest Corporation
    Inventor: Masahiro Nagata
  • Patent number: 7516037
    Abstract: A method evaluating threshold of a data cell in a memory device including a programming locus coupled with the data cell for receiving a programming signal setting a stored signal level in the data cell and responding to a read signal to indicate the stored signal at a read locus; includes the steps of: (a) in no particular order; (1) selecting a test threshold signal; and (2) setting a read signal at a non-read level; (b) applying the test threshold signal to the programming locus; (c) cycling the read signal between a read level and a non-read level while applying the test threshold signal to the programming locus to present at least two test signals at the read locus when the read signal is at the read level; and (d) while cycling, observing whether the at least two test signals manifest a difference greater than a predetermined amount.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: April 7, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: David John Baldwin, Eric Blackall, Joseph Devore, Ross E. Teggatz
  • Patent number: 7514939
    Abstract: A potentiometer (PT1, PT2) has a first terminal (A1), a second terminal (A2) and an intermediate tap (ZA), a resistor being between the first terminal (A1) and the second terminal (A2) irrespective of the position of the potentiometer (PT1, PT2). In an evaluation method, a first drive voltage (GND) and at least one second drive voltage (VS), which is different than the first drive voltage, are applied to the first terminal (A1) and/or the second terminal (A2) and/or a third drive voltage (VS) is applied to the intermediate tap (ZA). The evaluation can be made from the different measurement voltages measured at the terminals.
    Type: Grant
    Filed: November 16, 2007
    Date of Patent: April 7, 2009
    Assignee: E.G.O. Elektro-Geraetebau GmbH
    Inventors: Ralf Dorwarth, Wilfried Schilling
  • Patent number: 7486080
    Abstract: An electrical coupling state is monitored between an inductive load and a circuit configuration. The latter has a first and a second coupling point for coupling to the inductive load. A first voltage value is determined between the first and second coupling points. The first voltage value is tested for the occurrence of a characteristic voltage pulse, which can be triggered by reduction of a magnetic flux in the inductive load by way of a steep-edged change in the amount of current flow through the inductive load. An error is identified in the coupling state if the characteristic voltage pulse does not occur within a predefinable time period. The absence of an error in the coupling state is also identified if the voltage pulse does occur.
    Type: Grant
    Filed: March 29, 2006
    Date of Patent: February 3, 2009
    Assignee: Siemens Aktiengesellschaft
    Inventors: Albrecht Föll, Jose Kissler, Thomas Röhrl
  • Patent number: 7482815
    Abstract: To provide a method of operating a shielded connection where signals are exchanged between two nodes (1) on a communications network over a connecting line (5a, 5b) and the connecting line (5a, 5b) has a shield (3), by which method can be established that the shield (3) is in a proper state, it is proposed that when a signal is transmitted from a first node (1) over the connecting line (5) to a neighboring node a current (Ishield) is drawn into the shield (3) and when operation is taking place in other ways the shield (3) is set to a bias voltage (UBias). A suitably arranged communications network is also specified.
    Type: Grant
    Filed: May 9, 2005
    Date of Patent: January 27, 2009
    Assignee: NXP B.V.
    Inventor: Bernd Elend
  • Patent number: 7471092
    Abstract: A test apparatus to test a device under test (DUT) to which a reference voltage of a predetermined high voltage is supplied is provided.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: December 30, 2008
    Assignee: Advantest Corporation
    Inventors: Seiji Amanuma, Ken-ichiro Hatake