Of An Applied Test Signal Patents (Class 324/523)
  • Patent number: 6766266
    Abstract: A testing device for LCD driver LSIs, includes: a voltage generator which generates a multiple number of expected voltages to be compared to each output voltage output from each of the output terminals and can selectively output multiple sets of reference voltages required for testing multiple kinds of semiconductor integrated circuits; a multiple number of differential amplifiers, each having two input terminals, one for receiving the output voltage output from each of the output terminals and the other for receiving the reference voltage from the reference voltage generator; and a comparator that receives the amplified output voltages from the multiple number of differential amplifiers and judges whether the amplified output voltage from each differential amplifier falls within the given voltage range.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: July 20, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hideaki Sakaguchi
  • Patent number: 6766452
    Abstract: A method of checking the authenticity of a digital electric circuit arrangement is achieved in that a concatenation (6; 8, 9) of at least a few circuit-technical elements (10) of the electric circuit arrangement (1) is formed, which deviates from the normal, intended use of the circuit arrangement (1), in that a digital random value generated by the external device (2) and transferred to the electric circuit arrangement (1) is modified in said circuit arrangement by the concatenated elements (6; 8, 9) and transferred to the external device (2), in that the external device (2) compares the modified value with a check value assigned to the random value transferred to the electric circuit arrangement (1), and in that the authenticity of the electric circuit arrangement (1) is recognized only when the modified value and the check value correspond to each other.
    Type: Grant
    Filed: April 29, 1999
    Date of Patent: July 20, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Stefan Philipp
  • Patent number: 6753688
    Abstract: A method and structure for an electronic circuit test and repair apparatus includes both of at least one wiring analyzer to locate circuit shorts and a current source to provide current sufficient to attempt to remove any identified shorts.
    Type: Grant
    Filed: April 10, 2001
    Date of Patent: June 22, 2004
    Assignee: International Business Machines Corporation
    Inventors: Roger M. Eddy, Charles J. Hendricks, Thomas Morrison, Robert N. Wiggin, Brian J. Wojszynski
  • Patent number: 6747458
    Abstract: A method for ground potential monitoring of a rectifier drive, having a capacitor which is connected with a voltage source via a switching device. The method including applying a test voltage between a connector of a capacitor of a rectifier drive and a mass or ground potential prior to connecting the rectifier drive with a voltage source that is connected with the capacitor via a switching device. The method also includes releasing the switching device if a potential of the connector changes by a predetermined amount after the applying the test voltage.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: June 8, 2004
    Assignee: Johannes Heidenhain GmbH
    Inventors: Norbert Huber, Franz Ritz
  • Patent number: 6744256
    Abstract: Disclosed are methods and apparatus for testing opto-electronic devices. Test data is shifted into a first boundary-scan cell. A test is then launched from the first boundary-scan cell by outputting the shifted test data to a signal generator. The signal generator, in turn, provides conditioned test data to an opto-electronic transmitter, in response to the shifted test data and at least one constraint for operating the opto-electronic transmitter. Finally, a response to the test is captured.
    Type: Grant
    Filed: October 29, 2001
    Date of Patent: June 1, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Kenneth Paul Parker, Myunghee Lee
  • Publication number: 20040100272
    Abstract: A method for isolating a fault in an aircraft circuit having a lead conductor and a plurality of branch conductors coupled to the lead conductor is disclosed. The method includes coupling a reference line of a device to a ground of the lead conductor, coupling a supply/return line of the device to the lead conductor, supplying an impulse signal to the supply/return line, and receiving a reflected signal that is produced from the impulse signal. The method also includes determining whether a fault exists in the plurality of branch conductors using the reflected signal, coupling the reference line of the device to a ground of the plurality of branch conductors, coupling the supply/return line of the device to one of the plurality of branch conductors, and supplying a signal to the supply/return line.
    Type: Application
    Filed: November 26, 2002
    Publication date: May 27, 2004
    Inventor: Robert G. Styles
  • Patent number: 6737671
    Abstract: A current measurement circuit and method for testing a semiconductor device is provided. The method includes the steps of providing a semiconductor integrated circuit device including a voltage regulating circuit, the voltage regulating circuit being activated as needed to maintain a required voltage level; monitoring the voltage regulating circuit to determine a number of times it is activated during a sample period; and comparing the number of activations to a predetermined limit whereby if the number of activations exceeds the predetermined limit the semiconductor device is defective. The current measurement circuit includes an external clock for providing a clock signal; a first counter for counting when the voltage regulating circuit is activated; a second counter for counting clock cycles of a sample period; and a register for storing the number of activations, wherein the number of activations represents a relative current consumption value of the semiconductor device.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: May 18, 2004
    Assignee: Infineon Technologies Richmond, LP
    Inventors: Joerg Vollrath, Philip Moore, Ulrich Zimmermann
  • Patent number: 6724212
    Abstract: In a method of testing a semiconductor integrated circuit, an input signal is applied to the semiconductor integrated circuit. Current passing through the elements of the semiconductor integrated circuit is repeatedly measured while sequentially changing the logical state of the elements. The standard deviation of the currents measured is calculated and a semiconductor integrated circuit is determined to be defective if the standard deviation exceeds a threshold value.
    Type: Grant
    Filed: July 26, 2002
    Date of Patent: April 20, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Chizuru Inoshita, Kazuo Aoki
  • Patent number: 6710603
    Abstract: A detection circuit is described which is configured, in particular, for line drivers for ascertaining the presence of an overshooting of a current flowing through a line above a predetermined value. The detection circuit has two current mirrors, in each case the input of one current mirror being connected to the output of the other current mirror. If the current feeds one current mirror, then an overshooting of the predetermined value can be ascertained on the basis of an output signal of the other current mirror.
    Type: Grant
    Filed: March 4, 2002
    Date of Patent: March 23, 2004
    Assignee: Infineon Technologies AG
    Inventor: Peter Gregorius
  • Patent number: 6677760
    Abstract: A method of and apparatus for analyzing a failure is provided. A laser beam generator (1) has a plurality of laser beam sources differing in wavelength from each other. First, the laser beam generator (1) generates a laser beam (B1) of about 1.1 &mgr;m in wavelength, and a failure analyzer (6) stores therein a resultant first current image. Next, the laser beam generator (1) generates a laser beam (B1) of about 1.3 &mgr;m in wavelength, and the failure analyzer (6) stores therein a resultant second current image. Next, the laser beam generator (1) generates a laser beam (B1) of not less than 2.0 &mgr;m in wavelength, and the failure analyzer (6) stores therein a resultant third current image. The failure analyzer (6) analyzes the cause and site of a failure in a sample (3) by reference to the first to third current images stored therein. The method can diagnose and localize the failure in a chip by reference to only the current images obtained by the laser beam irradiation.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: January 13, 2004
    Assignee: Renesas Technology Corp.
    Inventor: Tohru Koyama
  • Patent number: 6674300
    Abstract: In a method of testing a semiconductor integrated circuit, setting of a logical state of elements that constitute a semiconductor integrated circuit to be measured is sequentially changed. The current from a static-time power source current passing through the elements is measured several times while the settings are changed. Any two consecutive currents are obtained. When the difference between the two consecutive current exceeds a threshold value it is determined that the semiconductor integrated circuit is defective.
    Type: Grant
    Filed: July 26, 2002
    Date of Patent: January 6, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Chizuru Inoshita, Kazuo Aoki
  • Patent number: 6674290
    Abstract: The invention disclosed a method and system for multi-port synchronous high voltage testing, which mainly uses two or more sets of testing circuit with variable output condition and a high voltage generator with zero intermediate voltage for synchronous high voltage testing. Therefore it is not only possible to prevent operators from electric shock but also to provide correct multi-port testing voltages so as not to cause object under test damage. The testing circuit uses a plurality sets of individual high voltage generator and a current detector for providing functions for reading and determining individual voltage and current, so that it is possible to perform several high voltage tests during a single test period and complete tests on electric products. It is therefore possible to achieve both reduction of test-time and safety of operators.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: January 6, 2004
    Assignee: Chroma ATE Inc.
    Inventor: Simon Wang
  • Publication number: 20030210058
    Abstract: A test structure pattern includes a first comb, a second comb, and a serpentine line. The first comb includes a first set of tines of the same orientation. The second comb includes a second set of tines of the same orientation that are interdigitated with the first set of tines. The serpentine line runs between the interdigitated tines of the first metal comb and the second metal comb. The test structure pattern forms a first metal comb, a second metal comb, and a serpentine metal line on a die. Print quality and resolution is tested by checking for electrical continuity in the serpentine metal line and bridging between the serpentine metal line and one of the first metal comb and the second metal comb.
    Type: Application
    Filed: April 23, 2003
    Publication date: November 13, 2003
    Inventors: Robert W. Rumsey, Hiu F. Ip, Arthur Lam
  • Patent number: 6646401
    Abstract: In a control loop comprising a motor, a power section, a motor sensor and a control unit, an electrical circuit is also closed by producing an electrical connection between the motor and the motor sensor. Safe electrical isolation in such a control loop is preferably overcome by means of parasitic capacitances. The control unit transmits a feature, preferably via the power section, which feature is passed to the control unit once again from the other direction. This feature need not be an identity in the sense of a number, and a pulse which can be identified uniquely is sufficient. This allows a technically very effective implementation of a comparison of the control loop structure with the actual wiring, by the control unit evaluating the motor sensor to determine whether the pulse has occurred.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: November 11, 2003
    Assignee: Siemens Aktiengesellschaft
    Inventor: Peter Jaenicke
  • Publication number: 20030201780
    Abstract: A system for locating parallel arcing faults in a set of wires is described. The system includes three devices that can be used in combination or alone. A first device applies a current to a wire while grounding the remaining wires of the set of wires so as to cause the parallel arc, the first device being adapted to locate the parallel arcing fault using one or more leading edges of one or more electromagnetic waveforms being conducted on the wire under test. A second device comprises a controller and two or more receivers, each receiver being electrically coupled to the controller for receiving one or more leading edges of one or more electromagnetic waveforms being radiated by the parallel arcing fault. A third device senses one or more leading edges of one or more electromagnetic waveforms as well as the ultrasonic emissions emitted from the parallel arcing fault.
    Type: Application
    Filed: May 16, 2003
    Publication date: October 30, 2003
    Applicant: General Dynamics OTS (Aerospace), Inc.
    Inventor: Frederick K. Blades
  • Patent number: 6639410
    Abstract: Provided is an insulation resistance measuring apparatus capable of highly precisely measuring an insulation resistance characteristic of a capacitive electronic part in a short period of time while being unaffected by various kinds of noises such as from a power supply, measured power supply and the measured capacitor. A predetermined measurement voltage is applied to a capacitive electronic part, and a current flowing through the electronic part is measured in order to calculate an insulation resistance characteristic of the electronic part. A noise clipper circuit having a resistor and a switch connected in parallel with each other is connected on a path leading from a measurement power supply through the capacitive electronic part to a current detector. The switch is controlled to remain closed in an early stage of charging the capacitive electronic part. When charging the capacitive electronic part has progressed sufficiently, the switch is controlled to open.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: October 28, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Gaku Kamitani
  • Patent number: 6633167
    Abstract: In a signal supply apparatus such as might find use in an electro-optical device, signals that are supplied from multiple digital-to-analog converters are subject to impedance conversion by respective voltage followers, and provided as outputs to control the operation of the device. In the signal supply apparatus in a diagnostic examination mode, switching elements are operated so that output lines of the voltage followers are short-circuited by an output examination line. A current value measured as a result of the short circuit is compared with a specified current value to make a good-or-bad determination for the signal supply apparatus.
    Type: Grant
    Filed: June 12, 2001
    Date of Patent: October 14, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Akira Morita
  • Publication number: 20030173972
    Abstract: A method for detecting the position of a rotor of a DC motor with N phases having a plurality of windings, comprising the steps of connecting two of the windings between first and second prefixed voltages through to a first current path for a prefixed time, allowing the current stored in the two windings to discharge through a second current path; comparing the voltage across one of the two windings with a reference voltage and providing a control signal when the voltage is smaller in absolute value than the reference voltage, performing the above steps for each of the winding pairs of the motor; detecting the position of the rotor on the basis of the control signals obtained.
    Type: Application
    Filed: October 30, 2002
    Publication date: September 18, 2003
    Applicant: STMicroelectronics S.r.l.
    Inventors: Michele Boscolo, Massimiliano Brambilla, Ezio Galbiati
  • Publication number: 20030169051
    Abstract: A testing device for detecting and locating an arcing fault in an electrical system includes a detector circuit for detecting one or more characteristics of the arcing fault proximate the arcing fault and outputting a responsive signal. An annunciator speaker or display annunciates the responsive signal when the detector circuit is proximate the arcing fault, in order to locate the arcing fault in the electrical system.
    Type: Application
    Filed: March 5, 2002
    Publication date: September 11, 2003
    Inventors: David M. Tallman, William J. Murphy, Robert T. Elms
  • Patent number: 6603301
    Abstract: A multi-range measuring circuit for measuring a flow of electrical current between a first node and a second node. A measurement resistor is connected to the first node to develop a voltage having a high range output. A summing node connected in series with the measurement resistor acts as an input to an amplifier for developing a second voltage having a low range output having a higher scale factor than the high range output. If the capacity of the amplifier to maintain the low range as a linear function is exceeded, a bypass circuit bypasses excess current flow to the second node.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: August 5, 2003
    Assignee: Agilent Technologies, Inc.
    Inventor: Michael J. Benes
  • Patent number: 6600359
    Abstract: An integrated device includes a redundant bond pad for accessing internal circuitry in the event that the main bond pad for that circuitry is difficult to access with testing equipment. Signals from the redundant bond pad are biased to ground during normal operations of the integrated device. In order to test the relevant internal circuitry, a voltage is applied to a Test Mode Enable bond pad, overcoming the bias that grounds the redundant bond pad. In addition, the signal from the Test Mode Enable bon pad serves to ground any transmission from the main bond pad. As a result, the bond pad may be used to test the relevant internal circuitry given its accessible location in relation to the testing equipment.
    Type: Grant
    Filed: November 3, 1999
    Date of Patent: July 29, 2003
    Assignee: Micron Technology, Inc.
    Inventor: Troy A. Manning
  • Patent number: 6590398
    Abstract: Methods and devices for testing connectivity between connectors on a circuit board include utilizing a bias board having a photoconductive layer coated with a light-transmissive electrically conductive layer in conjunction with a light source and a voltage source to alternately charge and discharge conductors. A conductor discharged by connecting it to a ground via the bias board is determined to be electrically connected to a previously charged conductor if current flows between the conductor and the ground.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: July 8, 2003
    Assignee: Honeywell Advanced Circuits, Inc.
    Inventor: Yutaka Doi
  • Patent number: 6583628
    Abstract: A process to determine malfunctioning detectors in a danger signaling system having a control center and at least two-wire signaling line joined to multiplicity of detectors.
    Type: Grant
    Filed: December 13, 2000
    Date of Patent: June 24, 2003
    Assignee: Job Lizenz GmbH & Co. KG
    Inventor: Gerhard Röpke
  • Patent number: 6563323
    Abstract: In a method of testing a semiconductor integrated circuit, an input signal is supplied to a logic circuit of the semiconductor integrated circuit. Current from a static power source passing through the semiconductor integrated circuit is repeatedly meansured while a logic state of the semiconductor integrated circuit is sequentially changed. Maximum and minimum currents are selected from the measured currents and an average current calculated from the measured currents. A determination is made that the semiconductor integrated circuit is defective when either of the difference between the average and maximum currents or the difference between the average and minimum currents exceeds a threshold value.
    Type: Grant
    Filed: July 26, 2002
    Date of Patent: May 13, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Chizuru Inoshita, Kazuo Aoki
  • Publication number: 20030057989
    Abstract: A method of diagnosing an electric consumer using an analyzer unit is described. The electric consumer is supplied with a power supply voltage via a voltage divider. A first digital diagnostic port and a second diagnostic port of the analyzer unit are connected to the power supply voltage via the voltage divider. The diagnostic ports each detect a voltage Ulow or a voltage Uhigh, depending on the voltage applied.
    Type: Application
    Filed: July 23, 2002
    Publication date: March 27, 2003
    Inventor: Stephan Rosenberg
  • Patent number: 6538450
    Abstract: Method for locating an insulation fault (Rd) in the screen (SCR) of a cable relative to the ground, the screen being electrically accessible at least at one point of origin (Po) and at one terminal point (Pe). A current is injected between the point of origin (Po) and the terminal point (Pe) of the screen (SCR), by a current or voltage generator (21) that is insulated from the ground, a first electric voltage (U1) is measured at the point of origin (Po), in reference to the ground, and a second electric voltage (U, U2) is measured at the terminal point (Pe). The ratio between the first (U1) and the second (U, U2) voltages measured is representative of the relative position (Pdr) of the insulation fault between the point of origin (Po) and the terminal point (Pe).
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: March 25, 2003
    Assignee: Socrat
    Inventor: Jean Bussinger
  • Patent number: 6507198
    Abstract: The invention is directed to a method and an arrangement for detecting faults in the context of measurement quantities in a motor vehicle. At least one measurement quantity is represented by two redundant signal values. The time-dependent changes of the signal values are determined for fault recognition and a fault condition can be assumed when the signal changes no longer correlate with each other. The arrangement for fault recognition includes an input circuit of a control apparatus to which the measurement quantities are supplied via two lines from two measuring devices. One line is provided with a resistor to ground or to the supply voltage; whereas, the other line is configured without such a resistor or has a resistor to the supply voltage or to ground having an ohmage higher than the first resistor.
    Type: Grant
    Filed: May 22, 2000
    Date of Patent: January 14, 2003
    Assignee: Robert Bosch GmbH
    Inventor: Martin Streib
  • Publication number: 20020196030
    Abstract: Provided is an insulation resistance measuring apparatus capable of highly precisely measuring an insulation resistance characteristic of a capacitive electronic part in a short period of time while being unaffected by various kinds of noises. A predetermined measurement voltage is applied to a capacitive electronic part, and a current flowing through the electronic part is measured in order to calculate an insulation resistance characteristic of the electronic part. A noise clipper circuit having a resistor and a switch connected in parallel with each other is connected on a path leading from a measurement power supply through the capacitive electronic part to a current detector. The switch is controlled to remain closed in an early stage of charging the capacitive electronic part. When charging the capacitive electronic part has progressed sufficiently, the switch is controlled to open.
    Type: Application
    Filed: August 8, 2002
    Publication date: December 26, 2002
    Inventor: Gaku Kamitani
  • Publication number: 20020163341
    Abstract: The present invention provides an inspection apparatus and an inspection method capable of inspecting at a high speed by using a sensor having flexibility and excellent productivity. When a circuit board 100 as a subject of inspection is selected, CAD data of the circuit wiring 101 on this circuit board 100 is analyzed to detect the position of the end of each wiring. Then, two or more sensor elements adjacent to the end (from which the voltage variation can be detected) are specified. The switching circuit 16 is controlled to connect the selected sensor elements to an output terminal 12 and to connect the remaining sensor elements to the GND terminal 15. In this state, when an voltage is applied to one of the selected circuit wirings and then an inspection signal (voltage variation) is output from the output terminal 12, it will be determined that no disconnection exists in the circuit wiring.
    Type: Application
    Filed: May 29, 2002
    Publication date: November 7, 2002
    Inventors: Shogo Ishioka, Shuji Yamaoka
  • Patent number: 6476613
    Abstract: The present invention relates to a method for locating a fault (F) in a section of parallel transmission lines in a network comprising the steps: measuring the currents and voltages of both lines at a measuring point arranged at one end (A) of the section, determining the fault distance (x) between the measuring point and the fault as a solution of an equation Ax2−Bx+C−Rf=0 comprising the fault distance (x) as a variable and the fault resistance (Rf), the invention is characterised in that the parameters (A, B, C, D) comprise the phase components of the locally measured currents and voltages and are obtained from calculating from the measuring point to the fault location along the both parallel lines, and wherein the equation is resolved into its real and imaginary parts: Real(A)x2−Real(B)x+Real(C)−Rf=0 Imag(A)x2−Imag(B)x+Imag(C)=0, whereby the fault distance is derived from the imaginary part.
    Type: Grant
    Filed: July 10, 2001
    Date of Patent: November 5, 2002
    Assignee: ABB AB
    Inventors: Murari Mohan Saha, Jan Izykowski, Eugeniusz Rosolowski
  • Patent number: 6456087
    Abstract: Provided is an insulation resistance measuring apparatus capable of highly precisely measuring an insulation resistance characteristic of a capacitive electronic part in a short period of time while being unaffected by various kinds of noises such as from a power supply, measured power supply and the measured capacitor. A predetermined measurement voltage is applied to a capacitive electronic part, and a current flowing through the electronic part is measured in order to calculate an insulation resistance characteristic of the electronic part. A noise clipper circuit having a resistor and a switch connected in parallel with each other is connected on a path leading from a measurement power supply through the capacitive electronic part to a current detector. The switch is controlled to remain closed in an early stage of charging the capacitive electronic part. When charging the capacitive electronic part has progressed sufficiently, the switch is controlled to open.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: September 24, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Gaku Kamitani
  • Patent number: 6448782
    Abstract: A method and an arrangement (300, 400) for determining the location of partial discharge sources in an electric system, the method includes the steps of measuring a variable of the electric system, such as voltage or current, to which partial discharges occurring in the electric system cause pulses, separating the pulses caused by partial discharges, i.e.
    Type: Grant
    Filed: October 17, 2000
    Date of Patent: September 10, 2002
    Assignee: ABB Substation Automation Oy
    Inventors: Pertti Pakonen, Mats Björkqvist, Vesa Latva-Pukkila
  • Patent number: 6446231
    Abstract: In a method of testing a semiconductor integrated circuit, setting of a logical state of elements that constitute a semiconductor integrated circuit to be measured is sequentially changed. The current from a static-time power source current passing through the elements is measured several times while the settings are changed. Maximum and minimum currents are obtained. When the difference between the maximum and the minimum current exceeds a threshold value it is determined that the semiconductor integrated circuit is defective.
    Type: Grant
    Filed: February 1, 2000
    Date of Patent: September 3, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Chizuru Inoshita, Kazuo Aoki
  • Patent number: 6445189
    Abstract: A method and system for identifying, the cause of a partial discharge occurring in an electric system, which method increases measuring a variable of the electric system, such as voltage or current, to which partial discharges occurring in the electric system cause pulses, separating the pulses caused by partial discharges, i.e. partial discharge pulses, and occurring in the measured variable, defining and storing pulse parameters depicting the partial discharge pulses, or information from which the pulse parameters can be derived, defining (301) one or more pulse group graphs by means of the pulse parameters after at least a predefined number of partial discharge pulses, i.e.
    Type: Grant
    Filed: October 17, 2000
    Date of Patent: September 3, 2002
    Assignee: ABB Substation Automation Oy
    Inventors: Pertti Pakonen, Mats Björkqvist, Vesa Latva-Pukkila
  • Patent number: 6441621
    Abstract: A waveform observing jig for observing a waveform of a signal outputted from a predetermined signal terminal, comprises: a contact for a signal, for contacting with a signal terminal of a board to be observed, and a plurality of contacts for a ground, for contacting with a ground pattern of the board to be observed, wherein at least one contact for a ground is in contact with the ground pattern of the board to be observed when the contact for a signal is in contact with a predetermined signal terminal of the board to be observed.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: August 27, 2002
    Assignee: Ando Electric Co., Ltd.
    Inventor: Takahiro Nagata
  • Patent number: 6437577
    Abstract: A circuit to test the working of antennas for a radio telephone. The antennas each have a radiator with one end that open rises up into the space. The test currents flow through antenna wires to the antennas independent of a signal current (IRF). A secondary path with an impedance that is parallel to the RF path is connected to each radiator to return the separate test currents. A voltage evaluator monitors the operating state of the antennas by comparing the test voltages induced by the test currents at the antenna connections with a reference value and generates corresponding indication signals that provide information on the operating state of the antennas.
    Type: Grant
    Filed: May 22, 2000
    Date of Patent: August 20, 2002
    Assignee: Nokia Mobile Phones Ltd.
    Inventors: Martin Fritzmann, Thomas Wagner
  • Patent number: 6396283
    Abstract: A main sensor 101a and a subsensor 101b are two sensors adapted to operate in the same direction. A voltage of the same polarity is applied to both the sensors 101a and 101b from a common power supply of a voltage application 100. Then, an offset 103 causes an output value of the subsensor 101b to deviate from an output value of the main sensor 101a by a predetermined value. When the difference between outputs of both the sensors is outside a predetermined range, an abnormality decision 102 decides that an anomaly occurs in the sensor.
    Type: Grant
    Filed: August 15, 2000
    Date of Patent: May 28, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yasuhiro Kimoto
  • Patent number: 6396253
    Abstract: A method for detecting cut data lines in an imaging array having a detector including an array of pixels for measuring radiation, and a plurality of data line contacts is provided. The method includes the steps of initializing pixels of the imaging array which includes a plurality of data lines including at least one uncut data line and at least one cut data line, wherein each cut data line is electrically connected to at least one of the plurality of data line contacts and at least one uncommitted contact. The method further includes determining a signal level for the uncut data lines, measuring a signal level of each data line in the plurality of data lines, and determining a number of cut data lines and a number of uncut data lines by using the signal levels received from each data line in the plurality of data.
    Type: Grant
    Filed: November 19, 1999
    Date of Patent: May 28, 2002
    Assignee: General Electric Company
    Inventors: Scott W. Petrick, Matthew E. Ellis, Didier A. Verot, Donald E. Castleberry
  • Patent number: 6377053
    Abstract: The short-circuit detecting device includes a current generator for generating a current (IIN) of predetermined intensity, selectively into or out of the terminal (IN), and a first voltage comparator connected to the terminal (IN) and connected to the current generator in a manner such that the generator generates a current (IIN) in the inward direction and in the outward direction relative to the terminal (IN), respectively, when the voltage between the terminal (IN) and the ground is greater than a first level and less than a second level, respectively. The first level is greater than or equal to the second.
    Type: Grant
    Filed: February 24, 1998
    Date of Patent: April 23, 2002
    Assignees: SGS-Thomson Microelectronics S.r.l., Magneti Mareui S.p.A.
    Inventors: Michelangelo Mazzucco, Giampietro Maggioni
  • Publication number: 20020005722
    Abstract: In a signal supply apparatus such as might find use in an electro-optical device, signals that are supplied from multiple digital-to-analog converters are subject to impedance conversion by respective voltage followers, and provided as outputs to control the operation of the device. In the signal supply apparatus in a diagnostic examination mode, switching elements are operated so that output lines of the voltage followers are short-circuited by an output examination line. A current value measured as a result of the short circuit is compared with a specified current value to make a good-or-bad determination for the signal supply apparatus.
    Type: Application
    Filed: June 12, 2001
    Publication date: January 17, 2002
    Inventor: Akira Morita
  • Patent number: 6313642
    Abstract: A system for testing an arcing fault detection system in an electrical distribution network having a line conductor carrying an electrical signal between a power source and a load, the arcing fault detection system including a sensor coupled to the line conductor for monitoring the electrical signal and generating a sensor signal representing the electrical signal, the arcing fault detection system generating an arc-indicative signal in response to the sensor signal having characteristics indicative of an arcing fault. The testing system couples the sensor to a test line simultaneously with the line conductor and periodically produces a test signal on the test line. The sensor simultaneously monitors the test signal and the electrical signal and produces a sensor signal representing both the test signal and the electrical signal when the test signal is present on the test line.
    Type: Grant
    Filed: January 24, 1997
    Date of Patent: November 6, 2001
    Assignee: Square D Company
    Inventor: Stanley J. Brooks
  • Patent number: 6314544
    Abstract: The object of the procedure according to the present invention is to characterise a voltage or current converter (20) intended to be connected to a capacitive circuit (32) arranged so as to provide a capacitance difference (C1−C2) to the converter. Said converter is arranged so as to be able to receive the capacitance difference provided by the circuit, and to provide an output voltage (Vo) which is a function of the capacitance difference and a bias signal. This procedure is characterised in that it includes a sequence of steps which consist in varying the bias signal, while keeping the capacitance difference constant and measuring in response the output voltage. One advantage of such a procedure lies in the fact that it allows the electric performance of the converter to be determined independently of the error link to the capacitance measuring.
    Type: Grant
    Filed: December 9, 1998
    Date of Patent: November 6, 2001
    Assignee: EM Microelectronic-Marin SA
    Inventors: Olivier Rey, Antal Banyai
  • Publication number: 20010033173
    Abstract: A method for characterizing a bearing cartridge based on a preload applied to the bearing cartridge used in a disc drive, to increase disc drive yield rates. The method begins by loading the bearing cartridge on to a and to an actuator assembly such that the actuator is rotatably attached to the base by the bearing cartridge. Then, the method includes inducing a steady swing in the actuator. Then, the method includes measuring a voltage drop that occurs across the bearing cartridge during the steady swing to characterize the preload applied to the bearing cartridge.
    Type: Application
    Filed: February 23, 2001
    Publication date: October 25, 2001
    Inventors: Eng Hock Lim, Quek Leong Choo, Myint Ngwe, Kah Liang Gan, Beng Wee Quak
  • Patent number: 6304189
    Abstract: A method for detecting faulty switching operations of a first relay whose switching element is connected in series with a load and which, depending on the switch position, interrupts or closes the connection to the load in accordance with switching commands. In this context, a current is detected flowing through a circuit containing the switching element, and a faulty function of the relay, in particular a sticking of the switching element, is detected if the current intensity does not correspond to the current intensity to be expected in accordance with the selected switching position. Further relays, which can be provided in order to commutate the potentials at the load, can be included in the test. The method makes possible a relay test without moving the actuators, assuming the relays are in order. In addition, this generates a time savings, since not all of the relays have to be triggered for the test.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: October 16, 2001
    Assignee: Robert Bosch GmbH
    Inventors: Stefan Koch, Rolf Kremser, Michael Soellner
  • Patent number: 6297641
    Abstract: The simplified signal-processing circuit arrangement for processing and evaluating signals indicative of the status of an FSR-foil pressure sensor utilized in a seat-occupancy detection device, makes use of the fact that an application-oriented, integrated circuit, present in a motor vehicle having digital open-loop and closed-loop control functions implemented in a microcontroller MCU, contains a highly precise, switchable test-voltage source. One end of a circuit containing the FSR-foil is connected to a switching output VTA of the ASIC carrying the highly precise test voltage. The other end of this circuit is connected to a port of the MCU. A measuring voltage, which is a function of the status-contingent current intensity through the FSR-foil, drops off across a reference resistor connected in series to the FSR-foil, is fed to an analog-digital converter input of the MCU, and is converted therein into a digital signal indicating the occupancy status of the FSR-foil.
    Type: Grant
    Filed: February 24, 1999
    Date of Patent: October 2, 2001
    Assignee: Robert Bosch GmbH
    Inventors: Bernhard Mattes, Werner Nitschke, Wolfgang Drobny, Otto Karl, Adrian Hanussek, Peter Schädler
  • Patent number: 6281685
    Abstract: A system and method for locating flaws in cable shields and electromagnetic tubing (shield conduit) without disconnection of the cable or conduit under test is described. The fault location method, using a unique sensor array and fault detection circuit, supplements capabilities of earlier inductance/resistance tester. Previous inductance/resistance testers allow the user to measure very small resistances at cable/connector joints, usually without disconnecting the circuit under test.
    Type: Grant
    Filed: August 29, 1995
    Date of Patent: August 28, 2001
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventor: John E. B. Tuttle
  • Patent number: 6236217
    Abstract: A method of detecting faults on a cable (1) is provided, such a cable (1) having a conductive path, there being a number of sensors (5a, 5b, 5c, 5d, 5e) along the length of the cable (1), each of the sensors shaving a resistance measurement device for detecting the cable to ground resistance of the respective section of the cable (1). The cable to ground resistance at the respective sections are measured and compared with a predetermined value, and if the cable to ground resistance of any one particular section is less than the predetermined value, it is determined that a fault is present in that section.
    Type: Grant
    Filed: February 17, 1999
    Date of Patent: May 22, 2001
    Inventors: Andrew Biggerstaff Lewis, Andrzej Zbigniew Regini
  • Patent number: 6181140
    Abstract: A method and apparatus are used for locating cable breaks and resistive faults in cables, including fibre optic cables. The conductive shield or armour of the cable is divided into sections, usually at a splice. A step function voltage is applied to one end of the conductive shield. Remote sensors at the end of each section monitor the voltage and current as a function of time and at steady state. The measured data are encoded as current pulses and transmitted along the armour to the end of the cable. A computer at the cable end calculates from the measured voltages and currents the capacitance of each section of the shield. A broken section is identified by comparing the calculated and original capacitances of the sections and the distance along the broken section to the break is calculated from the calculated and original capacitances of the broken section.
    Type: Grant
    Filed: June 8, 1998
    Date of Patent: January 30, 2001
    Assignee: Norscan Inc.
    Inventors: David E. Vokey, Myron Loewen
  • Patent number: 6161077
    Abstract: A pulse discharge site location (PDSL) system is provided which captures pulses on a conductor without requiring the triggering functions of an oscilloscope. The PDSL system comprises a pulse discharge measurement (PDM) system and is programmed to store the data captured by the PDM system in a reference buffer corresponding in size to the propagation time of a pulse along the length of the conductor. Samples of the captured pulses are scanned to locate the peaks of pulses above a selected noise level. These pulses are stored into a temporary working buffer, along with a selected number of samples, normalized and then added to the reference buffer. The reference buffer provides a statistical average of pulse activity. Primary pulses and their second and higher order reflections, as well as transient interference pulses and radio frequency interference, are indicated at the beginning and end of the reference buffer.
    Type: Grant
    Filed: January 5, 1999
    Date of Patent: December 12, 2000
    Assignee: Hubbell Incorporated
    Inventor: Timothy J. Fawcett
  • Patent number: 6157308
    Abstract: A method and apparatus for detecting silent faults in feeding diodes of redundant DC power supplies. The voltages on both sides of the feeding diodes are measured. Arrangements are then made to ensure that if corresponding feeding diodes are both operative, that current flows through a particular one of these diodes. The measurements of voltage under the various conditions will reveal any open or shorted feeding diodes. The voltage across a diode can be altered by heating the diode through the process of heating a power resistor that is in thermal contact with that diode. Alternatively, a controllable rectifier of a power source can be controlled to reduce the voltage of that power source, and thereby drive current through the diode connected to the other power source. Advantageously, this arrangement allows silent faults in these diodes to be detected without substantial risk of causing the failure in the powered system.
    Type: Grant
    Filed: June 10, 1999
    Date of Patent: December 5, 2000
    Assignee: Lucent Technologies Inc.
    Inventor: Charles Calvin Byers