Of An Applied Test Signal Patents (Class 324/523)
  • Patent number: 6154020
    Abstract: A test circuit and method for determining the operating status of a coaxial cable, the coaxial cable including an internal conductor and an external conductor. The test circuit comprises a measurement terminal, a resistor coupled to the internal conductor adjacent a first end of the coaxial cable and the measurement terminal, a second resistor coupled to the internal conductor adjacent a second end of the coaxial cable and to a reference voltage, and a measurement device coupled to the measurement terminal for producing an output that is reflective of the operating status of the coaxial cable. In one embodiment, the measurement device comprises a voltage comparator logic output circuit. In another embodiment, the measurement device comprises an ohmmeter.
    Type: Grant
    Filed: December 3, 1998
    Date of Patent: November 28, 2000
    Assignee: Next Level Communications
    Inventor: Grant Moulton
  • Patent number: 6141093
    Abstract: An apparatus and corresponding method for detecting, locating, or defining a short in a thin-film module. The apparatus includes a mechanical fixture supporting the module. A current source provides a current pulse to the module which produces a magnetic field and heating nearby the short which turns on and off as the pulsed current in the short turns on and off. Polarized light is directed onto the module, with an intermediate element disposed between the module and the source of the polarized light. The intermediate element may be a stress birefringent coating (e.g., a polyimide insulating layer) disposed on the module and onto which the polarized light is directed. The sample is rotated 0 to 45 degrees to maximize the birefringent effect. Alternatively, the intermediate element may be a magneto-optical Faraday rotator.
    Type: Grant
    Filed: August 25, 1998
    Date of Patent: October 31, 2000
    Assignee: International Business Machines Corporation
    Inventors: Bernell E. Argyle, Arnold Halperin, Michael E. Scaman, Edward J. Yarmchuk
  • Patent number: 6084414
    Abstract: A method for testing for leakage currents in an oxygen probe, in particular a planar lambda probe, having at least one heating element, one external electrode and one internal electrode, and a solid electrolyte arranged between the electrodes, a first voltage being applied to the heating element. A second voltage is applied to at least one of the electrodes, the second voltage being selected so that the potential difference between the electrode and at least one area of the heating element is positive.
    Type: Grant
    Filed: April 16, 1998
    Date of Patent: July 4, 2000
    Assignee: Robert Bosch GmbH
    Inventors: Harald Neumann, Walter Strassner, Lothar Diehl
  • Patent number: 6026145
    Abstract: An automated telephone line test system that is well suited for determining the location of faults within a telephone network. The telephone line test system uses time domain reflectometry to aid in locating the faults. The time domain reflectometry unit is connected through a switch in the network so that the time domain reflectometry unit can be connected to multiple lines without human intervention. Parameters of the time domain reflectometry signals are controlled so that reflections from the switch do not interfere with measurement of parameters on the faulty line.
    Type: Grant
    Filed: December 14, 1998
    Date of Patent: February 15, 2000
    Inventors: Frank R. Bauer, Kurt E. Schmidt, David J. Groessl
  • Patent number: 6016058
    Abstract: In-service verification/continuity testing apparatus and method for testing the continuity integrity of wiring installed to an in-use operational circuit. The apparatus measures the voltage difference created by injecting two equal but opposite insignificant currents through a test path. A current loop is created by placing an isolated ground, which is referenced to unique detection circuitry provided in the testing apparatus. An accurate voltage differential calculation is accomplished by using a sample and hold circuit in parallel with switching the injected currents. Biasing the detection circuitry using two identical but inverse voltages with a reference to the isolated ground allows the detection circuit to subtract out extraneous currents flowing through the wiring path due to external voltage and current sources.
    Type: Grant
    Filed: October 2, 1997
    Date of Patent: January 18, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: Robert Bradley Sussman, Carl Joseph Bilicska, Randolph Leonard Kasprzyk
  • Patent number: 5990686
    Abstract: A resistive fault location method and apparatus are used on communication and power cables. Two instruments are connected to opposite ends of the faulted conductor. Each takes a series of voltage and current measurements that are then processed to determine the distance from each end of the conductor to the fault. To eliminate voltage and current transients, the data collected is statistically analyzed and data that is analyzed as being affected by transients is discarded. The remaining data is taken as being steady state data. This eliminates any requirement for simultaneous measurements at opposite ends of the conductor and accounts for any situation where local transients at the two ends of the conductor are different at any given instant.
    Type: Grant
    Filed: June 18, 1996
    Date of Patent: November 23, 1999
    Inventors: David E. Vokey, Kenneth N. Sontag, Gilles Aminot
  • Patent number: 5977774
    Abstract: A method for determining whether a circuit under test is open is presented. A digital-to-analog converter is dithered to generate a known signal. This known signal is summed with an external attenuation signal which is brought into the system from a probe on the circuit under test. This summation is then measured by an analog-to-digital converter (ADC). If the known signal is not attenuated by the probe (i.e., the ADC measures essentially the known signal), we can conclude that the circuit is open.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: November 2, 1999
    Assignee: Hewlett-Packard Company
    Inventors: Robert H. Noble, Robert B. Smith
  • Patent number: 5969530
    Abstract: An inexpensive and reliable circuit board inspection apparatus and method requires only a short inspection time and is applicable to a densely wired circuit board. A constant voltage E is applied to a switch section SW1 from a signal source 46. A computer 44 turns on a switch section SW2 and then turns the switch section SW1 on. An equivalent circuit is then closed to cause a current (i) to flow therethrough, thereby generating a voltage Vx that is input to an amplifier 74. After the voltage Vx has been amplified by the amplifier 74, its maximum value is detected and held by a peak hold circuit 76. Based on the maximum value, the computer 44 determines the continuity of a printed pattern on a circuit board 32. The voltage Vx input to the amplifier 74 exhibits the maximum value nearly simultaneously with the activation of the switch section SW1. Thus, detection of the maximum value and continuity of the printed pattern can be determined in a very short time.
    Type: Grant
    Filed: February 27, 1998
    Date of Patent: October 19, 1999
    Assignee: Nidec-Read Corporation
    Inventor: Munehiro Yamashita
  • Patent number: 5942982
    Abstract: A system for detecting open circuits is presented. The system comprises first and second digital-to-analog converters (DACs). The DACs, in combination with a microprocessor, generate a tri-state voltage which is fed through the system. This tri-state voltage is then attenuated via an amplifier. A probe carries an external attenuation signal via a measurement line through the system to be summed with the attenuated tri-state voltage to create V.sub.wts. An analog-to-digital converter then compares V.sub.wts with a known signal to determine whether the circuit under test is open.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: August 24, 1999
    Assignee: Hewlett-Packard Company
    Inventors: Robert H. Noble, Robert B. Smith
  • Patent number: 5889835
    Abstract: A method and system for testing the continuity of a transmission line in a non-addressable network. A method and system in a communications service environment are provided, the environment including an addressable network and a non-addressable network, for testing transmission line continuity in the non-addressable network. In an embodiment, a signal generator connected to a first transmission line in the addressable network generates a signal on the first transmission line. The first transmission line is connected to a second transmission line in the non-addressable network by a bridge. The bridge transfers the signal from the first transmission line to the second transmission line. The system also includes a signal receiver connected to the second transmission line for receiving the signal over the second transmission line when the second transmission line is continuous.
    Type: Grant
    Filed: November 13, 1997
    Date of Patent: March 30, 1999
    Assignee: BellSouth Corporation
    Inventor: Daniel L. Estes
  • Patent number: 5874895
    Abstract: The present invention is directed to a method and apparatus for testing the operation of a sensor controlled monitor device by using a test device connected in parallel to the monitor device. When activated, the test device sinks a current signal, representing a parameter to be monitored, in a steadily changing, calibrated manner, causing an input to the monitor device to vary, thus permitting the monitor device to respond to the varied signal to calibrate or test alarm settings and function. The present invention permits easy confirmation of the monitor device's gain adjustment, zero adjustment, and setpoint adjustment. In addition, there is no need to physically disconnect the transmitting sensor circuit or to physically change the amount of the substance being monitored. There is also no need to disturb any wiring of existing circuits.
    Type: Grant
    Filed: November 15, 1996
    Date of Patent: February 23, 1999
    Assignee: International Business Machines Corporation
    Inventor: Craig Neil Devarney
  • Patent number: 5847423
    Abstract: A semiconductor device having thin film capacitors and containing resistance measuring elementsis disclosed. The thin film capacitor comprises a bottom electrode, a high permittivity dielectric, and a top electrode stacked on an interlayer insulation film and at least one of a plurality of contact formed in electrical contact with the substrate at the desired position of an interlayer insulation film formed on a semiconductor substrate. The bottom electrode comprises at least two layers.
    Type: Grant
    Filed: June 26, 1997
    Date of Patent: December 8, 1998
    Assignee: NEC Corporation
    Inventor: Shintaro Yamamichi
  • Patent number: 5844412
    Abstract: A printed circuit board tester incorporating hardware for fast capacitive measurements. The circuit board tester includes a digital signal processor that can both source and measure test signals. It also includes an amplifier having an input and an output connected to probes that can contact points on the printed circuit board. In use, the board tester is configured to place a capacitor on the printed circuit board under test in the feedback path of the amplifier. The digital signal processor generates a stimulus signal to the capcitor and the output of the amplifier is passed to the digital signal processor. The digital signal processor uses an adaptive filtering approach to determine convergence of the measurement, thereby minimizing measurement time. The arrangement is flexible and can be reconfigured to measure both large and small values of capacitance.
    Type: Grant
    Filed: December 19, 1996
    Date of Patent: December 1, 1998
    Assignee: Teradyne, Inc.
    Inventor: Peter R. Norton
  • Patent number: 5844199
    Abstract: A conductor pattern test apparatus comprises a DC voltage power source for applying a predetermined DC voltage to an end of one of a plurality of conductor patterns arranged in parallel with each other, a current measurement circuit for measuring a current flowing to another conductor pattern adjacent to the one of the conductor patterns via the end by the DC voltage power source to the end, and a short-circuit position calculation circuit for calculating a resistance value from the end to a short-circuited part of the two conductor patterns adjacent to each other, based on the current value measured by the current measurement circuit and the voltage value applied by the DC power source, and locating a position of the short-circuited part based on the calculated resistance value and a resistance value of a conductor pattern having no short-circuit. A disconnect location is also obtained.
    Type: Grant
    Filed: March 4, 1997
    Date of Patent: December 1, 1998
    Inventors: Shinji Iino, Takashi Amemiya
  • Patent number: 5767684
    Abstract: The invention relates to a method for detecting partial discharges occurring in a cable, wherein the cable has an earth screen with a helical structure, comprising the following steps of: arranging at least one detection coil round the cable for detecting electromagnetic pulses travelling along the cable; applying a potential difference between the core and the earth shield of the cable; and analyzing pulses generated by possible partial discharges in the at least one detection coil in order to determine the location and quality of the partial discharge having caused the pulse, wherein the detection coil is adapted to process signals with a frequency higher than 100 MHz. It has been found that with coils comprising only such a limited number of turns the signal detected by the coil is a much better representation of the form of the electromagnetic pulse travelling along the cable.
    Type: Grant
    Filed: June 12, 1995
    Date of Patent: June 16, 1998
    Assignee: N.V. Kema
    Inventor: Evert Frederik Steennis
  • Patent number: 5708364
    Abstract: A novel method and apparatus are used for monitoring cables for wear and damage. The system is particularly applicable to a cable system with multiple branch terminations. The cables have detection conductors, for example the metal cable jackets or other detection conductors extending the length of the conductors. These are connected electrically at the splice points in the system. At the end of each branch and at the end of the main cable, the detection conductors are each connected to a novel termination circuit. In the normal monitoring mode, the termination circuit appears as an open circuit. A DC voltage is normally applied to the detection conductors. Any current is a result of current leakage at a resistive fault along the detection conductors. The termination circuits are activated by altering the DC voltage, e.g. by reversing the polarity and increasing the magnitude of the voltage. This causes the termination circuit to perform a series of functional tests.
    Type: Grant
    Filed: August 2, 1995
    Date of Patent: January 13, 1998
    Inventors: David E. Vokey, Kenneth N. Sontag, Gilles Aminot
  • Patent number: 5700698
    Abstract: An improved method for screening a non-volatile memory device or programmable logic device including the steps of initially programming and then erasing a device for a predetermined number of cycles thereby providing a stressed device. Next, the stressed device is erased, providing an erased device. A first voltage value is measured across the floating gate of each cell of the erased device which is then stored for a predetermined period of time at a first predetermined temperature, providing a stored device. Next, the stored device is baked at a second predetermined temperature resulting in a baked device. Then, a second voltage value is measured across the floating gate of each cell of the baked device. Each of the first and the second voltage values are subtracted to provide a plurality of measured voltage drop values each of which are compared to an acceptable predetermined voltage drop value.
    Type: Grant
    Filed: July 10, 1995
    Date of Patent: December 23, 1997
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Radu Barsan, Jonathan Lin
  • Patent number: 5691644
    Abstract: A method of use and system for determining the longitudinal active resistance of a neutral conductor of an underground electrical cable, while the electrical cable remains in service. The method is conducted by applying a selective frequency test current signal to the neutral conductor of the underground cable connected between a pair of grounded structures, e.g., power transformers, from a test signal generator that is connected across the neutral conductor using first and second bifilar winding signal-voltage cables. The method utilizes indirect voltage determination to obtain the voltage drop across the neutral conductor while mitigating induced voltage effects which occur when direct voltage measurement is used. A plurality of selective frequency test current signals are used to obtain a plurality of longitudinal active resistance values. Any conventional extrapolation method is then used to obtain a longitudinal active resistance value at 0 Hz.
    Type: Grant
    Filed: May 10, 1996
    Date of Patent: November 25, 1997
    Assignee: Henkels & McCoy
    Inventor: Boris M. Danilyak
  • Patent number: 5686828
    Abstract: A method for locating the joints and fractures of underground cast iron gas mains comprises connecting several sections of an underground cast iron gas main pipeline across a sixty watt signal generator with an audio-frequency signal output of 7800 hertz. The connections take advantage of service lines, valve boxes and drip access at the surface, otherwise holes are drilled to accommodate contact probes. The signal passes through the pipe sections and their joints in series. The centerline of the underground cast iron gas main pipeline is plotted directly above on the surface of the ground, e.g., along a surface centerline. The relatively higher impedance of the pipe joints compared to the pipes themselves, causes current fluxes to radiate from each joint. The relative linear positions and their corresponding signal power measurements are collected along the surface centerline.
    Type: Grant
    Filed: December 19, 1995
    Date of Patent: November 11, 1997
    Assignee: New York State Electric & Gas Corporation
    Inventors: Earl J. Peterman, David L. Peterman
  • Patent number: 5684408
    Abstract: A protective grounding jumper cable tester basically includes a housing, a direct current power supply, a pair of jumper attachment terminals, a pair of test probe terminals, a current applying circuit connected between the direct current power supply and the pair of jumper attachment terminals for applying a direct current through a jumper cable attached between the jumper attachment terminals, and a resistance sensing circuit connected to the test probe terminals for sensing resistance to the flow of the direct current through the jumper cable by using a pair of test probes connected to the test probe terminals.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: November 4, 1997
    Assignee: Hubbell Incorporated
    Inventor: Clayton C. King
  • Patent number: 5654642
    Abstract: A system and method for testing underground electric cables, while in service, for active corrosion and degree of neutral loss. The method is conducted by applying a non-harmonic selected frequency signal to the neutral(s) of the underground cable connecting a pair of structures, e.g., power transformers, from a variable frequency generator of the system. The test is conducted by a surveyor wearing foot electrodes which contact the earth as the surveyor walks along the earth over the cable in close interval steps. At each step, direct current (DC) potentials are monitored by a voltmeter between a copper-copper sulfate electrode carried by the surveyor and brought into contact with the ground at each step and the transformer ground. The potential of the gradients between the foot electrodes at the selective frequency and at the native alternating current (AC) is also measured by the voltmeter. These measurements are recorded at a stationary location on a digital data logger and/or computer.
    Type: Grant
    Filed: December 12, 1995
    Date of Patent: August 5, 1997
    Assignee: Henkels & McCoy
    Inventors: Craig Daniel Bass, Richard Donald Valenti, Jr., Emer Cox Flounders, Jr.
  • Patent number: 5639390
    Abstract: A conductor pattern test apparatus comprises a DC voltage power source for applying a predetermined DC voltage to an end of one of a plurality of conductor patterns arranged in parallel with each other, a current measurement circuit for measuring a current flowing to another conductor pattern adjacent to the one of the conductor patterns via the end by the DC voltage power source to the end, and a short-circuit position calculation circuit for calculating a resistance value from the end to a short-circuited part of the two conductor patterns adjacent to each other, based on the current value measured by the current measurement circuit and the voltage value applied by the DC power source, and locating a position of the short-circuited part based on the calculated resistance value and a resistance value of a conductor pattern having no short-circuit. A disconnection position calculator calculates a capacitance value from voltage values.
    Type: Grant
    Filed: December 23, 1994
    Date of Patent: June 17, 1997
    Assignees: Tokyo Electron Limited, TEL Engineering Limited
    Inventors: Shinji Iino, Takashi Amemiya
  • Patent number: 5615216
    Abstract: A first test circuit is connected to one end of a first wiring line, and a second test circuit is connected to one end of a second wiring line. The second wiring line serves as a data bus. N-channel MOS transistors, connected in series, are provided between the first and second wiring lines and located below a third wiring line. The transistors are set in a conductive state by a gate control signal from a test control circuit in a test mode, and are set in an OFF state in a normal operation mode. In the normal operation mode, the capacitance between the first and second wiring lines is small and does not adversely affect the operation speed of an integrated circuit.
    Type: Grant
    Filed: June 21, 1994
    Date of Patent: March 25, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yukihiro Saeki
  • Patent number: 5598009
    Abstract: An improved transistor design and methods of construction and testing for same. The novel transistor design method includes the steps of providing a transistor with multiple common gate areas; connecting each gate area to a pad; and adjusting the ratio of the area of the pad to the total of the gate areas to provide a predetermined ratio. The ratio may be adjusted by adjusting the size of the gate, in a single gate implementation, or adjusting the number of gates in a multiple gate configuration. The novel transistor includes a substrate, at least one source disposed on the substrate; at least one drain disposed on the substrate; and at least one gate disposed on the substrate between the source and the drain. The gate has a first layer of at least partially conductive material of area A.sub.g connected to a pad of area A.sub.p. In accordance with the present teachings, the antenna ratio R of the area of the pad A.sub.p to the area of the gate A.sub.g is a predetermined number.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: January 28, 1997
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Nguyen D. Bui
  • Patent number: 5594348
    Abstract: To carry out a non-destructive test for testing insulation of a small-size electric machine having a coil, a surge voltage is applied to the coil of the electric machine mounted in a decompression tank whose inner pressure is kept from 15 to 25 [Torr] so as to generate glow discharge in case there exists a flaw in the coil.
    Type: Grant
    Filed: May 25, 1995
    Date of Patent: January 14, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuo Iijima, Masahiro Tsubokawa
  • Patent number: 5592097
    Abstract: A load open state detection circuit includes a driver having X and Y terminals between which an inductive load is connected and which receive drive signals, a first transistor whose base is connected to the X terminal and whose collector is connected to a terminal supplied with a predetermined voltage, a second transistor whose base is connected to the Y terminal and whose collector is connected to the terminal supplied with a predetermined voltage and third and fourth transistors having bases thereof connected to input terminals supplied with respective drive signals. A fifth transistor has a base connected to the base of the first transistor, a collector connected to a resistor which is in turn connected to the collector of the first transistor, and an emitter connected to a second resistor which is connected to the emitter of the first transistor.
    Type: Grant
    Filed: May 15, 1995
    Date of Patent: January 7, 1997
    Assignee: NEC Corporation
    Inventors: Toshifumi Shimizu, Yumiko Iwanami, Kazuhiro Mori
  • Patent number: 5581432
    Abstract: A clamp circuit (10) for protecting a MOSFET (12) from destructive voltages and currents includes a clamping element (30), a current switch (27), a bond pad (23), a probe pad (25), and a resistor (21). When no external signal is applied to the probe pad (25), a FET (18) in the clamping element (30) is conductive. When the drain voltage of the MOSFET (12) rises above a clamping voltage of the clamping element (30), a current flows through the clamping element (30) and switches on the MOSFET (12). To ensure a safe operating area of the MOSFET (12), a voltage is applied to the probe pad (25) to turn off the FET (18), a breakdown voltage of the MOSFET (12) measured from the bond pad (23) is compared with the clamp voltage, and circuit die with the breakdown voltage less than the clamp voltage are discarded.
    Type: Grant
    Filed: July 25, 1995
    Date of Patent: December 3, 1996
    Assignee: Motorola, Inc.
    Inventors: Keith M. Wellnitz, John M. Hargedon, Jeffrey A. Kanner
  • Patent number: 5570027
    Abstract: The apparatus and method operate by first generating a set of amplitudes for a constant current pulse. Each amplitude in the set is associated with one conductor on the reference printed circuit board and represents the amplitude which generates a determined voltage rise in that one conductor that is within a set range of a desired voltage rise for that one conductor. Each determined voltage rise representing the difference between a first voltage drop reading and a subsequent voltage drop reading taken across each conductor while the constant current pulse is applied. Once the set of amplitudes is generated, the apparatus and method generate a set of test voltage rises.
    Type: Grant
    Filed: April 19, 1995
    Date of Patent: October 29, 1996
    Assignee: Photocircuits Corporation
    Inventors: Louis J. Stans, Christopher F. Lynch
  • Patent number: 5554928
    Abstract: A method for detecting faults on a printed circuit board populated with semiconductor electronic components. To detect faults, signal pins on the components are taken in pairs. The an indication of the common mode resistance between those pins and ground is computed from a series of current measurements. An error is detected when the common mode resistance is outside of a predetermined range. A "learn mode" is also disclosed in which the pairs of leads used for the test are selected by taking measurements on a known good board without detailed knowledge of the semiconductor components on the board.
    Type: Grant
    Filed: November 20, 1995
    Date of Patent: September 10, 1996
    Assignee: Teradyne, Inc.
    Inventor: Philip J. Stringer
  • Patent number: 5548463
    Abstract: A power switching circuit module includes two power rails coupling independent power supplies to the input of a DC controller and test circuits to detect latent faults in power mixing devices included in the circuit.
    Type: Grant
    Filed: January 11, 1996
    Date of Patent: August 20, 1996
    Assignee: Tandem Computers Incorporated
    Inventors: David L. Aldridge, William P. Bunton, Stephen R. Bissell, David Brown, Daniel D. Gunn, Carl Kagy, David P. Sonnier
  • Patent number: 5543997
    Abstract: A safety switching arrangement for the switching on and off of the power supply (11) of two actors (12a, 12b) for example relays, which, in dependence on the switching on of the current, and in dependence on a sensor switching signal (13a, 13b) jointly set a working apparatus (22) in operation, the safety switching arrangement comprising two main switches (14a, 14b) arranged between the power supply (11) and each preferably earthed actor (12a, 12b).
    Type: Grant
    Filed: December 15, 1993
    Date of Patent: August 6, 1996
    Assignee: Erwin Sick GmbH, Optik-Elektronik
    Inventor: Harald Ruprecht
  • Patent number: 5498967
    Abstract: A system and method for testing underground electric cables, while in service, for active corrosion and degree of neutral loss. The method is conducted by applying a non-harmonic selected frequency signal to the neutral(s) of the underground cable connecting a pair of structures, e.g., power transformers, from a variable frequency generator of the system. The test is conducted by a surveyor wearing foot electrodes which contact the earth as the surveyor walks along the earth over the cable in a close interval steps. At each step, direct current (DC) potentials are monitored by a voltmeter between a copper-copper sulfate electrode carried by the surveyor and brought into contact with the ground at each step and the transformer ground. The potential of the gradients between the foot electrodes at the selective frequency and at the native alternating current (AC) is also measured by the voltmeter. These measurements are recorded at a stationary location on a digital data logger and/or computer.
    Type: Grant
    Filed: March 23, 1995
    Date of Patent: March 12, 1996
    Assignee: Henkels & McCoy, Inc.
    Inventors: Craig D. Bass, Richard D. Valenti, Jr., Emer C. Flounders, Jr.
  • Patent number: 5489851
    Abstract: A method and apparatus for determining whether semiconductor components are electrically connected to a printed circuit board. A voltage (or current) is connected to two traces leading to connections to a semiconductor component to be tested. The initial current (or voltage) is measured at an initial temperature. Then, the temperature of the semiconductor is changed. Current (or voltage) is measured again after the temperature change. A change in current (or voltage) indicates that the semiconductor component is electrically connected to the trace.
    Type: Grant
    Filed: December 5, 1994
    Date of Patent: February 6, 1996
    Assignee: Hewlett-Packard Company
    Inventors: John M. Heumann, Ronald J. Peiffer
  • Patent number: 5463322
    Abstract: A process for locating common electrode shorts in an electronic array, such as an x- y- addressed imager assembly having a short circuit between an address line and an overlying common electrode layer, includes the steps of applying a test voltage to the addressed line shorted to the common electrode, measuring current at each of a plurality of common electrode contact points disposed at selected intervals along selected edges of the common electrode, and processing the respective measured currents in accordance with a selected relationship to localize a short circuit location along the length of the shorted address line. In imager assembly arrangements in which it is possible to measure currents on opposite sides of the common electrode disposed substantially perpendicular to the orientation of the shorted address line, the selected relationship is I.sub.A-N /I.sub.a-n =(L-X)/X, wherein: I.sub.A-N are the measured currents from common electrode contact points along one common electrode opposite edge; I.sub.
    Type: Grant
    Filed: December 3, 1993
    Date of Patent: October 31, 1995
    Assignee: General Electric Company
    Inventors: Robert F. Kwasnick, Joseph M. Pimbley
  • Patent number: 5457391
    Abstract: A load short-circuit state detection circuit has a driver including X and Y terminals between which an inductive load is connected and receiving drive signals. The detection circuit further includes a first transistor whose base is connected to the X terminal and whose collector is supplied with a voltage, a second transistor whose base is connected to the Y terminal and whose collector is also supplied with a voltage, a first constant current circuit connected to an emitter of the first transistor through a first resistor and a second constant current circuit connected to an emitter of the second transistor through a second resistor. A comparator is provided for comparing a voltage of a node between the first resistor and the first constant current circuit with a voltage of a node between the second resistor and the second constant current circuit.
    Type: Grant
    Filed: August 23, 1993
    Date of Patent: October 10, 1995
    Assignee: NEC Corporation
    Inventors: Toshifumi Shimizu, Yumiko Iwanami, Kazuhiro Mori
  • Patent number: 5448492
    Abstract: Loads, such as power relays controlling wipers, windows and lights are connected to an automobile battery through individual transistor drives that are controlled by a microcontroller. A switch, connected to the microcontroller, is operated to activate each drive. The microcontroller checks the load characteristic when each drive is activated and inactivated. When the load is inactivated, it is part of a resistance network producing a test voltage that is digitally converted and supplied to the microcontroller, which compares the test voltage to a stored voltage to determine if the load is correct. An analog multiplexer is controlled by the microcontroller to select the voltage produced for each load.
    Type: Grant
    Filed: June 3, 1994
    Date of Patent: September 5, 1995
    Assignee: United Technologies Automotive, Inc.
    Inventors: Darrell J. Kolomyski, John A. Barrs
  • Patent number: 5402072
    Abstract: Apparatus and method are disclosed for performing testing and fault isolation of high density passive boards (e.g. unpopulated circuit boards) and substrates. Using a small number of moving probes, simultaneous network resistance and network capacitance measurements may be performed. Thus, test time is minimized by eliminating the need for electrical switching and/or excessive probe movement during the test of a normal circuit board network. Simultaneous network capacitance and network leakage measurement are also achieved using phase-sensitive detection. Dual-frequency measurement techniques allow the measurement of both the capacitance value and resistance value of a leakage path between a network being measured and an unknown network. Any leakage resistance between a network under test and ground or power planes within the circuit board may also be determined from the measurements.
    Type: Grant
    Filed: February 28, 1992
    Date of Patent: March 28, 1995
    Assignee: International Business Machines Corporation
    Inventors: Shinwu Chiang, Huntington W. Curtis, Arthur E. Falls, Arnold Halperin, John P. Karidis, John D. Mackay, Danny C. Wong, Ka-Chiu Woo, Li-Cheng Zai
  • Patent number: 5392219
    Abstract: This disclosure describes an Interconnect Stress Testing (IST) system and a printed wiring board test coupon which is used with the IST system. The system includes a computer device and a cabinet which is used for mounting the test coupon as well as housing a number of the other components that make up the system. During a pre-cycling phase, the system determines the correct current that should be passed through the coupon in order to heat it to a predetermined temperature. After that test current value is determined the system actually stress tests the coupon by passing the determined test current through the coupon. It does so for a selected number of cycles, and monitors resistance changes in the coupon during testing while recording test data. This disclosure also describes the test coupon, which is designed to uniformly dissipate the heat created during stress cycling.
    Type: Grant
    Filed: July 6, 1993
    Date of Patent: February 21, 1995
    Assignee: Digital Equipment Corporation
    Inventors: Stephen M. Birch, Gerard M. Gavrel, Zaffar I. Memon
  • Patent number: 5359291
    Abstract: A simple method and apparatus for detecting short circuits between a first circuit (77) and a second circuit (76) of a printed wiring board or printed wiring assembly by using a voltage source (10) and a sensitive logamp voltmeter (11). The voltage source (10) impresses a voltage potential between the first (77) and second circuit (76). The single voltmeter probe (39) passes along the circuit having the positive potential. The signal from the probe (39) is filtered and passed through a variable gain amplification circuit. The result is displayed on a sensitive ammeter (65). The short circuit is detected at the point on the circuit where the meter displays the minimum voltage with respect to the impressed potential.
    Type: Grant
    Filed: April 1, 1993
    Date of Patent: October 25, 1994
    Assignee: AlliedSignal Inc.
    Inventor: Alexander L. Dommerich, III
  • Patent number: 5347225
    Abstract: An apparatus for monitoring and testing a twisted pair, particularly useful for an Ethernet network. First and second DC currents alternated with one another are applied to both ends of the line, asynchronously. By monitoring the potential on the line, a determination is made as to the condition of the line. For example, shorted, crossed, improperly terminated or open conditions can be detected. A visual indication of the condition of the line is provided and additionally, the visual indication provides an indication of the traffic level in the network.
    Type: Grant
    Filed: March 10, 1994
    Date of Patent: September 13, 1994
    Assignee: Tut Systems, Inc.
    Inventor: Martin H. Graham
  • Patent number: 5329238
    Abstract: The invention is directed to an arrangement for monitoring an electric consumer in a motor vehicle. The consumer can be actuated by at least one pulse-shaped control signal formed by a control unit with this actuation taking place via a switching device. This arrangement includes a device for detecting electric variables in the region of the consumer and a device for comparing these variables to pregiven limit values as well as a device for recognizing a fault on the basis of this comparison. The device for recognizing faults evaluates the comparison result for recognizing a fault condition pursuant to the actuating state of the electric consumer.
    Type: Grant
    Filed: July 31, 1992
    Date of Patent: July 12, 1994
    Assignee: Robert Bosch GmbH
    Inventors: Michael Hofsass, Martin Rutz, Harald Schweren
  • Patent number: 5321363
    Abstract: A two-terminal circuit element measuring apparatus of the present invention is capable of distinguishing a loose connection between a DUT and the measuring apparatus from a high impedance in the DUT. The measuring apparatus is also capable of measuring the impedance of the DUT without altering the connections between the DUT and the measuring apparatus. The measuring apparatus applies both DC and AC current signals to the DUT so as to compensate any leakage current occurring within the three-wire cable connecting the DUT and the measuring apparatus. Because of the compensation, when both DC and AC current ammeters indicate substantially zero values, it is assured that a loose connection exists.
    Type: Grant
    Filed: January 8, 1993
    Date of Patent: June 14, 1994
    Assignee: Hewlett-Packard Company
    Inventors: Hideki Wakamatsu, Nobuo Nakata, Yohichi Kuboyama, Hideshi Tanaka
  • Patent number: 5302905
    Abstract: A device for measuring and isolating noise-creating imbalances in a paired telecommunications line has an internal circuit which includes a pair of substantially balanced ac current outlet pathways and a pair of high voltage bias pathways in parallel. An oscillator in the circuit generates a low voltage longitudinal ac signal that is transmitted across the balanced pathways and a dc power source simultaneously generates a high voltage dc signal that is transmitted across the high voltage bias pathways. Both signals are further transmitted to the paired line where it is the function of the high voltage dc signal to punch through any concealed faults in the line. In contrast, the low voltage ac signal travels the length of each conductor in the line and returns to the circuit as a metallic voltage signal. If there is any imbalance between the two conductors, the metallic voltage signals for the two conductors will be different.
    Type: Grant
    Filed: September 23, 1992
    Date of Patent: April 12, 1994
    Assignee: Tempo Research Corporation
    Inventor: Robert G. Crick
  • Patent number: 5260664
    Abstract: An apparatus for monitoring and testing a twisted pair, particularly useful for an Ethernet network. First and second DC currents alternated with one another are applied to both ends of the line, asynchronously. By monitoring the potential on the line, a determination is made as to the condition of the line. For example, shorted, crossed, improperly terminated or open conditions can be detected. A visual indication of the condition of the line is provided and additionally, the visual indication provides an indication of the traffic level in the network.
    Type: Grant
    Filed: January 12, 1993
    Date of Patent: November 9, 1993
    Assignee: Tutankhamon Electronics, Inc.
    Inventor: Martin H. Graham
  • Patent number: 5255021
    Abstract: In an ink-jet printer of the type wherein a current is passed through a conductive ink contained between a pair of electrodes to cause the ink to become vaporized and cause trapped gasses or bubbles to expand suddenly, exerting a sufficient pressure upon the ink to force droplets of ink from a nozzle, a current value flowing between the electrodes is detected to determine the amount of wear of the electrodes, and when the detected current value is lower than a predetermined value, an alarm indicative of the replacement of the currently used ink-jet head is given and, at the same time, ejection of the ink from the nozzle is stopped. Thus, printing operation is always achieved with stable ejection of ink, guaranteeing high printing qualities.
    Type: Grant
    Filed: April 1, 1992
    Date of Patent: October 19, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tomoyuki Noguchi, Mitsuhide Matsuda, Tadashi Shiraishi, Hideaki Horio
  • Patent number: 5179341
    Abstract: A system and method for detecting an improperly terminated network for networks using a collision detection access scheme. Embodiments of the present invention also contemplate a system and method for detecting a short circuit in a network. For detecting both an improperly terminated network and a short circuit in a network, the present invention relies on the detection of certain changes in the voltage of the network.
    Type: Grant
    Filed: June 28, 1991
    Date of Patent: January 12, 1993
    Assignee: Hewlett-Packard Company
    Inventor: Charles H. Whiteside
  • Patent number: 5172289
    Abstract: An automatic insulation tester tests the insulation resistance of electrical equipment when the electrical equipment is inoperative. The automatic insulation tester is automatically rendered operative when the electrical equipment is inoperative, and is automatically rendered inoperative when the electrical equipment is operative. The automatic insulation tester applies a voltage on the order of the rated voltage of the electrical equipment to the electrical equipment and measures and displays the insulation resistance of the electrical equipment. When the insulation resistance falls below a predetermined value, an indicator is activated, and remains in an activated state until the insulation resistance of the electrical equipment rises above the predetermined value and the automatic insulation tester is manually reset.
    Type: Grant
    Filed: February 26, 1992
    Date of Patent: December 15, 1992
    Inventor: Richard J. Zelm
  • Patent number: 5162742
    Abstract: A method for locating electrical short circuits in an electronic substrate containing a plurality of conductive paths. A pair of shorted paths is identified and a current signal is applied thereto. Simultaneously, the voltage across the shorted paths is measured. The current signal is then increased in incremental steps until the voltage starts to vary nonlinearly with respect to the current signal. A temperature differential is then created between the substrate as a whole and small sectors of the substrate until the measured nonlinear relationship between current and voltage reverses in the direction of resuming a linear relationship. The small sector which caused the voltage to respond to the temperature differential is then identified, thereby identifying the approximate location of the short circuit.
    Type: Grant
    Filed: January 29, 1992
    Date of Patent: November 10, 1992
    Assignee: International Business Machines Corporation
    Inventors: Nathan W. Atkins, Philip J. Davies, Gary P. Suback
  • Patent number: 5157336
    Abstract: A device for measuring and isolating noise-creating imbalances in a paired telecommunications line has an internal circuit which includes a pair of substantially balanced ac current outlet pathways in parallel, a differential amplifier connected to a pair of voltage inlet pathways, and an oscillator to supply longitudinal alternating current to the paired line across the balanced pathways. A longitudinal alternating current signal is sent from the oscillator to each conductor of the line across the outlet pathways, travels the length of each conductor and returns to the inlet pathways as a metallic voltage signal. If there is any imbalance between the two conductors, the metallic voltage signals for the two conductors will be different. Accordingly, the differential amplifier measures this difference and it is displayed in units of noise or balance.
    Type: Grant
    Filed: March 18, 1991
    Date of Patent: October 20, 1992
    Assignee: Tempo Research
    Inventor: Robert G. Crick
  • Patent number: RE34159
    Abstract: An electric motor controller comprises a circuit for selecting between driving and braking an electric motor in accordance with the health or otherwise of a pair of main electric motor control switches (14 and 16). In a preferred embodiment the health of the switch is determined by the voltage (A) between the switches. The controller also comprises apparatus for detecting the sense of movement of the motor. In the event that the motor is moving in a sense opposite to that selected, the apparatus increase field current to reduce the armature current thereby increasing the braking effect of the motor. Also in the controller are apparatus for changing from armature to field current control and vice versa, in response to a given magnitude of control signal. In order to provide an unambiguous change-over, a lockout circuit is provided to inhibit change-over in a transition region. The lockout circuit maintains the mode of control to above/beneath the change-over level when changing from one level to another.
    Type: Grant
    Filed: February 28, 1992
    Date of Patent: January 12, 1993
    Assignee: Chloride Group Public Limited Co.
    Inventors: Christopher A. Harrington, Dennis M. Jones