Combining Of Plural Signals Patents (Class 327/355)
  • Publication number: 20120268190
    Abstract: An apparatus and method for generating complementary periodic signals for a mixer circuit is provided. The apparatus comprises first and second generation circuits each for generating a periodic signal with a transition time on each rising edge different than a transition time on each falling edge. Each of the first and second generation circuits has an output for supplying its periodic signal to a mixer such that each rising edge of a periodic signal from one of the circuits crosses each falling edge of a periodic signal from the other of the circuits at a crossing point below a turn on voltage of the mixer.
    Type: Application
    Filed: April 19, 2011
    Publication date: October 25, 2012
    Applicant: Icera Inc.
    Inventors: Abdellatif Bellaouar, See Taur Lee
  • Publication number: 20120262216
    Abstract: According to some embodiments, an up-conversion mixer includes a mixer cell having an output node arranged to provide an output. An input stage is coupled to the mixer cell and arranged to receive an input signal. The mixer cell is configured to generate the output with an up-converted frequency compared to an input frequency of the input signal. The input stage is configured to reduce a third order harmonic term of the output so that an output power plot of the third order harmonic term with respect to an input power has a notch with a local minimum.
    Type: Application
    Filed: April 12, 2011
    Publication date: October 18, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Huan-Neng CHEN, Ying-Ta LU, Mei-Show CHEN, Chewn-Pu JOU
  • Patent number: 8289061
    Abstract: A method is provided for improving clock recovery signal jitter in digital communication based on a phase adjustment technique in a phase interpolation. A clock signal is expressed as the combination of two sinusoidal signals. The phase interpolating process determines the amplitude of the first sinusoidal signal, and the amplitude of the second sinusoidal signal that is 90° out of phase from the first sinusoidal signal. The clock signal is then formed by combining first sinusoidal signal with the second sinusoidal signal by choosing the first and second amplitude such that the amplitude of the clock signal is substantially a constant. Modulation of the clock signal amplitude is significantly improved by the disclosed technique over the conventional technique when the sum of the first and second amplitudes of the two sinusoidal functions is kept a constant.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: October 16, 2012
    Assignee: Integrated Device Technology, Inc.
    Inventors: Hui Wang, Lixin Jiang
  • Publication number: 20120256676
    Abstract: A driver circuit for supplying a drive signal to a mixer circuit comprising a first and second circuit branch and an operational amplifier. The first circuit branch receives an input signal and a bias signal. The second circuit branch receives the input signal. The operational amplifier has a first input connected to a junction node of the first circuit branch and a second input connected to a junction node of the second circuit branch. The operational amplifier is arranged to provide an operational amplifier output signal a second component of the second circuit branch so that a voltage at the junction node of the second circuit branch is equal to a voltage at the junction node of the first circuit branch. The voltage is dependent on the input signal and providing the drive signal.
    Type: Application
    Filed: April 8, 2011
    Publication date: October 11, 2012
    Applicant: Icera Inc.
    Inventors: Abdellatif Bellaouar, See Taur Lee
  • Publication number: 20120249212
    Abstract: A system includes a first external mounted amplifier (EMA) having a first low-noise amplifier (LNA) coupled to a first antenna, a second EMA having a second LNA coupled to a second antenna, a first splitter coupled between the first antenna and the first LNA, a first phase shifter coupled to the first splitter, and a second mixer coupled to the first phase shifter. The first LNA is operable to receive a first input signal from first antenna. The second LNA is operable to receive a second input signal from second antenna. The first splitter is operable to derive a first sampling signal from first signal. The first phase shifter is operable to shift the phase of first sampling signal to create a second cancelation signal. The second mixer is operable to mix a second input signal derived from second signal with second cancelation signal to create a second output signal.
    Type: Application
    Filed: March 28, 2011
    Publication date: October 4, 2012
    Applicant: ADC TELECOMMUNICATIONS, INC.
    Inventors: Larry G. Fischer, David Willey, Chad Boeckman
  • Patent number: 8275332
    Abstract: An apparatus comprising a plurality of switchable full step mixer unit cells, wherein each switchable full step unit cell is configured to, when the full step transceiver mixer unit cell is turned on, increase the gain experienced by an electronic signal by a full step increment, and wherein the step increment is substantially constant regardless of temperature; and at least one switchable partial step mixer unit cell configured to, when the partial step transceiver mixer unit is turned on, increase the gain experienced by the electronic signal by a predetermined step increment less than that of a full step, and wherein the partial step increment is substantially constant regardless of temperature.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: September 25, 2012
    Assignee: Broadcom Corporation
    Inventors: Ahmad Mirzaei, Alireza Zolfaghari, Hooman Darabi
  • Patent number: 8269546
    Abstract: A modulator drive circuit provides a modulator drive signal, representative of a data waveform, to modulate an optical signal for transport across a network infrastructure. The modulator drive circuit includes a broadband Bias-T circuit insensitive to the frequency range of the data waveform. The Bias-T circuit provides for an adjustable bias level to maintain proper operation of a modulator used to modulate the optical signal. One or more modulator drive circuits may be provided on a single substrate.
    Type: Grant
    Filed: September 27, 2009
    Date of Patent: September 18, 2012
    Assignee: Infinera Corporation
    Inventor: Babak Behnia
  • Publication number: 20120212282
    Abstract: Disclosed are methods, circuits and systems for modulating supply voltage to a power amplifier. An input voltage signal may be received and used to drive a switching regulator (or the like), which regulator may be adapted to modulate (convert) battery supply voltage into a supply voltage of an amplifier. An output signal combining stage may include a signal combiner which may be adapted to combine a modulated battery supply voltage (i.e. modulated by the input voltage) with a residual error correction signal (RECS). The residual error correction signal may be based on an estimate of the switching regulator characteristics. The estimate may be at least partially based on feedback from an output of the regulator. The estimate may be at least partially based on a prediction model of the switch regulator.
    Type: Application
    Filed: February 20, 2011
    Publication date: August 23, 2012
    Applicant: RIO SYSTEMS LTD
    Inventor: Solon Jose Spiegel
  • Patent number: 8249537
    Abstract: A noise cancellation circuit for a mixer device includes a first signal terminal, coupled to a first output terminal, and a second signal terminal, coupled to a second output terminal of the RF input stage of the mixer device, a first variable current source with a first end coupled to the first signal terminal, a second end coupled to the second signal terminal, and a third end coupled to a first voltage source, a second variable current source with a first end coupled to the second signal terminal, a second end coupled to the first signal terminal, and a third end coupled to the first voltage source, and a phase shift device coupled to the first signal terminal and the second end of the second variable current source, transforming a first signal into a second signal, and outputting to the second end of the second variable current source.
    Type: Grant
    Filed: November 9, 2008
    Date of Patent: August 21, 2012
    Assignee: NOVATEK Microelectronics Corp.
    Inventor: Chih-Hsun Yang
  • Patent number: 8248138
    Abstract: The present invention relates to a method and an apparatus, during a phase switching process, for choosing all of outputted phases upon the clock phases devoid of phase switching so as to avoid glitches during clock switching. Compared with the conventional approach for removing glitches by controlling a clock switching sequence, an improvement of a phase rotator is further disclosed in the present invention, which eliminates the glitches of the outputted phase clock so as to realize a glitch-less phase switching in a phase interpolation circuit.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: August 21, 2012
    Assignee: Realtek Semiconductor Corp.
    Inventor: Ye Liu
  • Publication number: 20120200333
    Abstract: A multiplier circuit including; a 90 degrees coupler that divides an input signal into a first input signal and a second input signal of which phase difference of a base wave is 90 degrees; a first transistor that receives the first input signal and outputs a first output signal including at least a doubled wave and a tripled wave of the first input signal; a second transistor that receives the second input signal and outputs a second output signal including at least a doubled wave and a tripled wave of the second input signal; and a combiner that restrains leakage of the first output signal or the second output signal from one of the first transistor and the second transistor to the other, combines the first output signal and the second output signal, and outputs an output signal of the tripled wave.
    Type: Application
    Filed: February 9, 2012
    Publication date: August 9, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Koji Tsukashima
  • Publication number: 20120187999
    Abstract: An interpolation circuit adapted to receive a plurality of inputs is provided. The inputs include a first input group and a second input group. The interpolation circuit includes a first selecting channel, a second selecting channel, and an interpolation unit. The first selecting channel receives the first input group and outputs a first input of the first input group according to a selecting signal. The second selecting channel receives the second input group and the first input and outputs a second input of the second input group according to the selecting signal. The first selecting channel and the second selecting channel respectively output the first input or the second input. The interpolation unit is coupled to the first selecting channel and the second selecting channel, and receives the first input and the second input, and accordingly performs an interpolation to output an interpolation result.
    Type: Application
    Filed: March 10, 2011
    Publication date: July 26, 2012
    Applicant: NOVATEK MICROELECTRONICS CORP.
    Inventor: Ming-Chieh Lin
  • Patent number: 8222947
    Abstract: A signal converting circuit includes: a first single-to-differential circuit arranged to generate a first signal having a first polarity and a second signal having a second polarity different from the first polarity; a second single-to-differential circuit arranged to generate a third signal having the second polarity and a fourth signal having the first polarity; and a combining circuit arranged to generate a first combined signal having the first polarity according at least two signals from the first signal, the second signal, the third signal, and the fourth signal, and output an output signal according to at least the first combined signal.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: July 17, 2012
    Assignee: Rafael microelectronics, Inc.
    Inventors: Meng-Ping Kan, Sheng-Liang Liu
  • Patent number: 8219046
    Abstract: A RF transmitter is operable to transmit a signal at a frequency specified by the Bluetooth protocol. A passive upconversion mixer, which comprises a pair of MOSFET switches, is utilized inside the RF transmitter. The passive upconversion mixer is operable to receive analog local oscillator (LO) signals to be utilized for controlling operation of each of the pair of MOSFET switches to transmit signals with maximum gain. A MOS threshold voltage VTH and a DC component of a received baseband signal, VBB—DC, are determined for each of the pair of MOSFET switches. The determined VTH and the determined VBB—DC of the received baseband signal are combined such as VTH+VBB—DC and compared with a DC component of the received LO signals, VLO—DC. The VLO—DC is set equal to VTH+VBB—DC, accordingly, to provide maximum gain from the passive upconversion mixer for signal transmission.
    Type: Grant
    Filed: June 3, 2009
    Date of Patent: July 10, 2012
    Assignee: Broadcom Corporation
    Inventor: Meng-An Pan
  • Publication number: 20120171973
    Abstract: Various embodiments of systems and methods for generating local oscillator (LO) signals for a harmonic rejection mixer are provided. One embodiment is a system for generating local oscillator (LO) signals for a harmonic rejection mixer. One such system comprises a local oscillator, a divide-by-N frequency divider, a divide-by-three frequency divider, and a harmonic rejection mixer. The local oscillator is configured to provide a reference frequency signal. The divide-by-N frequency divider is configured to divide the reference frequency signal by a value N and provide an output signal. The divide-by-three frequency divider is configured to receive the output signal of the divide-by-N frequency divider and divide the output signal into three phase-offset signals. The harmonic rejection mixer is configured to receive the three phase-offset signals and eliminate third frequency harmonics.
    Type: Application
    Filed: March 14, 2012
    Publication date: July 5, 2012
    Applicant: SKYWORKS SOLUTIONS, INC.
    Inventors: Rajasekhar Pullela, Dmitriy Rozenblit, Hamid Firouzkouhi
  • Patent number: 8212602
    Abstract: A system and method for signal mixing using high-order harmonics of a local oscillation (LO) signal. In a radio frequency (RF) system, the input RF signal is converted to a lower frequency signal such as an intermediate frequency (IF) signal or a baseband signal for further processing. A voltage controlled oscillator (VCO) is often used to generate a VCO signal which is then divided down to provide the needed LO signals for down conversion. The present invention discloses a system and method for generating a composite harmonic signal based on a linear combination of divided down LO signals with specific phase shifts. Consequently a VCO signal with lower frequency can be used to conserve power. The composite harmonic signal is mixed with the input RF signal to generate a series of mixed signal including one associated with a high-order harmonic of the divided down LO signal.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: July 3, 2012
    Assignee: Quintic Holdings
    Inventors: Hao Meng, Peiqi Xuan
  • Publication number: 20120161844
    Abstract: A post-mixer amplifier device which receives and processes signals for use in a software-defined radio integrated circuit is provided. The post-mixer amplifier device includes but is not limited to a voltage amplifier having first and second inputs and a first output, a positive signal output connected with the first output of the voltage amplifier, and a positive signal input connected with a first bipolar junction transistor along a first pathway. The first bipolar junction transistor includes but is not limited to a first collector connected with a the first input of the voltage amplifier and a first emitter connected with an second output of the push-pull unity gain follower and forming a first current feedback pathway. The first bipolar junction transistor is driven with a passive resistive load.
    Type: Application
    Filed: December 28, 2010
    Publication date: June 28, 2012
    Applicant: MOTOROLA SOLUTIONS, INC.
    Inventors: CHONG HIN CHEE, PAUL H. GAILUS, SHAFIULLAH SYED
  • Patent number: 8204467
    Abstract: The second-order inter-modulation distortion, originating in a differential passive mixer core from imbalance between devices, is reduced by compensating for the mismatch or load, by means of tuning the differential output impedance at the mixer core, or the input impedance of a filter coupled to the output of the passive mixer. Compensating for the imbalance allows greater suppression of even-order harmonics in the differential structure, which reduces second-order intermodulation at the output of the mixers. The compensation is achieved by tunable resistive elements that are calibrated by a built-in self-test architecture. The calibration circuit is deactivated during receiver operation.
    Type: Grant
    Filed: February 10, 2009
    Date of Patent: June 19, 2012
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Fredrik Tillman, Fenghao Mu
  • Patent number: 8198933
    Abstract: A double balanced mixer circuit comprising a differential pair of first amplifier elements responsive to an RF differential input signal, double differential pairs of second amplifier elements responsive to an LO differential input signal, and differential output terminals connected with the second amplifier paths. Coupling elements provide first and second parallel DC connections between DC voltage supply rails for the first and the double second amplifier paths respectively and a series RF connection of the first and second amplifier paths between the supply rails so as to produce a mixed differential amplified signal at the differential output terminals. The coupling elements include respective transmission lines in the first amplifier paths connected between one of the DC voltage supply rails and respective ones of the first amplifier elements and a common transmission line connected between the other of the DC voltage supply rails and both the first amplifier elements.
    Type: Grant
    Filed: February 18, 2008
    Date of Patent: June 12, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Trotta Saverio
  • Publication number: 20120126877
    Abstract: An in-phase, quadrature phase (IQ) mixer for a near field communications (NFC) device is disclosed that includes a signal provider that provides an in-phase (I) mixing signal and a quadrature phase (Q) mixing signal so that the period of the I mixing signal is equal to a period for the Q mixing signal. A controller is configured to control the signal provider so that the average of the I mixing signal over two periods is minimized and the average of the Q mixing signal over two periods is also minimized. The controller is also configured to control the signal provider so that the average propagation delay for the I mixing signal and the Q mixing signal is minimized individually and relative to each other.
    Type: Application
    Filed: February 25, 2010
    Publication date: May 24, 2012
    Applicant: INNOVISION RESEARCH & TECHNOLOGY PLC
    Inventor: Alastair Lefley
  • Patent number: 8179179
    Abstract: A semiconductor device includes a reset signal generator configured to change the number of activated signals among a plurality of reset signals according to a frequency of an external clock, a plurality of mixing control signal generators configured to generate a plurality of first and second mixing control signals, and a clock mixer configured to generate a mixing clock by mixing a first driving clock and a second driving clock, wherein the first driving clock is generated by driving a positive clock of the external clock according to the plurality of first mixing control signals, and the second driving clock is generated by driving a negative clock of the external clock according to the plurality of second mixing control signals.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: May 15, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Min-Su Park, Hoon Choi
  • Patent number: 8179185
    Abstract: A sampling mixer includes TAs (transconductance amplifiers), an in-phase mixer section connected to the TA and the TA, an opposite-phase mixer section connected in parallel with the in-phase mixer section, and a signal generator for generating a control signal for the in-phase mixer section and the opposite-phase mixer section respectively. The IIR filter using signals that underwent a current conversion by using the different transconductances is constructed, so that the filter characteristic can be designed by a weighting of the transconductance in addition to a capacitance ratio. As a result, the wide-band filter characteristic and the band-pass filter characteristic can be obtained, and deterioration of the receiving sensitivity can be suppressed by designing the filter characteristic suitable for the radio communication system.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: May 15, 2012
    Assignee: Panasonic Corporation
    Inventors: Yoshifumi Hosokawa, Noriaki Saito, Katsuaki Abe, Kentaro Miyano, Yasuyuki Naito
  • Publication number: 20120105126
    Abstract: The present invention refers to a device for storing and retrieving one or more binary digits or for increasing persistence time of memory storage for one or more binary digits through Stochastic Resonance, comprising: a. a circuit with at least one bistable element; b. means for introducing an input signal into the circuit; c. means for introducing an adequate amount of noise signal into the circuit and/or means for adjusting the thresholds of the bistable elements and/or means for adjusting the output levels of the bistable elements, whereby the input signal, added to the noise signal, surpasses the transition thresholds, and d. means for detecting the output signal state. The invention is based on the surprising fact that it is possible to store one or more binary digits in a system capable of using existing and inevitable noise in the system advantageously for storage purposes.
    Type: Application
    Filed: October 29, 2010
    Publication date: May 3, 2012
    Inventors: Roberto Pedro José PERAZZO, Diego Fernando Grosz, Pablo Ignacio Fierens, Santiago Agustín Ibáñez, Germán Agustín Patterson
  • Patent number: 8164380
    Abstract: A sampling filter of such circuitry as not requiring a high frequency REF signal even if the number of decimation is decreased. In the sampling filter, the rotate capacitor in each switched capacitor circuit including Cr (7a-7d) arranged in four parallel arrays operates in four phases of integration, discharge, reset and feedback different from each other at the same timing. Consequently, a control signal for driving the switched capacitor circuit is used commonly. As a result, the circuit scale of a DCU (104) is reduced and the frequency of the REF signal can be lowered to the frequency of an LO signal even in operation without decimation.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: April 24, 2012
    Assignee: Panasonic Corporation
    Inventors: Yoshifumi Hosokawa, Noriaki Saito, Kentaro Miyano, Katsuaki Abe
  • Publication number: 20120086595
    Abstract: A Mixer structure (210) for Doppler radar applications and a Doppler radar sensor (30) having an oscillator input port (LO) for output signals from an electric oscillator (32), having a radio frequency input port (RF) for output signals from receiving means (34), having an output port (IF) for an overall output intermediate signal produced in the mixer structure (210) and having two mixer branches (12a, 12b) each with a diode (18a, 18b), The mixer branches (12a, 12b) are connected to the oscillator input port (LO) and to the radio frequency input port (RF) in such a manner that intermediate signals (IF1, IF2), which are produced in these mixer branches (12a, 12b) and correspond to a Doppler shift between the oscillator signal and the radio frequency signal, are processed to the overall output signal.
    Type: Application
    Filed: October 13, 2011
    Publication date: April 12, 2012
    Applicant: BEA s.a.
    Inventor: YVES BORLEZ
  • Patent number: 8149955
    Abstract: A receiver arrangement includes a single ended multiband feedback amplifier, at least one single ended input, differential output mixer arrangement including a main mixer and a trim mixer, and a mixer feedback loop circuit configured to receive differential output signals generated by the mixer arrangement. The mixer feedback loop circuit generates a feedback signal based on the received differential output signals and provides the feedback signal to the mixer arrangement to minimize DC-offset and second order intermodulation products. The single ended multiband feedback amplifier may include an input stage and a programmable resonance tank circuit connected to the input stage for suppressing downconverted noise from harmonics of the LO-frequency, and a configurable feedback net that shapes the frequency response of a feedback loop including the feedback net based on a band operation of the single ended multiband feedback amplifier.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: April 3, 2012
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventor: Tobias Tired
  • Publication number: 20120075034
    Abstract: Doppler-inspired methods for signal generation and frequency up-conversion are provided that are compatible with CMOS technology. In accordance with an embodiment, a circuit is provided that includes two input signals that can propagate on artificial transmission lines in opposite directions, resembling the relative movement of source and observer in Doppler frequency shift; and an output signal combiner. By controlling the characteristics of the transmission lines and the input signal frequencies, the harmonic generation of active devices is utilized and combined to provide the desired high-frequency component at the output.
    Type: Application
    Filed: September 28, 2010
    Publication date: March 29, 2012
    Applicant: Cornell University
    Inventors: EHSAN AFSHARI, Omeed Momeni
  • Patent number: 8143933
    Abstract: A semiconductor integrated circuit includes a mixer circuit unit having a first single gate mixer configured to receive a first input signal having a first frequency and a second input signal having a second frequency as inputs, a second single gate mixer configured to receive the first input signal and a third input signal of a phase inverted from a phase of the second input signal as inputs, a third single gate mixer configured to receive a fourth input signal of a phase inverted from the phase of the first input signal and the second input signal as inputs, and a fourth single gate mixer configured to receive the third and the fourth input signals as inputs; and a ½-frequency divider unit configured to receive output signals from the first to the fourth single gate mixers as inputs and output a desired signal.
    Type: Grant
    Filed: March 15, 2010
    Date of Patent: March 27, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jun Deguchi, Daisuke Miyashita
  • Publication number: 20120071111
    Abstract: In accordance with embodiments of the present disclosure, a merged filter-transconductor-upconverter for use in a wireless communication device is provided.
    Type: Application
    Filed: September 22, 2010
    Publication date: March 22, 2012
    Inventors: Omid Oliaei, Julian Aschieri
  • Patent number: 8138817
    Abstract: An electronic device comprising a passive harmonic-rejection mixer. The passive harmonic rejection mixer has an input connected to several sub-mixer stages, and the sub-mixer stages are connected to a summing module for generating the output. Each sub-mixing stage comprises a gating module and a respective amplifier, the gating module adapted to selectively pass the input signal or the input signal with inverted polarity under the control of control signals.
    Type: Grant
    Filed: October 29, 2008
    Date of Patent: March 20, 2012
    Assignee: NXP B.V.
    Inventors: Johannes Hubertus Antonius Brekelmans, Gerben Willem De Jong, Rachid El Waffaoui, Dennis Jeurissen, Jan Van Sinderen, Simon W K Lee
  • Publication number: 20120062304
    Abstract: The invention discloses a mixer circuit (10, 20, 30, 410, 60) comprising a first mixer component (11, 21) with a first (13, 23) and a second (12, 22) input port for a first and a second input signal respectively and an output port (14, 24) for outputting a mixed signal. According to the invention, the mixer circuit (10, 20, 30, 410, 60) also comprises a transformer (15) which connects the first (13, 23) and second (12, 22) input ports of the mixer component (11, 21) inductively via an inverting coupling. In one embodiment, the mixer circuit (30, 410, 60) also comprises inputs for DC-bias of one (13) of the input ports and of the output port (14), as well as an impedance (31) as a filter at the output port.
    Type: Application
    Filed: May 20, 2009
    Publication date: March 15, 2012
    Inventor: Mingquan Bao
  • Publication number: 20120065714
    Abstract: The present invention relates to a radiofrequency (RF) hyperthermia device for capacitive coupling comprising a radiofrequency source, an amplifier, a sensor, a feedback amplifier and a modulation signal generator, wherein the radiofrequency source produces a source signal which is modulated by the modulation signal generator, amplified by the amplifier and directed to a target, the sensor receives a feed back signal from the target that is directed to the feed back amplifier, wherein the feedback signal is amplified by the feedback amplifier and modulates the source signal to generate a target modified signal. This radiofrequency (RF) hyperthermia device is designed for increasing the selectivity of the hyperthermia treatment.
    Type: Application
    Filed: October 13, 2009
    Publication date: March 15, 2012
    Inventors: Andras Szasz, Oliver Szasz, Nora Iluri
  • Publication number: 20120056658
    Abstract: A combiner includes N coaxial cables each configured to connect to a respective output of N radio frequency power amplifiers, where N is an integer greater than one. Each of the N coaxial cables is configured to receive an amplified radio frequency signal from a respective one of the N radio frequency power amplifiers. A board includes capacitances and is configured to connect to each of the N coaxial cables and combine the radio frequency signals. The N coaxial cables and the capacitances provide N inductance and capacitance combinations. A connector is configured to connect an output of the board to a load.
    Type: Application
    Filed: August 31, 2011
    Publication date: March 8, 2012
    Applicant: MKS INSTRUMENTS, INC.
    Inventor: Christopher Michael Owen
  • Publication number: 20120049926
    Abstract: Disclosed is a harmonic rejection mixer that makes it possible to suppress high-frequency response, while keeping the number of gm elements from increasing. In a harmonic rejection mixer that regulates the waveform of an output signal by mixing outputs of multiple mixers that are connected in parallel with the latter stage of multiple gm elements, some of the gm elements are shared by I phase and Q phase by using a control signal with a duty ratio of less than 50% to drive at least some of the mixers, and then using the period in which the I-phase mixers are inactive to activate the Q-phase mixers.
    Type: Application
    Filed: January 29, 2010
    Publication date: March 1, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Yoshito Shimizu, Noriaki Saito, Kiyomichi Araki, Takafumi Nasu
  • Publication number: 20120049927
    Abstract: Circuits, methods, sub-systems and systems including adaptive analog subtraction for light sensing are described herein. In an embodiment, an analog circuit including a current mirror is configured to replicate a first current to produce a replicated version of the first current, and to subtract the replicated version of the first current from a second current to produce a third current. A mismatch correction circuit is configured to produce an adjustment signal, indicative of a mismatch error associated with the analog circuit, based on a digital version of the third current. This adjustment signal is used to reduce the mismatch error associated with the analog circuit.
    Type: Application
    Filed: August 16, 2011
    Publication date: March 1, 2012
    Applicant: INTERSIL AMERICAS INC.
    Inventor: Kenneth C. Dyer
  • Publication number: 20120049928
    Abstract: In one embodiment of the invention, a method for convolution of signals is disclosed including generating four phased half duty cycle clocks each being out of phase by a multiple of ninety degrees from the others; coupling the four phased half duty cycle clocks into a four phase half duty cycle mixer; and switching switches in the four phase half duty cycle mixer in response to the four phased half duty cycle clocks to convolve a differential input signal with the four phased half duty cycle clocks to concurrently generate a differential in-phase output signal and a differential quadrature-phase output signal on a dual differential output port.
    Type: Application
    Filed: November 4, 2011
    Publication date: March 1, 2012
    Applicant: QUALCOMM Incorporated
    Inventor: Alberto Cicalini
  • Publication number: 20120038424
    Abstract: A broadband power combining method comprises the steps of converting desired voltage or current relation over a specified frequency band to specified polynomial transfer equation; steps of formulating the said specified polynomial transfer equation and extracting the coefficients of the denominator polynomial functions; steps of comparing the said voltage/current transfer function in first step with the design goal to decide if the design criteria is met; and a multiple-device power combining amplifier using same method is presented. This invention presents an automated method for the designing high power multiple-device amplifier based on a compact, robust and easily extendable combining circuit-synthesis method.
    Type: Application
    Filed: August 9, 2011
    Publication date: February 16, 2012
    Inventor: Yaohui Guo
  • Patent number: 8112058
    Abstract: A miniaturized dual-balanced mixer circuit based on a double spiral layout architecture is proposed, which is designed for use to provide a frequency mixing function for millimeter wave (MMW) signals, and which features a downsized circuit layout architecture that allows IC implementation to be more miniaturized than the conventional star-type dual-balanced mixer (DBM). The proposed miniaturized dual-balanced mixer circuit is distinguished from the conventional star-type DBM particularly in the use of a double spiral layout architecture for the layout of two balun circuit units. This feature allows the required layout area to be only about 15% of that of the conventional star-type DBM.
    Type: Grant
    Filed: February 24, 2009
    Date of Patent: February 7, 2012
    Assignee: National Taiwan University
    Inventors: Che-Chung Kuo, Huei Wang
  • Publication number: 20120019304
    Abstract: A transconductor circuit used in a mixer for canceling second-order inter-modulation distortion includes a first transistor and a second transistor, of which the base (gate) ends coupled to a first input end and a second input end, for receiving a differential input signal; and a negative feedback circuit, of which the input end coupled to the emitter (source) ends of the first transistor and the second transistor, of which the out end coupled to the base (gate) ends of the first transistor and the second transistor, for adjusting the voltage of the base (gate) of the first transistor and the second transistor according to the difference between a reference voltage and the detected voltage of the emitter (source) of the first transistor and the second transistor.
    Type: Application
    Filed: January 13, 2011
    Publication date: January 26, 2012
    Applicant: MSTAR SEMICONDUCTOR, INC.
    Inventors: Min-Chiao Chen, Shuo Yuan Hsiao
  • Publication number: 20120019305
    Abstract: A signal converting device includes: a reference signal-mixing circuit arranged to generate a reference mixing output signal according to an input signal, a reference gain, and a reference local oscillating signal; a plurality of auxiliary signal-mixing circuits, each arranged to generate an auxiliary mixing output signal according to the input signal, an auxiliary gain, and an auxiliary local oscillating signal; and a combining circuit arranged to combine the reference mixing output signal and a plurality of the auxiliary mixing output signals to generate an output signal, and at least one of the auxiliary signal-mixing circuits is configured by the corresponding auxiliary gain to compensate phase imbalances between the reference mixing output signal and each of the auxiliary mixing output signals to reduce a power of a harmonic component in the output signal.
    Type: Application
    Filed: May 8, 2011
    Publication date: January 26, 2012
    Inventors: Huajiang Zhang, Chun Geik Tan
  • Publication number: 20120013388
    Abstract: Method and mixer using the method for mixing a complex digital input vector with an oscillator reference signal based on a separation of the mixing process in mainly two processing steps, to with a first step in which a set of n real part values Vi, is derived from said complex digital input vector in which n is an integer larger than 1 and in which each real part value Vi is proportional to the real part of the digital input vector when being rotated over predetermined phase angles ?i=?0+i*??, respectively, for a constant ?0, ?? corresponding to either 2?/n or ?2?/n, with integer i varying between 0 and n?1 and a second step, in which said n real part values and Vi are each consecutively selected to be coupled to a load.
    Type: Application
    Filed: March 29, 2010
    Publication date: January 19, 2012
    Inventor: Wouter E.S. Couzin
  • Publication number: 20120013387
    Abstract: An RF transmitter capable of transmitting over a wide range of frequencies includes a mixer, a wideband high-Q balun, a first driver amplifier and a second driver amplifier. The balun has a single primary winding and two secondary windings. A differential output of the mixer is coupled to the primary winding. A first of the two secondary windings is coupled to drive the first driver amplifier. A second of the two secondary windings is coupled to drive the second driver amplifier. One driver amplifier is used when transmitting at lower frequencies whereas the other driver amplifier is used when transmitting at higher frequencies. By appropriate sizing of the inductances of the secondary windings and by switching out one of the secondary windings at certain times, the balun is tunable to operate over the wide frequency range while having a high quality factor Q, thereby facilitating reduced power consumption while simultaneously meeting performance requirements.
    Type: Application
    Filed: July 15, 2010
    Publication date: January 19, 2012
    Applicant: QUALCOMM INCORPORATED
    Inventors: Janakiram G. Sankaranarayanan, Bhushan S. Asuri, Vinod V. Panikkath, Hongyan Yan, Himanshu Khatri, Maulin Bhagat
  • Publication number: 20120007650
    Abstract: A power combiner/divider having a waveguide, a plurality of amplifiers disposed on a supporting structure, a plurality of probes, each one having a first end electrically coupled to an output of a corresponding one of the plurality of amplifiers and a second end projecting outwardly from the supporting structure and into the waveguide. The probes are disposed in a common region of the waveguide. The region has a common electric field maximum within the waveguide. A first portion of the probes proximate the sidewalls have lengths different from a second portion of the probes disposed in a region distal from the sidewalls of the waveguide. The waveguide is supported by the support structure. The power combiner is a monolithic microwave integrated circuit structure.
    Type: Application
    Filed: May 9, 2011
    Publication date: January 12, 2012
    Applicant: Raytheon Company
    Inventors: Nicholas J. Kolias, Gabriel M. Rebeiz
  • Publication number: 20120001674
    Abstract: A plurality of power amplifiers are integrated into a semiconductor substrate and coupled to a corresponding first plurality of antennas on an adjacent first microwave substrate. A second microwave substrate carries a second plurality of antennas coupled to a combining network. The second microwave substrate is separated from the first microwave substrate to allow a free space combination of RF energy propagated by the first plurality of antennas.
    Type: Application
    Filed: July 5, 2011
    Publication date: January 5, 2012
    Applicant: Tialinx, Inc.
    Inventors: Farrokh Mohamadi, Mohsen Zolghadri, Mehran Mokhtari
  • Publication number: 20120001658
    Abstract: There is provided a modulation profile generator and spread spectrum clock generator including the modulation profile generator. The modulation profile generator includes an input signal generator that generates an input signal; a function calculator that outputs a function calculation result in the form of a square root graph by using the input signal as an input of a function; and a profile generator that generates a non-linear modulation profile based on the function calculation result. As a result, it is possible to effectively reduce electromagnetic interference.
    Type: Application
    Filed: February 24, 2011
    Publication date: January 5, 2012
    Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventors: Chul Woo Kim, Se Wook Hwang, Min Young Song
  • Patent number: 8089310
    Abstract: A charge domain filter circuit includes a first signal output portion, a second signal output portion, and an adder portion. The first signal output portion outputs a first signal that is sampled at a specified time interval. The second signal output portion outputs a second signal that is sampled at the same time interval as the first signal and at a different time. The adder portion adds the first signal and the second signal together and outputs the result. The second signal output portion is capable of selecting the time to sample the second signal from among a plurality of times.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: January 3, 2012
    Assignee: Sony Corporation
    Inventors: Sachio Iida, Atsushi Yoshizawa
  • Patent number: 8081937
    Abstract: An apparatus comprising a plurality of switchable full step mixer unit cells, wherein each switchable full step unit cell is configured to, when the full step transceiver mixer unit cell is turned on, increase the gain experienced by an electronic signal by a full step increment, and wherein the step increment is substantially constant regardless of temperature; and at least one switchable partial step mixer unit cell configured to, when the partial step transceiver mixer unit is turned on, increase the gain experienced by the electronic signal by a predetermined step increment less than that of a full step, and wherein the partial step increment is substantially constant regardless of temperature.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: December 20, 2011
    Assignee: Broadcom Corporation
    Inventors: Ahmad Mirzaei, Alireza Zolfaghari, Hooman Darabi
  • Patent number: 8076964
    Abstract: A sampling circuit for use in a semiconductor device, includes a first sampling unit configured to sample a data signal in synchronism with a reference clock signal and output a first output signal, a second sampling unit configured to sample a delayed data signal in synchronism with the reference clock signal and output a second output signal, and an output unit configured to combine the first and second output signals and output a sampling data signal.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: December 13, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Ji-Wang Lee, Yong-Ju Kim, Sung-Woo Han, Hee-Woong Song, Ic-Su Oh, Hyung-Soo Kim, Tae-Jin Hwang, Hae-Rang Choi, Jae-Min Jang, Chang-Kun Park
  • Patent number: 8072255
    Abstract: In one embodiment of the invention, a method for convolution of signals is disclosed including generating four phased half duty cycle clocks each being out of phase by a multiple of ninety degrees from the others; coupling the four phased half duty cycle clocks into a four phase half duty cycle mixer; and switching switches in the four phase half duty cycle mixer in response to the four phased half duty cycle clocks to convolve a differential input signal with the four phased half duty cycle clocks to concurrently generate a differential in-phase output signal and a differential quadrature-phase output signal on a dual differential output port.
    Type: Grant
    Filed: January 7, 2008
    Date of Patent: December 6, 2011
    Assignee: QUALCOMM Incorporated
    Inventor: Alberto Cicalini
  • Publication number: 20110291734
    Abstract: A configurable calculating circuit includes a multiplexer, a mixer and an accumulator. The multiplexer is for receiving input signals including at least a first and a second input signals, and selectively outputting at least one of the input signals. The mixer is for mixing a selected input signal outputted from the multiplexer with a local oscillation signal to generate a mixed signal. The accumulator is for accumulating the mixed signal to generate an accumulated signal. When the configurable calculating circuit is operated under a first mode, the multiplexer selects the first input signal, and the accumulator performs a first accumulating operation upon the mixed signal; and when the configurable calculating circuit is operated under a second mode, the multiplexer selects the second input signal, and the accumulator performs a second accumulating operation, different from the first accumulating operation, upon the mixed signal.
    Type: Application
    Filed: June 1, 2010
    Publication date: December 1, 2011
    Inventors: Chun-Nan Chen, Wen-Chieh Tsai, Kuan-I Li