Abstract: According to certain embodiments, an apparatus comprises port interfaces, charge storage devices, and a charge combiner coupled to a circuit board. Each charge storage device is associated with a port interface. Each port interface receives a current of charge from a device under test and pumps the charge to an associated charge storage device at a predetermined rate. Each charge storage device stores the charge from an associated port interface. The charge combiner combines the charge from the charge storage devices to yield a combined charge and feeds the combined charge to an output regulator.

Abstract: The present invention discloses a mixer comprising with an input stage (100) for receiving and amplifying input signals (VINP, VINN) and an output stage (300) for outputting output signals (Voutp, Voutn). A switching stage (200) is coupled between the input stage (100) and the output stage (300), the switching stage (200) mixing the amplified input signals with a local oscillator signal (vlop, vlon) to produce the output signals (Voutp, Voutn) at the output stage (300). An RC circuit (cop, rop; con, ron) is connected to the output stage (300) and adapted to move the pole of the output signals.

Abstract: A miniaturized dual-balanced mixer circuit based on a multilayer double spiral layout architecture is proposed, which is designed for use to provide a frequency mixing function for millimeter wave (MMW) signals, and which features a downsized circuit layout architecture that allows IC implementation to be more miniaturized than the conventional star-type dual-balanced mixer (DBM). The proposed miniaturized dual-balanced mixer circuit is distinguished from the conventional star-type DBM particularly in the use of a 3-dimensional double-spiral circuit layout architecture for the layout of two balun circuit units. This feature allows the required layout area to be only about 15% of that of the conventional star-type DBM.

Abstract: A miniaturized dual-balanced mixer circuit based on a trifilar layout architecture is proposed, which is designed for use to provide a frequency mixing function for millimeter wave (MMW) signals, and which features a downsized circuit layout architecture that allows IC implementation to be more miniaturized than the conventional star-type dual-balanced mixer (DBM). The proposed miniaturized dual-balanced mixer circuit is distinguished from the conventional star-type DBM particularly in the use of a trifilar layout architecture for the layout of two balun circuit units. This feature allows the required layout area to be only about 20% of that of the conventional star-type DBM.

Abstract: Disclosed is a mixer able to simultaneously suppress self-mixing and low-order harmonic response in a charge sampling circuit. Specifically disclosed is a multiphase mixer provided with a transconductance amplifier (101) for converting a voltage signal into a current signal, an N number (where N is a natural number that is 2 or more) of first integrators (401, 402) which are connected in parallel to the subsequent stage of the transconductance amplifier (101), and a 2N number of mixers (102, 103, 104, 105) connected in parallel in pairs to the respective N number of first integrators (401, 402), wherein two mixers connected to the same first integrator of any of the N number of first integrators (401, 402) are controlled by driving signals comprised of pulse trains with the same frequency and phases differing by 180°.

Abstract: A first mixer circuit mixes a first center frequency signal with a first local oscillation signal to generate a second mixed signal, and mixes the first center frequency signal with a second local oscillation signal to generate a first mixed signal, and a second mixer circuit mixes a second center frequency signal with the first local oscillation signal to generate a fourth mixed signal, and mixes the second center frequency signal with the second local oscillation signal to generate a third mixed signal. An adder and subtracter circuit subtracts the third mixed signal from the second mixed signal to output a signal of subtraction result as a first upper side band signal, and adds the first mixed signal to the fourth mixed signal to output a signal of addition result as a second upper side band signal different in phase from the first upper side band signal by 90 degrees.

Abstract: A radio frequency (RF) mixing circuit including a quadrature mixer that receives non-overlapping in-phase and quadrature local oscillator (LO) signals, and a plurality of low noise amplifiers (LNAs) operatively connected to the quadrature mixer, the plurality of LNAs presenting an input impedance at a baseband. A first voltage at an input node of the quadrature mixer is equal to a second voltage across the impedance up-converted to a frequency of a LO signal received by the quadrature mixer. The second voltage across the LNA input impedance includes a frequency of an input signal of the quadrature mixer down-converted by a frequency of the in-phase and quadrature LO signals and filtered by the impedance. The quadrature mixer down-converts an input signal by a frequency of the in-phase and quadrature LO signals and transfers the noise cancelled impedance to a RF to achieve a noise cancelled match.

Abstract: A phase-interpolator circuit is described. In the phase-interpolator circuit, an output signal, having a fundamental frequency and a phase, is generated based on a weighted summation of a first reference signal and a second reference signal, where the first reference signal has the fundamental frequency and a first phase, and the second reference signal has the same fundamental frequency and a second phase. Note that contributions of the first reference signal and the second reference signal, respectively, to the output signal are determined based on associated first and second impedance values in a weighting circuit in the phase-interpolator circuit. For example, a programmable capacitance ratio of two capacitors may be used to interpolate between the first reference signal and the second reference signal.

Abstract: One embodiment relates to a mixer for providing a mixed output signal. The mixer includes a radio-frequency (RF) stage, first and second power dividers, and first and second frequency-conversion stages. The RF stage includes a first differential pair. The first power divider is coupled to a first transistor of the first differential pair, and the second power divider is coupled to a second transistor of the first differential pair. The first frequency-conversion stage, which is adapted to provide a first converted-frequency signal, includes a second differential pair coupled to the second power divider and a third differential pair coupled to the first power divider. The second frequency-conversion stage, which is adapted to provide a second converted-frequency signal, includes a fourth differential pair coupled to the second power divider and a fifth differential pair coupled to the first power divider. Other techniques are also provided.

Abstract: A magnetic resonance imaging (MRI) system includes a transmitter that produces an RF excitation pulse that is applied to a subject positioned in the MRI system to induce emission of at least one of an NMR signal and an ESR signal therefrom, and that produces a reference signal indicative of the phase of the RF excitation pulse. A first analog-to-digital converter has an input for receiving the reference signal that is synchronous with the RF excitation pulse. One or more additional analog-to-digital converters/processors have inputs for receiving the at least one of NMR signals and ESR signals produced by a subject placed in the MRI system and produce one or more complex digital signals therefrom. A normalizer is connected to receive and normalize the digital reference signal and a mixer is connected to receive the normalized digital reference signal and the digital signal. Accordingly, the mixer is operable to multiply the normalized complex digital reference signal with the complex digital signal.

Abstract: Aspects of a method and system for a shared GM-stage between in-phase and quadrature channels may include processing an in-phase (I) component signal for the I channel and a quadrature (Q) component signal for the Q channel via one or more shared transconductance stages in a frequency demodulator. The I channel may be isolated from the Q channel and the Q channel may be isolated from the I channel using isolation resistors. The values of the isolation resistors may be selected so as to balance the isolation and signal attenuation. A folding circuit, comprising active devices, may isolate the I channel from the Q channel. A generated voltage may be utilized to bias the folding circuit. An oscillator for the I channel may be isolated from a mixer for the Q channel and an oscillator for the Q channel may be isolated from a mixer for the I channel.

Abstract: A sampling mixer includes TAs (transconductance amplifiers), an in-phase mixer section connected to the TA and the TA, an opposite-phase mixer section connected in parallel with the in-phase mixer section, and a signal generator for generating a control signal for the in-phase mixer section and the opposite-phase mixer section respectively. The IIR filter using signals that underwent a current conversion by using the different transconductances is constructed, so that the filter characteristic can be designed by a weighting of the transconductance in addition to a capacitance ratio. As a result, the wide-band filter characteristic and the band-pass filter characteristic can be obtained, and deterioration of the receiving sensitivity can be suppressed by designing the filter characteristic suitable for the radio communication system.

Abstract: A phase-combining circuit for combining cyclic timing waveforms that have been phase-controlled by control signals based on three or more input signals of different phases, has a weight signal generating circuit and a weighting circuit. The weight signal generating circuit generates weights according to the control signals, and the weighting circuit gives the weights to the respective input signals, with a positive or negative polarity for each one signal.

Abstract: A distributed, diode mixer circuit includes a plurality of passive diode mixer cores including at least first and second passive diode mixer cores including doubly-balanced diodes in symmetrical balanced configuration forms, each mixer core having a pair of differential reference nodes driven by the reference signal and a pair of differential nodes driven by the data signal and a reactive impedance network including one or multiple reactive elements or transmission lines connected between the like nodes of each the first and second mixer cores.

Abstract: Provided is a frequency conversion mixer. The frequency conversion mixer includes a transconductance stage, a switching stage, a load stage, a current bleeding circuit, and a bias stage. The transconductance stage receives an RF signal, and outputs a current corresponding to a voltage of the RF signal. The switching stage switches the current which is outputted from the transconductance stage in response to a local oscillation signal, for frequency conversion the RF signal into an intermediate frequency (IF) signal. The load stage is connected between the switching stage and a supply voltage terminal. The current bleeding circuit is connected parallel with the switching stage, especially, embodying inverter structure with transconductance stage to get not only current bleeding effect but also current reuse effect, and one resonant inductor for reducing noise which is generated in parasitic capacitance at node between transconductance stage and switching stage.

Abstract: In one embodiment, the present disclosure includes a circuit comprising first and second transconductance stages that receive an RF signal and a current combiner circuit. The current combiner circuit couples current from the first transconductance stage to (i) one of a first output path or a second output path or (ii) both the first output path and second output path. The current combiner circuit decouples current from the second transconductance stage from both the first output path and second output path when the first transconductance stage couples current to one of the first output path or the second output path. The current combiner circuit couples current from the second transconductance stage to both the first output path and the second output path when the first transconductance stage couples current to both the first output path and the second output path.

Abstract: A radio frequency (RF) circuit includes a power supply configured to generate a plurality of voltages, a plurality of power amplifiers, each having an RF output port and a power supply input port, a switch network having a plurality of input ports coupled to the power supply and a plurality of switch network output ports coupled to the power supply input ports of the plurality of power amplifiers, wherein the switch network is configured to output selected ones of the plurality of voltages from the plurality of switch network output ports, at least two of the switch network output port voltages capable of being different ones of the plurality of voltages, and an RF power combiner circuit having a plurality of input ports coupled to RF output ports of the plurality of power amplifiers and an output port at which is provided an output signal of the RF circuit.

Abstract: An active filter circuit includes an inductance-capacitance (LC) circuit (110) for wireless frequency input, a bi-directional mixer (120) and a filter impedance (130) series-coupled across at least part of the LC circuit (110), and another mixer (420) coupled to at least some portion of the LC circuit. Other circuits, processes, receivers, transmitters and transceivers are disclosed.

Abstract: A phase interpolator system is disclosed that may include a clock to provide a clock signal, and a control section in communication with the clock to regulate the strength of the clock signal. The system may also include a generator circuit to produce an alternate clock signal based upon the strength of the clock signal received from the control section.

Abstract: A double-balanced mixer is provided having a shorting switch connecting the signal inputs to the mixer core. A timer circuit provides pulses to close the switch, thereby shorting those inputs at times when the switches of the mixer core are switching. This is done because non-linear components in the output are produced at those times and therefore they can be removed if the signal input is shorted at those times.

Abstract: A high frequency switching circuit, including a high frequency switching element. The high frequency switching element including a first channel terminal and a second channel terminal, wherein the high frequency switching element is configured to switchably route a high frequency signal via a channel path between the first channel terminal and the second channel terminal. The high frequency switching circuit further includes a power detection circuit, wherein the power detection circuit is configured to obtain a first measurement signal from the first channel terminal and a second measurement signal from the second channel terminal, and to combine the first measurement signal and the second measurement signal to derive, in dependence on both the first measurement signal and the second measurement signal, a power signal describing a power value of the high frequency signal routed via the channel path of the high frequency switching element.

Abstract: Disclosed are apparatus and methods for electronic signal conversion in which a power level of the signal is used to adjust the bias current of a converter.

Abstract: A power combining and outphasing system and related techniques for simultaneously providing both wide-bandwidth linear amplification and high average efficiency is described. Providing linear amplification encompasses the ability to dynamically control an RF output power level over a wide range while still operating over a wide frequency bandwidth. The system and techniques described herein also operate to maintain high efficiency across a wide range of output power levels, such that a high average efficiency can be achieved for highly modulated output waveforms.

Abstract: An amplifier is provided which includes: a first variable capacitance device of which capacitance is variable, a second variable capacitance device of which capacitance is variable, electrically connected to the first variable capacitance device, and of an inverse conductivity type from the first variable capacitance device, and a first input unit for selectively inputting a bias voltage and a voltage signal to the first variable capacitance device and the second variable capacitance device, wherein, in the event that the bias voltage and the voltage signal are input to the first variable capacitance device and the second variable capacitance device, the capacitance of the first variable capacitance device and the second variable capacitance device is taken as a first value, and wherein the voltage signal is amplified with the capacitance of the first variable capacitance device and the second variable capacitance device as a second value smaller than the first value.

Abstract: A signal converting circuit includes: a first single-to-differential circuit arranged to generate a first signal having a first polarization and a second signal having a second polarization different from the first polarization; a second single-to-differential circuit arranged to generate a third signal having the second polarization and a fourth signal having the first polarization; and a combining circuit arranged to generate a first combined signal having the first polarization according at least two signals from the first signal, the second signal, the third signal, and the fourth signal, and output an output signal according to at least the first combined signal.

Abstract: A frequency mixer or modulator circuit that is reconfigurable through electronic programming among active and passive operation, and/or harmonic and sub-harmonic operation, and/or up-conversion and down-conversion, and/or no-overlap, off-overlap, and on-overlap mixing, and/or upper-sideband modulation and lower-sideband modulation. In one example, the frequency mixer or modulator circuit also includes automatic gain control.

Abstract: A sampling mixer includes TAs (transconductance amplifiers), an in-phase mixer section connected to the TA and the TA, an opposite-phase mixer section connected in parallel with the in-phase mixer section, and a signal generator for generating a control signal for the in-phase mixer section and the opposite-phase mixer section respectively. The IIR filter using signals that underwent a current conversion by using the different transconductances is constructed, so that the filter characteristic can be designed by a weighting of the transconductance in addition to a capacitance ratio. As a result, the wide-band filter characteristic and the band-pass filter characteristic can be obtained, and deterioration of the receiving sensitivity can be suppressed by designing the filter characteristic suitable for the radio communication system.

Abstract: A mixer includes a transduction circuit, a first and a second switch circuit, and a first and a second load circuit. The transconductor circuit is for generating a differential current signal according to a differential voltage signal. The first switch circuit and the first load circuit are connected in series, and the first switch circuit is used to regulate the differential current signal in response to a first oscillator signal. The second switch circuit and a second load circuit are connected in series, and the second switch circuit is used to regulate the differential current signal in response to a second oscillator signal. The first load circuit and the second load circuit are connected at a common node to reduce harmonic interferences.

Abstract: A conversion device (CD) is dedicated to conversion of baseband analog I/Q input signals into RF signals in a transmitting path of a wireless communication equipment.

Abstract: A mixer is provided. The transconductance stage receives an input signal through an input node and outputs an output signal through an output node. The transconductance stage includes a first transistor coupled between the output node and a first power node, having a first gate coupled to the input node, and operating in a saturation region, a second transistor coupled to the first power node, having a second gate coupled to the input node, and operating in a sub-threshold region, a first biasing circuit providing a first bias voltage, and a third transistor coupled between the output node and the second transistor, and having a third gate coupled to the first bias voltage. The switching quad is coupled to the output node and generates a translation current according to the output signal. The transimpedance amplifier transforms the translation current to a corresponding voltage.

Abstract: A frequency conversion circuit configured to mix a first input signal (RF+,RF?) at a first frequency with a second input signal (LO+,LO?) at a second frequency to provide an output intermediate frequency signal (IFout), the circuit comprising: first and second mixing modules , each mixing module comprising a voltage to current converter configured to receive the first input signal (RF+,RF?) and connected to a Gilbert mixer configured to receive the second input signal (LO+,LO?); an intermediate frequency output circuit having inputs connected to receive an intermediate frequency current signal (IF+,IF?) from outputs of each of the Gilbert mixers and an output configured to provide the output intermediate frequency voltage signal (IFout), wherein the first and second mixing modules comprise transistors which are complementary to each other.

Abstract: A charge domain filter circuit includes a first signal output portion, at least one second signal output, portion, a third signal output portion, and an adder portion. The first signal output portion outputs a first signal that is sampled at a specified time interval. Each second signal, output portion outputs a second signal that is sampled after a specified delay after the first signal is sampled. Where a plurality of the second signal output portions is included, the second signals are sampled in succession. The third signal output portion outputs a third signal that is sampled after a specified delay after the last second signal is sampled. The adder portion adds the first, second, and third signals together and outputs the result. The capacitance ratio of the sampling capacitors in the first signal output portion and the second signal output portion is one of continuously or discretely varied.

Abstract: There is disclosed a method and apparatus for generating an output signal comprising a replica of an input signal, comprising the steps of: generating a replica signal representing the low frequency content of the input signal; generating an error signal representing an error in the replica signal; combining the replica signal with the error signal to generate an output signal; and wherein the step of generating the error signal further includes the steps of: generating a delay signal being a delayed version of the input signal; and determining a difference between the output signal and the delay signal which difference is the error signal.

Abstract: A modulator drive circuit provides a modulator drive signal, representative of a data waveform, to modulate an optical signal for transport across a network infrastructure. The modulator drive circuit includes a broadband Bias-T circuit insensitive to the frequency range of the data waveform. The Bias-T circuit provides for an adjustable bias level to maintain proper operation of a modulator used to modulate the optical signal. One or more modulator drive circuits may be provided on a single substrate.

Abstract: A phase interpolator circuit includes first and second low pass filter circuits and a multiplier circuit. The first low pass filter circuit increases a common mode voltage of a clock signal to generate a first varying signal. The second low pass filter circuit increases a common mode voltage of a clock signal to generate a second varying signal. The first low pass filter circuit can include a first variable capacitance, and the second low pass filter circuit can include a second variable capacitance. The multiplier circuit has a first input coupled to the first low pass filter circuit and a second input coupled to the second low pass filter circuit. The multiplier circuit generates a third varying signal in response to the first and the second varying signals. The phase interpolator circuit generates a phase shift in the third varying signal.

Abstract: The present invention discloses a mixer circuit for mixing two input signals by source-coupled MOS transistors and outputting a mixed result. A duty cycle controlling MOS transistor is connected to a source of each source-coupled MOS transistor in series. A duty cycle controlling pulse is applied to a gate of the duty cycle controlling MOS transistor. The duty cycle controlling pulse has a phase shift of ?90 degrees with respect to a controlling pulse applied to the gate of the source-coupled MOS transistor connected with the duty cycle controlling MOS transistor in series. An AND-combination of the duty cycles of the two controlling pulses applied to the gates of the two MOS transistors connected in series can be controlled at 25%. Comparing to the conventional mixer circuit having a switch control duty cycle of 50%, the present invention achieves the effects of increasing the gain and reducing the noise figure.

Abstract: An RF squarer circuit comprises a first RF multiplier and a first variable gain transimpedance amplifier (TIA). The first RF multiplier receives an RF input signal RFIN and provides a first output current. The first TIA receives the first output current as an input. The first TIA provides an output voltage VOUT.

Abstract: In at least one example embodiment, a phase signal generating apparatus includes a phase signal generator and phase controller. The phase signal generator is configured to receive a plurality of first phase signals and a plurality of second phase signals, adjust a phase difference between the plurality of first phase signals and the plurality of second phase signals and generate a plurality of adjusted first phase signals and a plurality of adjusted second phase signals, based on a switch control signal and a phase control signal, a phase difference between the plurality of adjusted first phase signals and the plurality of adjusted second phase signals being the adjusted phase difference. The phase controller is configured to generate the switch control signal and the phase control signal based on phase information for the plurality of first phase signals and the plurality of second phase signals.

Abstract: A sampling circuit for use in a semiconductor device, includes a first sampling unit configured to sample a data signal in synchronism with a reference clock signal and output a first output signal, a second sampling unit configured to sample a delayed data signal in synchronism with the reference clock signal and output a second output signal, and an output unit configured to combine the first and second output signals and output a sampling data signal.

Abstract: A circuit with inputs for first (LO) and second (IF) unbalanced signals at respective first and second frequencies, also comprising a mixer for the first and second input signals to produce a third signal (RF) at a third frequency at an output port. The mixer comprises first and second transistors which are cross-coupled to each other. Output terminals of the transistors are connected to the output port, and the mixer also comprises a first impedance connected to ground. The mixer, by means of the transistors and the first impedance is an active balun for the first input signal (IF), and the input port for the second signal (LO) comprises a second impedance, so that the first and second impedances together act as a passive balun for the second signal (LO).

Abstract: Techniques for providing an efficient interface between a mixer block and a transconductance (Gm) block. In an exemplary embodiment, the output currents of at least two unit cells of the transconductance block are conductively coupled together, and coupled to the mixer block using a single conductive path. For a differential signal, the conductive path may include two conductive leads. Within the mixer block, the single conductive path may be fanned out to at least two unit cells of the mixer block. At least one Gm unit cell may be selectively enabled or disabled to control the gain setting of the mixer-transconductance block. The techniques may further be applied to transceiver architectures supporting in-phase and quadrature mixing, as well as multi-mode and/or multi-band operation.

Abstract: A double balanced mixer circuit comprising a differential pair of first amplifier elements responsive to an RF differential input signal, double differential pairs of second amplifier elements responsive to an LO differential input signal, and differential output terminals connected with the second amplifier paths. Coupling elements provide first and second parallel DC connections between DC voltage supply rails for the first and the double second amplifier paths respectively and a series RF connection of the first and second amplifier paths between the supply rails so as to produce a mixed differential amplified signal at the differential output terminals. The coupling elements include respective transmission lines in the first amplifier paths connected between one of the DC voltage supply rails and respective ones of the first amplifier elements and a common transmission line connected between the other of the DC voltage supply rails and both the first amplifier elements.

Abstract: Signal modulation apparatus for applying a modulation signal to a carrier signal, the apparatus comprising: an amplitude modulator for modulating the amplitude of the carrier signal in accordance with a control signal; first mixing means for mixing together fractions of the carrier signal before and after action of the amplitude modulator to produce a first detection signal indicative of the amplitude modulation applied by the amplitude modulator; and detection means for comparing the control signal with a first detection signal to evaluate distortion in the first detection signal as compared with the control signal.

Abstract: Circuits and methods for a differential circuit involve having one of more pairs of differential transistors with back-gate terminals, where each of the back-gate terminals is biased by a tunable back-gate voltage to compensate for circuit mismatches in the differential circuit and reduce or eliminate even-order harmonics in the output signal. A compensation circuit can be configured to receive data relating to the differential output signal of the differential circuit, and to supply one or more back-gate voltages to the back-gate terminals of the differential transistors to adjust threshold voltages of the differential transistors and suppress even-order harmonics in the differential output signal of the differential circuit.

Abstract: A method, apparatus, and computer usable program code for signal-to-noise enhancement. In one illustrative embodiment, a system is provided for signal-to-noise enhancement. The system includes a rank order filter and a comparator. The comparator receives an ordered set of data values from the rank order filter. A signal averager averages a subset of data values selected from the ordered set of data values by the comparator.

Abstract: A magnetic resonance imaging (MRI) system includes a transmitter that produces an RF excitation pulse that is applied to a subject positioned in the MRI system to induce emission of at least one of an NMR signal and an ESR signal therefrom, and that produces a reference signal indicative of the phase of the RF excitation pulse. A first analog-to-digital converter has an input for receiving the reference signal that is synchronous with the RF excitation pulse. One or more additional analog-to-digital converters/processors have inputs for receiving the at least one of NMR signals and ESR signals produced by a subject placed in the MRI system and produce one or more complex digital signals therefrom. A normalizer is connected to receive and normalize the digital reference signal and a mixer is connected to receive the normalized digital reference signal and the digital signal. Accordingly, the mixer is operable to multiply the normalized complex digital reference signal with the complex digital signal.

Abstract: A circuit arrangement for signal mixing. One embodiment provides a circuit arrangement for mixing an input signal with at least one carrier signal. The circuit arrangement includes a current source and a current sink. The current source and the current sink have a mixer core coupled between them which provides cross-coupling between mixer input connections and mixer output connections.

Abstract: A variable transconductance device for a mixer apparatus is provided. The apparatus includes at least one variable current source circuit having a plurality of selectively enabled current source stages. Each of the current source stages, when enabled, is actuable to establish a conductive path between a first supply level and an output terminal. The device further includes at least one variable transconductance circuit having a plurality of selectively enabled transconductance stages. Each transconductance stage, when enabled, is actuable to establish a conductive path between a second supply level and the output terminal. An output current signal is generated at the output terminal responsive to actuation of the variable transconductance circuit by an input voltage signal, whereby the output current signal exhibits a power gain adjustably determined responsive to the numbers of current source and transconductance stages selectively enabled.

Abstract: A mixer with high linearity and a low operating voltage is provided. The mixer includes a transconductor and a switch circuit. The transconductor receives a differential voltage signal and outputs a differential current signal accordingly. The transconductor includes a first resistor, a second resistor, a differential amplifier, a first current source and a second current source. The switch circuit includes a first switch, a second switch, a third switch, and a fourth switch. The first and second switches are coupled to a first input of the differential amplifier, while the third and fourth switches are coupled to a second input of the differential amplifier. The first and third switches are mutually coupled to provide an output of the mixer, while the second and fourth switched are mutually coupled to provide another output of the mixer. Each of the first, second, third and fourth switches determines whether to allow the differential current signal to pass through according to a differential control signal.

Abstract: In one embodiment, an apparatus includes an upconversion unit configured to upconvert a baseband signal to a radio frequency (RF) signal. A plurality of baluns for a plurality of wireless bands are provided. Multiplexing circuitry is coupled to the plurality of baluns where the upconversion unit is coupled to each balun through the multiplexing circuitry. The multiplexing circuitry is configured to multiplex the radio frequency signal from the upconversion unit to one of the plurality of baluns based on a wireless band being used.