Semiconductor Mounts Patents (Class 333/247)
  • Patent number: 9007152
    Abstract: A transmission line includes two tapered lines having a tapered planar shape and arranged in parallel, opposite lines provided in opposition to the narrower width sides of the two tapered lines, and a bonding wire for connecting the narrower width sides of the two tapered lines and the opposite lines, wherein the width between two outer edges on the narrower width sides of the two tapered lines arranged in parallel is greater than the width between outer edges on the opposite side of the opposite lines in opposition to the narrower width sides of the two tapered lines.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: April 14, 2015
    Assignee: Fujitsu Limited
    Inventor: Satoshi Masuda
  • Publication number: 20150097633
    Abstract: Embodiments are directed to a transition structure for interfacing an integrated circuit chip and a substrate, comprising: a co-planar waveguide (CPW) structure formed based on ground-signal-ground (GSG) pads on the integrated circuit chip, a grounded co-planar waveguide (CPWG) structure coupled to the GSG pads, and a microstrip coupled to the CPWG structure.
    Type: Application
    Filed: October 8, 2013
    Publication date: April 9, 2015
    Applicant: BLACKBERRY LIMITED
    Inventors: Christopher Andrew DeVries, Houssam Kanj, Morris Repeta, Huanhuan Gu
  • Patent number: 8981881
    Abstract: A stacked module includes a first multilayer substrate including an opening having a stepwise wall face, and a first transmission line including a first grounding conductor layer, a second multilayer substrate supported on a stepped portion of the stepwise wall face and including a second transmission line including a second grounding conductor layer, a first chip mounted on a bottom of the opening and coupled to a third transmission line provided on the first multilayer substrate, and a second chip mounted on the front face of the second multilayer substrate and coupled to the second transmission line. A face to which the second grounding conductor layer or a fourth grounding conductor layer coupled thereto is exposed is joined to the stepped portion to which the first grounding conductor layer or a third grounding conductor layer coupled thereto is exposed, and the first and second grounding conductor layers are coupled.
    Type: Grant
    Filed: January 15, 2013
    Date of Patent: March 17, 2015
    Assignee: Fujitsu Limited
    Inventor: Satoshi Masuda
  • Patent number: 8975978
    Abstract: Provided is an interconnect substrate that includes a laminated body including an electric conductor and an insulator, over which an electronic element (141) is disposed, wherein the laminated body includes a first layer (130) having at least one first conductor (131) separated in an island shape, a first connecting member (142) which is buried in the laminated body in order to electrically connect the electronic element (141) and the first conductor (131), a second layer (110) having a third conductor (111) which is provided opposite to at least a partial region of the first conductor (131), a second conductor (122) which is provided opposite to at least one of the first conductor (131) and the third conductor (111) with a layer of an insulator interposed therebetween, wherein when the laminated body is seen in a plan view, the second conductor (122) is located at a region less than a quarter of a wavelength occurring at a frequency of noise propagated from the electronic element (141) to the first conductor
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: March 10, 2015
    Assignee: NEC Corporation
    Inventors: Masashi Kawakami, Hiroshi Toyao
  • Patent number: 8975914
    Abstract: An isolation receiver includes at least one isolation capacitor to provide a first logic signal in response to a second logic signal that is provided by a transmitter. The receiver includes a signal processing circuit to amplify the first logic signal to generate an amplified signal, and the signal processing circuit includes a an amplifier to apply a nonlinear function. A comparator of the receiver provides a third logic signal in response to the amplified signal.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: March 10, 2015
    Assignee: Silicon Laboratories Inc.
    Inventors: Michael Mills, Jing Li, Riad Samir Wahby
  • Patent number: 8963658
    Abstract: A structure having a coplanar waveguide transistor; and a microwave section, coupled to the transistor, having: a strip conductor coplanar with the electrodes of the coplanar waveguide transistor and a ground plane conductor disposed under the strip conductor.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: February 24, 2015
    Assignee: Raytheon Company
    Inventors: James J. Chen, Nicholas J. Kolias, Francois Y. Colomb
  • Patent number: 8914968
    Abstract: A method for constructing millimeter-wave laminate structures using Printed Circuit Board (PCB) processes includes the following steps: Creating a first pressed laminate structure comprising at least two laminas and a cavity, the cavity is shaped as an aperture of a waveguide, and goes perpendicularly through all laminas of the laminate structure. Plating the cavity with electrically conductive plating, using a PCB plating process. Pressing the first pressed laminate structure together with at least two additional laminas comprising a probe printed on one of the at least two additional laminas, into a PCB comprising the first pressed laminate structure and the additional laminas, such that the cavity is sealed only from one end by the additional laminas and the probe, and the probe is positioned above the cavity.
    Type: Grant
    Filed: February 21, 2011
    Date of Patent: December 23, 2014
    Assignee: Siklu Communication Ltd.
    Inventors: Elad Dayan, Yigal Leiba, Baruch Schwarz, Amir Shmuel
  • Patent number: 8917151
    Abstract: A system for injecting and guiding millimeter-waves through a Printed Circuit Board (PCB) including at least two laminas belonging to a PCB, an electrically conductive plating applied on the insulating walls of a cavity formed perpendicularly through the laminas, and optionally a probe located above the cavity printed on a lamina belonging to the PCB. Optionally, the cavity guides millimeter-waves injected by the probe at one side of the cavity to the other side of the cavity.
    Type: Grant
    Filed: February 21, 2011
    Date of Patent: December 23, 2014
    Assignee: Siklu Communication Ltd.
    Inventors: Elad Dayan, Yigal Leiba, Baruch Schwarz, Amir Shmuel
  • Patent number: 8912862
    Abstract: A system for matching impedances of a bare-die Integrated Circuit and bonding wires. A bare-die Integrated Circuit is configured to output or input, at an impedance of Z3, a millimeter-wave signal from three electrically conductive contacts. Three electrically conductive pads, printed on one of the laminas of a Printed Circuit Board (PCB) are connected to the three electrically conductive contacts via three bonding wires respectively, the bonding wires have a characteristic impedance of Z1, wherein Z1>Z3. One of the electrically conductive pads extends to form a transmission line signal trace of length L, the transmission line signal trace having a first width resulting in characteristic impedance of Z2, wherein Z2>Z3. The transmission line signal trace widens to a second width, higher than the first width, after the length of L, decreasing the characteristic impedance of the transmission line signal trace to substantially Z3 after the length L and onwards.
    Type: Grant
    Filed: February 21, 2011
    Date of Patent: December 16, 2014
    Assignee: Siklu Communication Ltd.
    Inventors: Yonatan Biran, Elad Dayan, Yigal Leiba, Baruch Schwarz, Amir Shmuel
  • Patent number: 8912858
    Abstract: A low-loss interface between a mm-wave integrated circuit and a waveguide comprises a surface having a contact location for said integrated circuit and a waveguide location for fixing a waveguide thereon; a transmission line extending along said surface from said contact location to the waveguide location and extending into the waveguide location as a waveguide feed; and a connection bump on a surface of the mm-wave integrated circuit. The mm-wave integrated circuit RFIC is connected to the surface at the contact location through the connection bump, such as to connect a signal output of the RFIC to the transmission line, thereby providing said low loss interface.
    Type: Grant
    Filed: September 8, 2009
    Date of Patent: December 16, 2014
    Assignee: Siklu Communication Ltd.
    Inventors: Elad Dayan, Amir Shmuel, Yigal Leiba, Baruch Schwarz
  • Patent number: 8912859
    Abstract: A system for directing electromagnetic millimeter-waves towards a waveguide using an electrically conductive formation within a Printed Circuit Board (PCB). The system includes a waveguide having an aperture and at least two laminas belonging to a PCB. A first electrically conductive surface printed on one of the laminas is located over the aperture such that the first electrically conductive surface covers at least most of the aperture. A plurality of Vertical Interconnect Access (VIA) holes, optionally filled or plated with an electrically conductive material, are electrically connecting the first electrically conductive surface to the waveguide, forming an electrically conductive cage over the aperture. Optionally, a probe printed on one of the laminas of the PCB is located inside the cage and over the aperture.
    Type: Grant
    Filed: February 21, 2011
    Date of Patent: December 16, 2014
    Assignee: Siklu Communication Ltd.
    Inventors: Yigal Leiba, Elad Dayan, Baruch Schwarz, Amir Shmuel
  • Patent number: 8912860
    Abstract: A system enabling interface between a millimeter-wave bare-die and a Printed Circuit Board (PCB). A cavity of depth X is formed in at least one lamina of a PCB. Three electrically conductive pads are printed on one of the laminas of the PCB, the pads optionally reach the edge of the cavity. A bare-die Integrated Circuit having a thickness of optionally X, or a heightened bare-die Integrated Circuit having a thickness of optionally X, output a millimeter-wave signal from three electrically conductive contacts arranged in a ground-signal-ground configuration on an upper side edge of the bare-die Integrated Circuit. The bare-die Integrated Circuit is placed inside the cavity, optionally such that the electrically conductive pads and the upper side edge containing the electrically conductive contacts are arranged side-by-side at substantially the same height. Three bonding wires or strips electrically connect each electrically conductive contact to one of the electrically conductive pads.
    Type: Grant
    Filed: February 21, 2011
    Date of Patent: December 16, 2014
    Assignee: Siklu Communication Ltd.
    Inventors: Yigal Leiba, Elad Dayan, Baruch Schwarz, Amir Shmuel
  • Patent number: 8854152
    Abstract: A high-frequency module includes a high-frequency component including a high-frequency circuit, a conductor plate including a slot, a first conductive wire, and two second conductive wires. The high-frequency component includes a signal terminal and two reference potential terminals. The signal terminal is used for at least one of input and output of a high-frequency signal. The two reference potential terminals are connected to a reference potential. The first conductive wire is connected to the signal terminal in terms of high-frequency. The first conductive wire crosses over above the slot. The two second conductive wires are connected to the two reference potential terminals in terms of high-frequency. The two second conductive wires are so disposed along the first conductive wire and do not cross over the slot. The first conductive wire and the two second conductive wires form a pair and are electromagnetically coupled to the slot.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: October 7, 2014
    Assignee: Kyocera Corporation
    Inventors: Hiroshi Uchimura, Nobuki Hiramatsu, Kazuki Hayata
  • Patent number: 8847698
    Abstract: A high-speed feedthrough (HSFT) is disclosed for transmitting a signal having a highest frequency of at least 10 GHz between first and second locations separated by a vertical distance of at least approximately half of the shortest transmitted wavelength, and separated by a horizontal distance. A substrate structure includes multiple stacked layers. An RF transmission line is connected through the structure between the first and second locations for transmitting the signal. The RF transmission line comprises a series of sequentially connected horizontal conductors having lengths less than half of the effective wavelength and vertical conductors having heights less than one quarter of the effective wavelength, thereby spanning the horizontal and vertical distance between the two locations in a stairs-like shape through the structure's layers. Each conductor's geometry may deviate from standard 50 ohm buried strip lines and is optimized for complete 3-dimensional structure.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: September 30, 2014
    Assignee: JDS Uniphase Corporation
    Inventors: Nikolai Morozov, Zhong Pan
  • Patent number: 8811027
    Abstract: A DC-DC converter includes an insulating substrate with an inductor provided on the top surface thereof, a switching control IC provided therein, and a ground electrode pattern provided on the bottom surface thereof. The ground electrode pattern includes a first pattern and a second pattern separated from each other and a bridge pattern that connects the first and second patterns to each other. A capacitor and the switching control IC is connected to each of the first and second patterns. The bridge pattern faces the inductor and has a smaller width than that of the first and second patterns.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: August 19, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Noboru Kato
  • Publication number: 20140091885
    Abstract: A high frequency module wiring board includes a wiring section for high frequency transmission, and a solder resist layer formed upon the wiring section. The solder resist layer covers the wiring section so as to have an opening section at a part of the wiring section in a region extending within a predetermined distance from an input/output terminal of a chip component.
    Type: Application
    Filed: August 23, 2012
    Publication date: April 3, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Ryosuke Shiozaki, Suguru Fujita
  • Patent number: 8564383
    Abstract: A signal converter includes: a dielectric substrate; a first conductor layer disposed on one of opposite sides of the dielectric substrate, while including an input section receiving high-frequency signals inputted thereto; a second conductor layer disposed on the other of the opposite sides of the dielectric substrate; and plural first conducting sections penetrating the dielectric substrate for electrically connecting the first and second conductor layers, while forming a waveguide in the inside of the dielectric substrate with the first and second conductor layers. The first conductor layer is disposed on the dielectric substrate without occupying a separator section disposed on the dielectric substrate. The separator section includes first and second sections extend from the input section towards the waveguide. The first and second sections are separated away from each other for gradually increasing their interval in proportion to a distance away from the input section towards the waveguide.
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: October 22, 2013
    Assignee: Fujitsu Limited
    Inventors: Toshihiro Shimura, Yoji Ohashi
  • Patent number: 8558636
    Abstract: A passive equalizer circuit is embedded within a substrate of a package containing an integrated circuit. It is believed that substantial reduction in uneven frequency dependent loss may be achieved for interconnects interconnecting the integrated circuit with other integrated circuits on a printed circuit board. Other aspects are described and claimed.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: October 15, 2013
    Assignee: Intel Corporation
    Inventors: Jaemin Shin, Pascal A. Meier, Telesphor Kamgaing, Kemal Aygun
  • Publication number: 20130257565
    Abstract: A stacked module includes a first multilayer substrate including an opening having a stepwise wall face, and a first transmission line including a first grounding conductor layer, a second multilayer substrate supported on a stepped portion of the stepwise wall face and including a second transmission line including a second grounding conductor layer, a first chip mounted on a bottom of the opening and coupled to a third transmission line provided on the first multilayer substrate, and a second chip mounted on the front face of the second multilayer substrate and coupled to the second transmission line. A face to which the second grounding conductor layer or a fourth grounding conductor layer coupled thereto is exposed is joined to the stepped portion to which the first grounding conductor layer or a third grounding conductor layer coupled thereto is exposed, and the first and second grounding conductor layers are coupled.
    Type: Application
    Filed: January 15, 2013
    Publication date: October 3, 2013
    Applicant: FUJITSU LIMITED
    Inventor: Satoshi MASUDA
  • Patent number: 8536954
    Abstract: Millimeter wave radio-frequency integrated circuit device comprises a housing and a millimeter wave radio frequency integrated circuit, the housing comprising a plurality of layers laminated together and two cavities defined by apertures within the layers which are positioned to correspond as the layers are laminated together. The radio frequency integrated circuit is located within the first cavity, and the second cavity serves as a radiating cavity. The RFIC is bonded to a transmission line which connects to the radiating cavity.
    Type: Grant
    Filed: June 2, 2010
    Date of Patent: September 17, 2013
    Assignee: Siklu Communication Ltd.
    Inventors: Yigal Leiba, Elad Dayan
  • Patent number: 8410874
    Abstract: In one example embodiment, a coplanar waveguide signal transition element transitions high-speed signals between vertically stacked coplanar waveguide transmission lines. The signal transition element comprises one or more dielectric layers and a plurality of electrically conductive vias extending through at least a portion of the one or more dielectric layers. The vias include one or more signal vias and one or more ground vias that are configured to transition signals between the vertically stacked coplanar waveguide transmission lines. The signal transition element also comprises a ground plane disposed within the one or more dielectric layers and electrically coupled to the one or more ground vias. The ground plane has one or more openings through which the one or more signal vias respectively pass.
    Type: Grant
    Filed: August 3, 2010
    Date of Patent: April 2, 2013
    Assignee: Finisar Corporation
    Inventors: Yupeng Song, Yanyang Zhao, Yuheng Lee, Jianying Zhou
  • Patent number: 8378759
    Abstract: An apparatus for reducing crosstalk including a substrate having a bottom surface and a top surface defining a horizontal plane, a ground plane coupled to the bottom surface of the substrate, first and second microstrip lines formed on the top surface of the substrate, the first and second microstrip lines formed on the top surface of the substrate and spaced apart from one another, and a first plurality of vias traveling through the substrate from the top surface of the substrate to the ground plane and positioned between the first and second microstrip lines for reducing crosstalk between the first and second microstrip lines.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: February 19, 2013
    Assignee: Toyota Motor Engineering & Manufacturing North America, Inc.
    Inventors: Alexandros Margomenos, Amin Rida
  • Patent number: 8368488
    Abstract: An electromagnetic bandgap structure and a printed circuit board that can solve a mixed signal problem between an analog circuit and a digital circuit are disclosed. In accordance with an embodiment of the present invention, an electromagnetic bandgap structure is stacked with a first metal layer, a first dielectric layer, a metal plate, a second dielectric layer and a second metal layer, and an odd number of vias can be serially connected through a metal line between the first metal layer and the metal plate. This electromagnetic bandgap structure can have a small size and a low bandgap frequency.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: February 5, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Han Kim, Hyung-Sik Choi, Sang-Hoon Kim, Joon-Sung Kim
  • Patent number: 8339790
    Abstract: A monolithic microwave integrated circuit structure having a semiconductor substrate structure with a plurality of active devices and a microwave transmission line having an input section, an output section and a interconnecting section electrically interconnecting the active devices on one surface and a metal layer on an opposite surface overlaying the interconnection section and absent from overlaying at least one of the input section and the output section.
    Type: Grant
    Filed: September 10, 2010
    Date of Patent: December 25, 2012
    Assignee: Raytheon Company
    Inventors: Shahed Reza, Edward Swiderski, Roberto W. Alm
  • Publication number: 20120194302
    Abstract: A design structure, structure, and method for providing an on-chip variable delay transmission line with a fixed characteristic impedance. A method of manufacturing a transmission line structure includes forming a signal line of the transmission line structure, forming a first ground return structure that causes a first delay and a first characteristic impedance in the transmission line structure, and forming a second ground return structure that causes a second delay and a second characteristic impedance in the transmission line structure. The first delay is different from the second delay, and the first characteristic impedance is substantially the same as the second characteristic impedance.
    Type: Application
    Filed: April 6, 2012
    Publication date: August 2, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hanyi DING, Wayne H. WOODS, JR.
  • Patent number: 8222976
    Abstract: A multilayer dielectric substrate includes a first cavity-resonance suppressing circuit that suppresses cavity resonance of a first signal wave and a second cavity-resonance suppressing circuit that suppresses cavity resonance of a second signal wave, a frequency thereof being different from that of the first signal wave. These cavity-resonance suppressing circuits respectively include openings formed in a surface-layer ground conductor, an impedance transformer with a length of an odd multiple of about ¼ of in-substrate effective wavelength of a signal wave, a tip-short-circuited dielectric transmission line with a length of an odd multiple of about ¼, of in-substrate effective wavelength of a signal wave, a coupling aperture formed in an inner-layer ground conductor, and a resistor formed in the coupling aperture. The multilayer dielectric substrate that suppresses cavity resonance of signal waves of a plurality of frequencies.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: July 17, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventor: Kousuke Yasooka
  • Patent number: 8203082
    Abstract: A printed circuit board includes a first layout layer, a second layout layer, a copper foil layer, a first via and a second via. The first layout layer has a first signal line and a second signal line, each of which has a curved first portion. The second layout layer has a third signal line and a fourth signal line, each of which also has a curved first portion. The curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line are coupled to the first via and the second via. In this case, the curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line cooperatively generate spiral inductance characteristic.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: June 19, 2012
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Yu-Chang Pai, Shou-Kuo Hsu, Chien-Hung Liu, Ying-Tso Lai
  • Patent number: 8188814
    Abstract: According to one embodiment, there is provided a high voltage isolation dual capacitor communication system comprising communication drive and sense electrodes and corresponding first and second capacitors that are formed in two separate devices. The two devices are electrically connected in series to provide a single galvanically-isolated communication system that exhibits high breakdown voltage performance in combination with good signal coupling. The system effects communications between drive and receive circuits through the first and second capacitors, and in a preferred embodiment is capable of effecting relatively high-speed digital communications. The system may be formed in a small package using, by way of example, CMOS or other semiconductor fabrication and packaging processes.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: May 29, 2012
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Gek Yong Ng, Kah Weng Lee, Fun Kok Chow
  • Patent number: 8164005
    Abstract: A multilayer high-frequency circuit board includes a signal line, ground layers, and an interlayer circuit. A signal line where a high-frequency signal flows is formed in the signal line layer. The ground layers are laminated on both sides of the signal line layer, each of which is grounded. The interlayer circuit is provided in the signal line layer and includes a ground connecting portion connected to the ground layers and a signal line connecting portion connected to the signal line. One of the signal line connecting portion and the ground connecting portion surrounds an outer periphery of the other of the signal line connecting portion and the ground connecting portion concentrically with the one being separated from the outer periphery of the other along the signal line layer. An inner periphery of the one and the outer periphery of the other have a similar shape excluding a complete circle.
    Type: Grant
    Filed: April 9, 2008
    Date of Patent: April 24, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuusuke Yamashita, Ryota Suzuki, Masahiro Tanabe, Taihei Nakada, Tsuyoshi Kumamoto
  • Patent number: 8153907
    Abstract: An electromagnetic bandgap structure and a printed circuit board that solve a mixed signal problem are disclosed. In accordance with embodiments of the present invention, the electromagnetic bandgap structure includes a first metal layer; a first dielectric layer, stacked in the first metal layer; a second metal layer, stacked in the first dielectric layer, and having a holed formed at a position of the second dielectric layer; a second dielectric layer, stacked in the second metal layer; a metal plate, stacked in the second dielectric layer; a first via, penetrating the hole formed in the second metal layer and connecting the first metal layer and the metal plate; a third dielectric layer, stacked in the metal plate and the second dielectric layer; a third metal layer, stacked in the third dielectric layer; and a second via, connecting the second metal layer to the third metal layer.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: April 10, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Dae-Hyun Park, Han Kim, Mi-Ja Han, Ja-Bu Koo
  • Publication number: 20120068793
    Abstract: A structure having a coplanar waveguide transistor; and a microwave section, coupled to the transistor, having: a strip conductor coplanar with the electrodes of the coplanar waveguide transistor and a ground plane conductor disposed under the strip conductor.
    Type: Application
    Filed: September 21, 2010
    Publication date: March 22, 2012
    Applicant: Raytheon Company
    Inventors: James J. Chen, Nicholas J. Kolias, Francois Y. Colomb
  • Patent number: 8130513
    Abstract: A radio-frequency package includes a radio-frequency device, a multilayer dielectric substrate, and an electromagnetic shield member. The multilayer dielectric substrate includes an internal conductor pad, a first signal via-hole connected to the internal conductor pad, an external conductor pad, a second signal via-hole connected to the external conductor pad, and an inner-layer signal line that connects between the first signal via-hole and the second signal via-hole. The internal conductor pad includes a leading-end open line having a length of substantially a quarter of a wavelength of a radio-frequency signal used in the radio-frequency device.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: March 6, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventor: Kousuke Yasooka
  • Patent number: 8120450
    Abstract: The invention provides a high frequency circuit module according to the present invention includes: a circuit component having a plurality of terminals arranged on an outer side thereof, and a circuit board of a multilayered construction or a single-layered construction. A first outer face of the circuit board serves as a component mounting face for mounting the circuit component. The circuit board includes a ground conductor layer; a plurality of electrode pads provided on the component mounting face, the electrode pads being configured for connection with the associated terminals of the circuit component; and a plurality of waveguides provided on the first outer face or a second outer face, or in an inner portion of the circuit board. The waveguides are electrically connected with the associated electrode pads. Routing directions of all or some of adjacent waveguides are opposite from each other.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: February 21, 2012
    Assignee: Hosiden Corporation
    Inventors: Hayato Kondo, Kenji Maeda
  • Patent number: 8115567
    Abstract: Methods and systems for matching networks embedded in an integrated circuit package are disclosed and may include controlling impedance within an integrated circuit via one or more impedance matching networks. The impedance matching networks may be embedded within a multi-layer package bonded to the integrated circuit. The impedance of one or more devices within the integrated circuit may be configured utilizing the impedance matching networks. The multi-layer package may include one or more impedance matching networks. The impedance matching networks may provide impedance matching between devices internal to the integrated circuit and external devices. The impedance matching networks may be embedded within the multi-layer package, and may include transmission lines, inductors, capacitors, transformers and/or surface mount devices. The impedance matching networks may be deposited on top of and/or on bottom of the multi-layer package. The integrated circuit may be flip-chip bonded to the multi-layer package.
    Type: Grant
    Filed: December 13, 2007
    Date of Patent: February 14, 2012
    Assignee: Broadcom Corporation
    Inventors: Ahmadreza Rofougaran, Maryam Rofougaran
  • Patent number: 8099054
    Abstract: Disclosed embodiments comprise an energy harvesting computer device in association with a communication device comprising interactive user interface operatively configured with CMOS multiple antennas on chip for boosting signal receptions and for providing faster data transmission speed. Disclosed embodiment encompasses three modes of communications —the Cell phone, wireless Internet applications, and Global communication and media information. Embodiments provide communication apparatus operable to enhance mobile communication efficiency with touch sensitive display comprising energy harvesting platform in communication with a charging circuit board configured with memories, processors, sensors, and modules. Embodiments further provide a gaming device, a wireless media device configured with touch pads comprising sensors being embedded in silicon substrate and fused in nano-fiber/micro fiber material having excellent electrical characteristics.
    Type: Grant
    Filed: June 7, 2010
    Date of Patent: January 17, 2012
    Inventor: Joseph Akwo Tabe
  • Patent number: 8063719
    Abstract: A printed wiring board having at least one connector includes a dielectric substrate that has, on a first face, a first ground plane, and on a second face, at least two transmission lines between which the connector and a footprint are mounted. The footprint includes a first element positioned between the two transmission lines under the connector. The first element forming with the first ground plane, a capacitive element and, at each extremity of the first element, second elements forming with the first element, a self-inductive and capacitive element. The second elements each extending by a second ground plane, the second ground planes which are connected to the first ground plane.
    Type: Grant
    Filed: May 20, 2008
    Date of Patent: November 22, 2011
    Assignee: Thomson Licensing
    Inventors: Dominique Lo Hine Tong, Philippe Minard, Jean-Luc Le Bras
  • Patent number: 8044746
    Abstract: A high speed flexible interconnect cable for an electronic assembly includes a number of conductive layers and a number of dielectric layers. Conductive signal traces, located on the conductive layers, combine with the dielectric layers to form one or more high speed electrical transmission line structures. The cable can be coupled to electronic components using a variety of connection techniques. The cable can also be terminated with any number of known or standardized connector packages.
    Type: Grant
    Filed: April 16, 2010
    Date of Patent: October 25, 2011
    Assignee: QUALCOMM Incorporated
    Inventors: James Leroy Blair, Oswin M. Schreiber, Jeffrey Thomas Smith
  • Patent number: 8041304
    Abstract: An area estimation apparatus 100 includes: a reception level receiving unit 110 configured to receive, from a plurality of the radio signal capturing terminals 40a and 40b via the network, a radio signal reception level transmitted from the radio signal transmitting terminal 10, a radio signal transmitting terminal ID for uniquely identifying the radio signal transmitting terminal 10, and a radio signal capturing terminal ID for uniquely identifying each of the plurality of radio signal capturing terminals 40a and 40b; with a presence area of the radio signal capturing terminals being known; a reception level storage unit 123 configured to store the radio signal reception level, the radio signal transmitting terminal ID and the radio signal capturing terminal ID, which are received from each of the radio signal capturing terminals 40a and 40b, in association with one another; and a presence area estimating unit 140 configured to refer to the reception level storage unit and to estimate the presence area of th
    Type: Grant
    Filed: August 13, 2008
    Date of Patent: October 18, 2011
    Assignee: NTT DoCoMo, Inc.
    Inventors: Naoharu Yamada, Yoshinori Isoda
  • Patent number: 7999640
    Abstract: In a radio-frequency wave module including a transmission path based on a distributed parameter element, the transmission path being part of an input/output terminal, a plurality of cavity-structured concave portions for containing semiconductor-including mounted components therein, grounding-use metallic electrodes, dielectric substrates of at least two or more layers, and semiconductors, electrical separation is established between the grounding-use metallic electrodes which form the transmission paths based on the distributed parameter element and at least one of the grounding-use metallic electrodes which are formed on bottom surfaces of the plurality of cavity-structured concave portions for containing the semiconductor-including mounted components therein.
    Type: Grant
    Filed: February 6, 2009
    Date of Patent: August 16, 2011
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventor: Eiichi Hase
  • Patent number: 7990228
    Abstract: A technique capable of achieving both improvement of mounting density and noise reduction for a semiconductor device is provided. An LSI mounted on a printed wiring board comprises a grounding BGA ball and a power BGA ball to get power supply from the printed wiring board, and the grounding BGA ball and the power BGA ball are arranged closely to each other. A decoupling capacitor is mounted on the printed wiring board and has a first terminal and a second terminal. The grounding BGA ball and the first terminal are connected by a first metal electrode plate, and the power BGA ball and the second terminal are connected by a second metal electrode plate. The first metal electrode plate and the second metal electrode plate interpose a dielectric film having a thickness equal to or smaller than 1 ?m therebetween.
    Type: Grant
    Filed: April 2, 2008
    Date of Patent: August 2, 2011
    Assignees: Hitachi, Ltd., Elpida Memory, Inc.
    Inventors: Yutaka Uematsu, Hideki Osaka, Yoji Nishio, Eiichi Suzuki
  • Patent number: 7978030
    Abstract: In one example embodiment, a high-speed transponder includes a printed circuit board having a set of coplanar high-speed traces, and a high-speed circuit and a package mounted to the printed circuit board. The package includes an outside housing and a second high-speed circuit positioned inside the housing. The high-speed transponder also includes a high-speed feed thru which includes an inside coplanar structure positioned inside the housing, a strip line structure positioned through the housing, and an outside coplanar structure positioned outside the housing. The second high-speed circuit is operably coupled to the inside coplanar structure, which is operably coupled to the strip line structure, which is operably coupled to the outside coplanar structure, which is operably coupled to the first high-speed circuit via the set of coplanar high-speed traces. The signal plane of the outside coplanar structure is flipped with respect to a signal plane of the inside coplanar structure.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: July 12, 2011
    Assignee: Finisar Corporation
    Inventors: Yuheng Lee, Jianying Zhou, Yan Yang Zhao, Christopher R. Cole, Bernd Huebner
  • Patent number: 7978031
    Abstract: The present invention is provided with a high frequency module comprising a multilayered substrate, a power amplifier IC mounted on the upper surface of the multilayered substrate, first and second filters disposed substantially directly below the power amplifier IC in an inner layer of the multilayered substrate, and coupling-reducing ground vias disposed between the first filter and the second filter. At least the first filter is disposed substantially directly below the power amplifier IC. The coupling-reducing ground vias double as thermal vias for dissipating heat generated by the power amplifier IC.
    Type: Grant
    Filed: January 14, 2009
    Date of Patent: July 12, 2011
    Assignee: TDK Corporation
    Inventors: Tomoyuki Goi, Takuya Adachi, Atsuhi Ajioka, Hitoshi Hachiga
  • Patent number: 7889022
    Abstract: An electromagnetic interconnect method and apparatus effects contactless, proximity connections between elements in an electronics system. Data to be communicated between elements in an electronic system are modulated into a carrier signal and transmitted contactlessly by electromagnetic coupling. The electromagnetic coupling may be directly between elements in the system or through an intermediary transmission medium.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: February 15, 2011
    Assignee: FormFactor, Inc.
    Inventor: Charles A. Miller
  • Patent number: 7876071
    Abstract: An integrated circuit battery sensor and system thereof are provided. The battery sensor includes a voltage sensor configured to sample a voyage of a battery and a buffer in electrical communication with the voltage sensor and configured for scaling the sampled battery voltage and outputting a voltage signal proportional to the sampled battery voltage; wherein the voltage sensor is further configured for isolating the buffer from the battery. The voltage sensor includes a first capacitor coupled to a positive potential terminal of the battery and a second capacitor coupled to a negative potential terminal of the battery. The battery sensor includes a first die including a first and second input terminal configured for coupling to the positive and negative potential terminals of the battery; and a second die including the voltage sensor, wherein the first and second die are electrically isolated from each other.
    Type: Grant
    Filed: June 15, 2007
    Date of Patent: January 25, 2011
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Lei Chen, Fun Kok Chow, Kok Keong Richard Lum, Bin Zhang
  • Patent number: 7855685
    Abstract: A microwave communication package is constructed on an electrically conducting base plate having a first side defining a base plate cavity, with an antenna apparatus mounted on an opposite, second side. A dielectric substrate on the first side of the base plate covers the base plate cavity; and sealing apparatus contacting the dielectric substrate and the base plate completely around the base plate cavity hermetically seals the cavity. Circuitry mounted on a surface of the substrate within the base plate cavity includes one or more microstrip lines communicating components to one or more waveguides comprising openings extending through the base plate; and the waveguides are coupled at their opposite ends to the antenna apparatus.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: December 21, 2010
    Assignee: Delphi Technologies, Inc.
    Inventors: Matthew R. Walsh, Deepukumar M. Nair, David W. Zimmerman, Benjamen E. Haffke, Scott D. Brandenburg, Charles I. Delheimer, Michael E. Miller, Bruce Wayne Butler
  • Patent number: 7804443
    Abstract: In a millimeter waveband transceiver using an antenna and a waveguide for a connection line, it is necessary to perform transmission mode line conversion between TEM waves of a microstrip line and VTE01 mode waves of the waveguide. There is a limit to reducing the conversion loss using only a matching box for connecting the microstrip line with the waveguide. In a transmission mode line transducer for converting between the TEM waves of the microstrip line and the VTE01 mode waves of the waveguide, if the cross-sections are substantially the same size, in the case of a 50? microstrip line when the characteristic impedance of the waveguide is about 80%, i.e., 40?, the line conversion loss can be optimized. Therefore, the microstrip line is connected with the waveguide using a ?/4 matching box via a ridged waveguide having a low impedance and a length of ?/16 or less.
    Type: Grant
    Filed: November 2, 2007
    Date of Patent: September 28, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Hideyuki Nagaishi, Hiroshi Shinoda, Kazuo Matsuura
  • Patent number: 7741935
    Abstract: According to one embodiment, there is provided a semiconductor digital communication device comprising communication drive and sense electrodes formed in a single plane, where the electrodes have relatively high sidewalls. The relatively high sidewalls permit low electrical field densities to be obtained in the sense and drive electrodes during operation, and further permit very high breakdown voltages to be obtained between the electrodes, and between the drive electrode and an underlying ground plane substrate. The device effects communications between drive and receive circuits through the drive and sense electrodes by capacitive means, and in a preferred embodiment is capable of effecting relatively high-speed digital communications. The device may be formed in a small package using, by way of example, CMOS or other semiconductor fabrication and packaging processes.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: June 22, 2010
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Fun Kok Chow, Gek Yong Ng, Kah Weng Lee
  • Patent number: 7729129
    Abstract: In a package mounting structure for mounting a package on a case, wherein the package internally incorporates at least one of a high-frequency transistor, MIC and MMIC used in the microwave to millimeter-wave band, and a base thereof is formed of metal and serves as ground, an electrically conductive sheet having excellent thermal conductivity and exhibiting restorability and having a size identical with that of the base of the package is laid on the case at a package-bearing location, the package and sheet are fastened together by two or more screws, and the sheet is mounted on the case while it is pressed by a pressing force of 10 N/cm2 or greater owing to fastening.
    Type: Grant
    Filed: October 17, 2007
    Date of Patent: June 1, 2010
    Assignee: Fujitsu Limited
    Inventors: Masafumi Shigaki, Isao Nakazawa, Kazunori Yamanaka
  • Patent number: 7671450
    Abstract: An integrated circuit package having a multi-segment transmission line transformer for impedance matching a packaged integrated circuit, such as a driver or receiver, to a printed circuit board (PCB) transmission line to which the packaged chip is attached by, for example, solder balls. In one exemplary embodiment, a three-segment transmission line transformer provides improved broadband performance with the advantage of having a middle segment with a flexible length for easier routing. The length of each end segment of the three-segment transformer is adjusted to provide at least partial cancellation of reflections between the PCB and the transformer, and between the transformer and a circuit on the integrated circuit, respectively. Further, the inductive reactance of the solder balls and via wiring may be cancelled out by the transformed chip impedance to provide a non-inductive termination to the PCB transmission line at approximately one-half the highest data rate of the channel.
    Type: Grant
    Filed: April 1, 2008
    Date of Patent: March 2, 2010
    Assignee: Agere Systems Inc.
    Inventors: Ellis E. Nease, Ashley Rebelo, Christopher J. Wittensoldner
  • Patent number: RE43957
    Abstract: In a high-frequency module, mounting lands arranged to mount at least one filter device having at least one set of an unbalanced terminal and two balanced terminals are provided at one side of a substrate top surface, and mounting lands arranged to mount at least one element electrically connected to the filter device are arranged at the opposite side. At least two of a plurality of connection terminals provided on a substrate bottom surface are respectively connected to conductor patterns connected to via-hole conductors penetrating the substrate within a mounting area for mounting the filter device via connection lines and are arranged at a pitch which is less than the pitch of the via-hole conductors.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: February 5, 2013
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Taturo Nagai