Semiconductor Mounts Patents (Class 333/247)
-
Patent number: 7180393Abstract: A hybrid microwave circuit device comprises a base provided with an external peripheral wall and at least one internal wall together delimiting at least two cavities to accommodate hybrid microwave circuits and a cover which is made of the same material as the base. The cover has an internal face fastened to the edge of the peripheral wall to provide a hermetic seal of the cavity and to establish an electrical contact with the peripheral wall. The cover comprises deformable and elastic contact members fastened to its internal face and adapted to establish an electrical contact with the edge of the internal wall.Type: GrantFiled: July 16, 2004Date of Patent: February 20, 2007Assignee: AlcatelInventors: Claude Drevon, Mathieu Paillard
-
Patent number: 7180394Abstract: A low cost and high performance millimeter wave (MMW) radio frequency transceiver module includes a substrate board and plurality of microwave monolithic integrated circuit (MMIC) chips supported by the substrate board and arranged in a receiver section, a local oscillator section and a transmitter section. A plurality of filters and radio frequency circuit interconnects are formed on the substrate board and operative with and/or connecting the receiver, local oscillator and transmitter sections. A plurality of electrical interconnects are operative with and connect the receiver, local oscillator and transmitter sections. A method of forming the millimeter wave radio frequency transceiver module is also disclosed.Type: GrantFiled: August 24, 2004Date of Patent: February 20, 2007Assignee: Xytrans, Inc.Inventors: Danny F. Ammar, Eugene Fischer, Gavin Clark, John Hubert, Glenn Larson
-
Patent number: 7170314Abstract: Various module structures are disclosed which may be used to implement modules having 1 to N channels. Bus systems may be formed by the interconnection of such modules.Type: GrantFiled: February 11, 2005Date of Patent: January 30, 2007Assignee: Rambus Inc.Inventors: Belgacem Haba, Richard E. Perego, David Nguyen, Billy W. Garrett, Jr., Ely Tsern, Crag E. Hampel, Wai-Yeng Yip
-
Patent number: 7170361Abstract: A method and apparatus for substantially reducing or eliminating electromagnetic and electrostatic coupling between signal traces on a substrate is disclosed. A substrate, such as a printed circuit board, is formed with an electrically insulative layer and a conductive layer. A portion of the conductive layer is removed to form circuit traces including signal traces and voltage reference traces configured such that each signal trace is separated from each other signal trace by at least one voltage reference trace. The invention is also applied to multiple layer printed circuit boards including a single voltage reference plane, an electronic system, and a semiconductor substrate.Type: GrantFiled: April 13, 2000Date of Patent: January 30, 2007Assignee: Micron Technology, Inc.Inventor: Warren M. Farnworth
-
Patent number: 7164905Abstract: Heretofore, a plurality of packages were used in a high frequency module in which a plurality of waveguide terminals were positioned resulting in problems, such as degradation of characteristics in the connection lines between packages, lower ease of assembly when mounting and connecting the connection lines, increased cost, and so forth. To solve these problems, a plurality of cavities having a part or the entire side metallized is formed in a multi-layer dielectric substrate. The multi-layer dielectric substrate is provided with a plurality of waveguide terminals, microstrip line-waveguide converters, RF lines, bias and control signal wiring, and bias and control signal pads. A high frequency circuit is mounted within the cavity and sealed with a seal and cover. This is intended to reduce the number of package, improve performance, improve fabrication, and lower the cost.Type: GrantFiled: March 3, 2005Date of Patent: January 16, 2007Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Tsutomu Tamaki, Takuya Suzuki, Koichi Matsuo, Hiroshi Kai
-
Patent number: 7157992Abstract: Systems and methods are taught for blocking the propagation of electromagnetic waves in parallel-plate waveguide (PPW) structures. Periodic arrays of resonant vias are used to create broadband high frequency stop bands in the PPW, while permitting DC and low frequency waves to propagate. Some embodiments of resonant via arrays are mechanically balanced, which promotes improved manufacturability. Important applications include electromagnetic noise reduction in layered electronic devices such as circuit boards, ceramic modules, and semiconductor chips.Type: GrantFiled: March 8, 2004Date of Patent: January 2, 2007Assignee: Wemtec, Inc.Inventor: William E. McKinzie, III
-
Patent number: 7145411Abstract: A high speed flexible interconnect cable includes a number of conductive layers and a number of dielectric layers. Conductive signal traces, located on the conductive layers, combine with the dielectric layers to form one or more high speed electrical transmission line structures. The transmission line structure may be realized as a grounded coplanar waveguide structure, a microstrip structure, a stripline structure, or the like. The cable can be coupled to destination components using a variety of connection techniques, e.g., direct bonding to a circuit substrate, direct soldering to a flip chip, mechanical attachment to a component, or integration with a circuit substrate. The cable can also be terminated with any number of known or standardized connector packages, e.g., SMA, GPPO, or V connectors.Type: GrantFiled: September 27, 2004Date of Patent: December 5, 2006Assignee: Applied Micro Circuits CorporationInventors: James Leroy Blair, Oswin M. Schreiber, Jeffrey Thomas Smith
-
Patent number: 7123118Abstract: Systems and methods are taught for blocking the propagation of electromagnetic waves in parallel-plate waveguide (PPW) structures. Periodic arrays of resonant vias are used to create broadband high frequency stop bands in the PPW, while permitting DC and low frequency waves to propagate. Particular embodiments include clusters of small vias that effectively function as one large via, thereby increasing stop band bandwidth and maximizing parallel plate capacitance. Cluster vias can be configured to additionally provide a shielded and impedance matched route within the interior area of the cluster through which signal vias can connect transmission lines disposed in planes lying above and below the PPW. Important applications include electromagnetic noise reduction in layered electronic devices such as circuit boards, ceramic modules, and semiconductor chips.Type: GrantFiled: April 19, 2004Date of Patent: October 17, 2006Assignee: Wemtec, Inc.Inventor: William E. McKinzie, III
-
Patent number: 7113054Abstract: An arrangement and method for impedance matching (e.g., for a power amplifier) comprising a first node (204a) for receiving an output current to be impedance matched; a second node (212, 214) for receiving output current from the first node; a first current conductor (202c) for carrying current from the first node to the second node; a third node (204b) for receiving output current from the second node; and a second current conductor (202d) for carrying current from said second node to said third node, whereby the first and second current conductors are closely positioned so that their inductance is the sum of their self-inductances and the negative sum of their mutual inductance.Type: GrantFiled: July 28, 2002Date of Patent: September 26, 2006Assignee: Freescale Semiconductor, Inc.Inventors: Phillipe Riondet, Gilles Montoriol, Jaques Trichet
-
Patent number: 7084722Abstract: An integrated switched filterbank and method of forming an integrated switched filterbank is disclosed. One embodiment includes a switched filterbank that includes an active subassembly, a plurality of active devices mounted to the active subassembly, and a stripline filter subassembly stacked below the active subassembly. The stripline filter subassembly includes a plurality of stripline filters of varying passbands embedded therein, wherein the plurality of stripline filters are coupled to active devices mounted on the active subassembly through a set of contacts extending from the stripline filters through the active subassembly to at least one of the plurality of active devices.Type: GrantFiled: July 22, 2004Date of Patent: August 1, 2006Assignee: Northrop Grumman Corp.Inventor: William R. Goyette
-
Patent number: 7034641Abstract: A substrate structure useful for photonics modules comprises a high-thermal-conductivity (e.g., greater than 20 W/m°K) substrate body with a low-thermal-conductivity (e.g., less than 5 W/m°K) dielectric layer overlying at least a portion of the substrate body. Patterned metal layers for electrical circuit connections can be located on the dielectric layer, on the substrate body (under the dielectric layer, on regions of exposed substrate body, or both), or on both. Where the laser is driven at high frequencies (e.g., 2.5 Gbits/sec), the dielectric layer material and thickness can be chosen to provide desired RF behavior. For example, the electrodes and dielectric layer can be configured to provide a transmission line with the desired impedance. Further, where it is desired to solder a component to the substrate, a heater resistor can be formed on the dielectric layer, thereby facilitating soldering the component.Type: GrantFiled: November 27, 2002Date of Patent: April 25, 2006Assignee: K2 Optronics, Inc.Inventors: Robert A. Clarke, Frans Kusnadi, Richard D. Bjorn, John Cameron Major, Zequin Mei, Vadim Chuyanov
-
Patent number: 7030721Abstract: In a high frequency apparatus for transmitting or processing a high frequency signal, a substrate has a recessed portion in a surface of the substrate, a first interconnecting conductor is on the substrate, including at least the recessed portion of the substrate, and a dielectric support film is on the substrate opposite the recessed portion of the substrate with an air space between the dielectric support film and the substrate. A second interconnecting conductor is on a part of a surface of the dielectric support film. The high frequency apparatus has a simple structure and reduced transmission loss and can be made in a simple manufacturing process.Type: GrantFiled: April 24, 2003Date of Patent: April 18, 2006Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yukihisa Yoshida, Tamotsu Nishino, Yoshiyuki Suehiro, Sangseok Lee, Kenichi Miyaguchi, Jiwei Jiao
-
Patent number: 7026869Abstract: A broadband driver amplifier module is made using an arrangement of MMICS and microstrip to provide inline rf connectors for the input and output and a small package size. The input and output microstrips incorporate a microstrip portion which is at an angle to the axis of the input connector providing an offset from the axis of the input connector. There is provided at least one MMIC extending from the input microstrip at the offset across the input connector axis and having an output on the other side of the axis. This arrangement provides for an overall zigzag configuration which reduces the axial length of the package while maintaining inline input and output connectors. The invention further includes novel arrangements for MMIC mounting and d.c. blocks used in the amplifier.Type: GrantFiled: January 8, 2003Date of Patent: April 11, 2006Assignee: L-3 CommunicationsInventors: Joseph L. Merenda, Michael Zaffarano, Eric Darvin
-
Patent number: 7019600Abstract: A waveguide/planar line converter is provided which enables a simplified assembling operation and accurate positioning of a signal line. The waveguide/planar line converter includes a housing having a waveguide and a waveguide/planar line conversion substrate with a signal line propagating high frequency signals formed on one main surface side and a ground formed on the other main surface side, wherein one end portion of the signal line of the waveguide/planar line conversion substrate is located in such a manner so as to protrude into the waveguide, and the waveguide/planar line conversion substrate is arranged on the whole top surface of the housing so as to cover the mouth of the waveguide.Type: GrantFiled: August 29, 2003Date of Patent: March 28, 2006Assignee: Fujitsu Ten LimitedInventor: Masayoshi Shono
-
Patent number: 7015869Abstract: The present invention consists of an electrical communications device including a three-dimensional substrate and a plurality of electrical devices attached thereto. The substrate is preferably a dielectric. The electrical device is preferably of the sort needed to conduct high frequency communications, such as a microwave antenna and photonic receivers and transmitters. The electrical devices are attached to the substrate at the connection points described by the intersection of a series vias and one of the substrate surfaces. The electrical devices are attached to the substrate in numerous ways, including solder, flipped chip ball bonds, wire bonds, or a gold stud assembly. In particular, the gold stud assembly is utilized to attach the antenna to the substrate, thereby providing a predetermined air gap therebetween.Type: GrantFiled: November 18, 2002Date of Patent: March 21, 2006Assignee: Visteon Global Technologies, Inc.Inventors: C. Allen Marlow, Jay DeAvis Baker, Lawrence Leroy Kneisel, Rosa Lynda Nuño, William David Hopfe
-
Patent number: 7012490Abstract: A connection pad, an insulating film, a ground layer a protective film, first to third wirings and posts S0, S1, G, D on the wirings are disposed on a semiconductor substrate. In this case, the first wiring transmits a high frequency signal, and a dummy pad portion and dummy post D for restraining attenuation of the high frequency signal are disposed midway in the wiring and not connected to external, circuits. An opening for decreasing a floating capacity is disposed in the ground layer under the posts S0, D.Type: GrantFiled: June 30, 2004Date of Patent: March 14, 2006Assignee: Casio Computer Co., Ltd.Inventors: Yutaka Aoki, Sayaka Nishikado
-
Patent number: 6998944Abstract: Microwave signals are coupled from a microwave module to a microstrip transmission line, each installed on a chassis plate. The microwave signals are fed through the bottom or side of the microwave module using a feedthrough pin mounted in the module. The feedthrough pin extends from the microwave module interior into a channel defined in the chassis plate and to a microstrip line on the opposite side of the plate. An electrically conductive gasket is placed about the feedthrough pin between the microwave module and chassis plate to reduce signal leakage and enhance ground continuity. An insulating sleeve is installed about the feedthrough pin in the chassis plate channel and provides a nominal clearance (e.g., 0.005 inches) within that channel to allow for manufacturing and assembly tolerances and to enable feedthrough impedance to be substantially insensitive to the position of the feedthrough pin and insulating sleeve within the channel.Type: GrantFiled: November 14, 2003Date of Patent: February 14, 2006Assignee: ITT Manufacturing Enterprises, Inc.Inventors: William L. Caplan, Nicholas S. Hodgman, Thomas B. Chamberlain, Michael S. Morningstar
-
Patent number: 6989790Abstract: A planar metal antenna mounted on a semiconductor body and incorporating an active circuit element, for example a diode, integrated in the path of the antenna. Connection between the antenna metal and a peripheral contact is provided by a connecting link of resistive sheet material sub-divided, by voids or by inclusions of high resistive material, into a number of conductive tracks each of width and spacing of dimension small compared with the width of the antenna. The link thus exhibits an effectively high sheet resistivity at high frequency—i.e. at a frequency at or near to the frequency of antenna resonance and thus affords effective hf isolation between the antenna and the contact. At the same time, at dc and at intermediate frequency, a relatively low resistance path is afforded for bias and for extraction of IF signal. The number, width and spacing of the tracks may be varied with distance from the antenna metal to minimize the dc resistivity.Type: GrantFiled: May 5, 1983Date of Patent: January 24, 2006Assignee: QinetiQ LimitedInventor: Huw David Rees
-
Patent number: 6972646Abstract: This invention is a filter circuit having a filter element. A filter element (4) is a parallel resonator circuit including a pair of first resonator lines (19a) (19b) formed by a thick film forming technique and a pair of second resonator lines (20a) (20b). As the thickness of the pair of second resonator lines (20a) (20b) is significantly reduced, the impedance ratio between the pair of second resonator lines (20a) (20b) and the pair of first resonator lines (19a) (19b) is increased. Therefore, the length of these pairs of resonator lines (19a) (19b) (20a) (20b) is reduced and miniaturization of the filter element is realized.Type: GrantFiled: April 29, 2005Date of Patent: December 6, 2005Assignee: Sony CorporationInventor: Takayuki Hirabayashi
-
Patent number: 6961229Abstract: An electronic circuit device having a power-supply structure capable of supporting fast signals in and above a GHz band is offered. A driver transistor is formed in a surface of a semiconductor substrate. Power-supply/ground pair transmission lines which provide the driver transistor with power and signal/ground pair transmission lines which transmit signals to a receiver are formed on the semiconductor substrate. The power-supply/ground pair transmission lines are connected to a drain layer of the driver transistor and a P+ layer in a P well. The signal/ground pair transmission lines are connected to a source layer of the driver transistor and a P+ layer in the P well.Type: GrantFiled: February 20, 2004Date of Patent: November 1, 2005Assignees: Sanyo Electric Co., Ltd., Oki Electric Industry Co., Ltd., Sharp Kabushiki Kaisha, Sony Corporation, Kabushiki Kaisha Toshiba, NEC Corporation, Hitachi, Ltd., Matsushita Electric Industrial Co., Ltd., Mitsubishi Denki Kabushiki Kaisha, Fujitsu Limited, Rohm Co., Ltd.Inventors: Kanji Otsuka, Tamotsu Usami
-
Patent number: 6958662Abstract: The invention relates to a device for guiding electromagnetic waves from a wave guide (10), in particular a multi-band wave guide, to a transmission line (20), in particular a micro strip line, arranged at one end of the wave guide (10), comprising coupling means (30-1, . . . , 30-7) for mechanical fixation and impedance matching between the wave guide (10) and the transmission line (20). It is the object of the invention to improve such a structure in the way that manufacturing is made easier and less expensive than according to prior art. According to the present invention that object is solved in the way that the coupling means comprises at least one dielectric layer (30) being mechanically connected with the main plane of the transmission line, the geometric dimension of that at least one dielectric layer extending along the propagation direction of the electromagnetic waves being correlated with the center frequency of electromagnetic waves in order to achieve optimised impedance matching.Type: GrantFiled: October 18, 2000Date of Patent: October 25, 2005Assignee: Nokia CorporationInventors: Olli Salmela, Markku Koivisto, Mikko Saarikoski, Kalle Jokio, Ali Nadir Arslan, Esa Kemppinen, Vesa Korhonen, Teppo Miettinen
-
Patent number: 6940361Abstract: The invention relates to a method for forming a self-aligned transition between a transmission line (1) and a module (2) to be connected to said transmission line (1). The invention equally relates to such a module (2), to such a transmission line (1), to an intermediate element (5) possibly to be positioned between such a module (2) and such a transmission line (1), and finally to a system comprising such a transition. In order to enable a simple and precise connection of a transmission line (1) with some other module (2), it is proposed to use matching solder particles (8) and soldering pads on module (2) and transmission line (1) or intermediate element (5) respectively, and to apply a reflow treatment to the joined elements (1) and (2) or (5) and (2), thereby forming a self-aligning connection. The invention is to be applied particularly to waveguide-to-microstrip transitions.Type: GrantFiled: October 6, 2000Date of Patent: September 6, 2005Assignee: Nokia CorporationInventors: Kalle Jokio, Olli Salmela, Markku Koivisto, Mikko Saarikoski, Ali Nadir Arslan
-
Patent number: 6933813Abstract: An interconnection structure includes: a dielectric layer; a first metallization pattern on the dielectric layer, the first metallization pattern including at least one etch stop having a perimeter defining at least one etch stop opening; a cured adhesive on a portion of the dielectric layer, the adhesive not present in an area aligned with the at least one etch stop; and at least one electrical device being attached to the dielectric layer by the adhesive such that an active area of the at least one electrical device is aligned with the etch stop perimeter. The active area of the at least one electrical device may further be aligned with at least one predetermined area defined by an optional additional portion of cured adhesive, the additional portion of the cured adhesive being adhesively attached to the dielectric layer and not adhesively attached to the at least one electrical device.Type: GrantFiled: November 12, 2003Date of Patent: August 23, 2005Assignee: General Electric CompanyInventors: William Edward Burdick, Jr., James Wilson Rose, Kevin Matthew Durocher, Raymond Albert Fillion
-
Patent number: 6917254Abstract: A method relating to a balun for transmitting a high degree of high-frequency power where metal sheet element is soldered onto the loop conductor tract of the symmetrical circuit loop, the conductor track being configured as a printed circuit. The metal sheet element is leaked with a cooling element on the electrically cold mass point of the loop.Type: GrantFiled: January 9, 2002Date of Patent: July 12, 2005Assignee: Rohde & Schwarz GmbH & Co. KGInventor: Bernhard Kaehs
-
Patent number: 6917262Abstract: An integrated microwave module comprising a conductive ground plane, a non-conductive substrate on the ground plane, at least two microwave circuits mounted on the substrate, a microstrip line between the microwave circuits mounted on the substrate, and a conductive cover closing the integrated microwave module. The substrate comprises a line of metallized holes along both sides of the microstrip line, and a strip of conductive paste is disposed between the lines of metallized holes and the conductive cover.Type: GrantFiled: April 5, 2002Date of Patent: July 12, 2005Assignee: AlcatelInventor: Philippe Poire
-
Patent number: 6914500Abstract: This invention is a filter circuit having a filter element. A filter element (4) is a parallel resonator circuit including a pair of first resonator lines (19a) (19b) formed by a thick film forming technique and a pair of second resonator lines (20a) (20b). As the thickness of the pair of second resonator lines (20a) (20b) is significantly reduced, the impedance ratio between the pair of second resonator lines (20a) (20b) and the pair of first resonator lines (19a) (19b) is increased. Therefore, the length of these pairs of resonator lines (19a) (19b) (20a) (20b) is reduced and miniaturization of the filter element is realized.Type: GrantFiled: December 12, 2002Date of Patent: July 5, 2005Assignee: Sony CorporationInventor: Takayuki Hirabayashi
-
Patent number: 6914280Abstract: Since a 5 GHz-band broadband has a frequency twice that of 2.4 GHz, the parasitic capacitance greatly influences deterioration in isolation of a switching device used in this frequency region. Therefore, to improve isolation, a shunt FET is added to the device. The switching device also includes a protecting element that has a first n+-type region, an insulating region and a second n+-type region. This protecting element is connected in parallel between two electrodes of the shunt FET. Since electrostatic charges are discharged between the first and second n+-type regions, the electrostatic energy reaching an operation region of the shunt FET can be reduced without an increase in parasitic capacitance.Type: GrantFiled: October 17, 2003Date of Patent: July 5, 2005Assignee: Sanyo Electric Co., Ltd.Inventors: Tetsuro Asano, Mikito Sakakibara, Yoshibumi Nakajima, Hidetoshi Ishihara
-
Patent number: 6911734Abstract: A high-frequency signal from a tape-shaped line section having a surface layer signal lead and surface layer GND lead disposed on both sides thereof is directly inputted to a semiconductor chip via a signal surface layer wiring of a package substrate and through solder bump electrodes. Alternatively, a high-frequency signal from the semiconductor chip is outputted to the outside via the tape-shaped line section in reverse. Owing to the transmission of the high-frequency signal by only a microstrip line at the whole surface layer of the package substrate, the high-frequency signal can be transmitted by only the microstrip line at the surface layer without through vias or the like. Accordingly, the high-frequency signal can be transmitted without a loss in frequency characteristic, and a high-quality high-frequency signal can be transmitted with a reduction in loss at high-frequency transmission.Type: GrantFiled: March 20, 2003Date of Patent: June 28, 2005Assignee: Hitachi, Ltd.Inventors: Hiroshi Kikuchi, Norio Nakazato, Hideko Ando, Takashi Suga, Satoru Isomura, Takashi Kubo, Hiroyasu Sasaki, Masanori Fukuhara, Naotaka Tanaka, Fujiaki Nose
-
Patent number: 6907178Abstract: The invention provides an optoelectronic assembly for coupling an optical conductor to a light emitting surface of an optoelectronic semiconductor device on a substrate. The optoelectronic assembly includes a multilayer having a cavity adapted to receive and electrically connect the optoelectronic semiconductor device to the multilayer substrate and a groove leading to the cavity and being adapted to receive and optically connect the optical conductor to the light emitting surface of said optoelectronic semiconductor device. The optoelectronic semiconductor device and the optical conductor are precisely positioned within the cavity and the groove, respectively, so that light emitted from the light emitting surface of the optoelectronic semiconductor device couples to an optical surface of the optical conductor.Type: GrantFiled: June 11, 2003Date of Patent: June 14, 2005Inventors: Steve Lerner, Claudio Truzzi
-
Patent number: 6894581Abstract: A monolithic non-linear transmission line and sampling circuit with reduced shock-wave-to-surface-wave coupling are presented herein. In coplanar-waveguide (CPW) technology, this reduced coupling is achieved by selecting properly the thickness of the semiconductor substrate, and by elevating the center conductor of the CPW above the substrate surface. The elevated center conductor is supported by means of conducting posts, and may be backed by a low-loss dielectric such as polyimide or silicon nitride. In coplanar-strip (CPS) technology, the reduction in coupling between shock waves and surface waves is achieved by controlling the substrate thickness as in the CPW case, and by elevating the coplanar strips above the substrate surface. The elevated strips are supported by a low-loss dielectric. The reduced coupling in both guiding media enhances the high-frequency performance of nonlinear-transmission-line-based circuits.Type: GrantFiled: May 16, 2003Date of Patent: May 17, 2005Assignee: Anritsu CompanyInventor: Karam Michael Noujeim
-
Patent number: 6888428Abstract: A high frequency semiconductor integrated circuit includes a main circuit, a circuit block, a pad, and a wire. The main circuit includes an input terminal, a transistor, transmission lines, a pad, and an output terminal. The circuit block includes a passive circuit and a capacitor. The pad is disposed close to the circuit block. The wire connects the pad to the pad included in the main circuit. In the high frequency semiconductor integrated circuit, the main circuit outputs an input signal input at the input terminal from the output terminal through the transistor, the transmission line, the pad, and another transmission line. As a result, the high frequency semiconductor integrated circuit can realize various performances and can be used in many applications.Type: GrantFiled: October 10, 2001Date of Patent: May 3, 2005Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Ko Kanaya, Shin Chaki
-
Patent number: 6884656Abstract: A semiconductor device includes a mount substrate, a high-frequency transmission line provided on a top surface of the mount substrate, and a semiconductor chip mounted on the top surface of the mount substrate in a facedown state in electrical contact with the high-frequency transmission line, wherein there is formed a depression on the top surface of the mount substrate.Type: GrantFiled: July 23, 2003Date of Patent: April 26, 2005Assignee: Ricoh Company, Ltd.Inventor: Kazuhiko Adachi
-
Patent number: 6882858Abstract: There is provided a flexible board including (a) an internal layer, (b) a line formed in a first area of the internal layer, the line radiating unnecessary radiation, (c) a first ground layer formed on an upper surface of the internal layer, the first ground layer disallowing radiation to pass therethrough, and (d) a second ground layer formed a lower surface of the internal layer, the second ground layer disallowing radiation to pass therethrough. The flexible board prevents unnecessary radiation from outwardly radiating without an increase in a size thereof.Type: GrantFiled: November 22, 1999Date of Patent: April 19, 2005Assignee: NEC CorporationInventor: Yoshimasa Hosonuma
-
Patent number: 6882239Abstract: An electromagnetic interconnect method and apparatus effects contactless, proximity connections between elements in an electronics system. Data to be communicated between elements in an electronic system are modulated into a carrier signal and transmitted contactlessly by electromagnetic coupling. The electromagnetic coupling may be directly between elements in the system or through an intermediary transmission medium.Type: GrantFiled: May 8, 2001Date of Patent: April 19, 2005Assignee: FormFactor, Inc.Inventor: Charles A. Miller
-
Patent number: 6882241Abstract: A signal line of a data bus includes first wires on a first board and a second wire on a second board. The second board is installed on the first board to connect the first and second wires with each other in series to establish the signal line. Semiconductor devices are connected with the second wire. In such data bus system, impedance of the second wire is decided according to additional capacitance of the semiconductor device on the second board in order to harmonize impedance of the first board with impedance of the second board.Type: GrantFiled: September 26, 2002Date of Patent: April 19, 2005Assignee: Elpida Memory, Inc.Inventors: Hisashi Abo, Hiroaki Ikeda
-
Patent number: 6873228Abstract: A multilayered, low temperature co-fired ceramic (LTCC) substrate within which one or more capacitors are formed (e.g., for power supply decoupling). Self-resonance is introduced by the capacitance of each capacitor interacting with an inductance formed by the interconnects (e.g., conductive vias and other conductive interconnects among the electrode patterns), which couple such capacitor to its respective circuit electrode and interface electrode (e.g., ground reference).Type: GrantFiled: September 30, 2003Date of Patent: March 29, 2005Assignee: National Semiconductor CorporationInventor: Christopher Barratt
-
Patent number: 6870438Abstract: A wiring board includes a dielectric substrate, a signal transmission line formed on one surface of the dielectric substrate, a grounded layer formed on the other surface of the dielectric substrate, and a connection portion for connecting portion for connecting the signal transmission line to a waveguide, the connection portion being formed on the grounded layer. The grounded layer has a slot at a position opposed to an end of the signal transmission line. The connection portion includes a first dielectric portion disposed to cover the slot of the ground layer, a second dielectric portion laminated on the first dielectric portion, and a patch conductor provided at a position opposed to said slot on an interface between the first dielectric portion and the second dielectric portion. The wiring board enables the signals to be efficiently transmitted from the signal transmission line to the waveguide with a small loss and a small reflection.Type: GrantFiled: November 10, 2000Date of Patent: March 22, 2005Assignee: Kyocera CorporationInventors: Naoyuki Shino, Shinichi Koriyama, Kenji Kitazawa, Hidehiro Minamiue
-
Patent number: 6867669Abstract: Method and apparatus for interfacing a circuit, such as a microcircuit, with an IC. The circuit is formed on a thick film dielectric structure supported by a substrate having a cut out to receive the IC. A ground plane is formed on the substrate. The thick film dielectric structure abuts the cut out with an area having at least two projections forming at least one recess, the edge of the recess having a conductive layer in electrical communication with the ground plane. A conductive pad on top of the dielectric structure is in electrical communication with the conductive layer in the recess. A ground connection on the IC is connected to the conductive pad thereby grounding the IC.Type: GrantFiled: June 23, 2003Date of Patent: March 15, 2005Assignee: Agilent Technologies, Inc.Inventors: Lewis R. Dov, John F. Casey
-
Patent number: 6856209Abstract: An electronic module configured to suppress electromagnetic radiation is disclosed. The electronic module has a plurality of electronic components disposed therein. The module includes a module housing, a circuit board, and a plurality of capacitors. The module housing is made of an electrically conductive material. The circuit board has a ground plane and is fixed to the module housing. The plurality of capacitors are coupled at first end to the ground plane and at a second end to the housing. Further, the capacitors are connected electrically in parallel and are uniformly spaced within the electronic module.Type: GrantFiled: September 27, 2002Date of Patent: February 15, 2005Assignee: Visteon Global Technologies, Inc.Inventors: David Y. Tsang, Gregory Allen Jacobs, Igor Belokour
-
Patent number: 6853073Abstract: The present invention relates to a microwave electronic device (1) comprising a metal enclosure (2) having a bottom (21) and a lid (23) and containing an electronic circuit board (3) disposed substantially parallel to said bottom and to said lid, said circuit board having: conductive bottom and top grounding layers (41, 42) respectively disposed on bottom and top faces (31, 32) of the circuit board, and perforations (7a) transverse to said faces of the circuit board and delimited by conductive walls (71) for electrically interconnecting said layers (41, 42). At least some of said walls (71) are electrically connected to the lid of the enclosure by conductive grounding members (8a). Each conductive member (8a) has a metal blade covered with a material (13, 13?) for absorbing microwaves.Type: GrantFiled: May 22, 2003Date of Patent: February 8, 2005Assignee: Avanex CorporationInventors: Didier Pillet, Benjamin Thon, Dominique Baillargeat, Serge Verdeyme
-
Patent number: 6849879Abstract: A method and apparatus are disclosed for reducing crosstalk and dispersion in a crosspoint monolithic microwave integrated circuit (MMIC) switch array operating in a range between DC and microwave frequencies. In accordance with an exemplary embodiment, the crosspoint MMIC switch array includes a dielectric stack, a substrate, a first ground plane, a plurality of thyristor switches, a plurality of signal transmission lines arranged in rows; and a plurality of signal transmission lines arranged in columns. The plurality of signal transmission lines arranged in columns intersect the plurality of signal transmission lines arranged in rows at a plurality of intersection points. Each of the plurality of thyristor switches is associated with one of the plurality of intersection points. Each of the plurality of thyristor switches is in electrical contact with the signal transmission lines that intersect at the associated intersection point.Type: GrantFiled: October 15, 2002Date of Patent: February 1, 2005Assignee: Teraburst Networks, Inc.Inventors: Ross A. La Rue, Jules D. Levine, Daniel Curcio, Timothy Boles, Joel Goodrich, David Hoag, Noyan Kinayman
-
Patent number: 6847275Abstract: A ground electrode and a terminal electrode are formed on a first main surface of dielectric substrate forming a circuit board. Wiring electrodes are formed on a second main surface of the dielectric substrate. A semiconductor device and a filter are mounted on the wiring electrodes. A strip line electrode of the filter is connected to the ground electrode of the circuit board for conducting direct current, via a through-hole provided in the filter, a ground electrode of the filter, the wiring electrode, and a through-hole provided in the circuit board. With this arrangement, the terminal electrode is connected to a high-frequency signal terminal of the semiconductor device via the filter.Type: GrantFiled: October 10, 2001Date of Patent: January 25, 2005Assignee: Murata Manufacturing Co., Ltd.Inventors: Kazuya Sayanagi, Akihiro Sasabata, Yutaka Sasaki
-
Patent number: 6838953Abstract: An RF microcircuit package and interconnection device is disclosed which minimizes impedance mismatch between circuit elements. Multiple signal via and close proximity ground vias as well as tuned wire bonds are disclosed.Type: GrantFiled: August 26, 2002Date of Patent: January 4, 2005Assignee: Hei, Inc.Inventors: River (Guanghua) Huang, Parker Chandler
-
Publication number: 20040257194Abstract: Disclosed are methods for making microwave circuits using thickfilm components, the thickfilm components including: a first, multi-layer thickfilm dielectric deposited on a ground plane; a thickfilm conductor deposited on the first thickfilm dielectric; a second, multi-layer thickfilm dielectric deposited on the first dielectric and conductor to encapsulate the conductor; a thickfilm ground shield layer deposited over the first and second dielectrics; and thickfilm resistors deposited in close proximity to the first and second dielectrics.Type: ApplicationFiled: June 19, 2003Publication date: December 23, 2004Inventors: John F. Casey, Lewis R. Dove, Ling Liu, James R. Drehle, R. Frederick Rau, Rosemary O. Johnson
-
Publication number: 20040257179Abstract: Method and apparatus for interfacing a circuit, such as a microcircuit, with an IC. The circuit is formed on a thick film dielectric structure supported by a substrate having a cut out to receive the IC. A ground plane is formed on the substrate. The thick film dielectric structure abuts the cut out with an area having at least two projections forming at least one recess, the edge of the recess having a conductive layer in electrical communication with the ground plane. A conductive pad on top of the dielectric structure is in electrical communication with the conductive layer in the recess. A ground connection on the IC is connected to the conductive pad thereby grounding the IC.Type: ApplicationFiled: June 23, 2003Publication date: December 23, 2004Inventors: Lewis R. Dov, John F. Casey
-
Publication number: 20040239454Abstract: An interface to a microcircuit formed on a substrate supporting a ground plane. The substrate supports a dielectric structure having gold coated sloped sidewalls electrically connected to the ground plane. A transmission line, connected to the microcircuit, is supported by the dielectric structure. A coaxial cable is connected to the transmission line. The coaxial cable having an end stripped at an angle substantially the same as the sloped side walls of the dielectric structure, wherein the exposed length of the center conductor is bonded to the transmission line, and the outer conductor of the coax cable is bonded to the gold plating on the dielectric structure such that the angled portion of the coax cable mates with the bevel of the thick film dielectric.Type: ApplicationFiled: May 30, 2003Publication date: December 2, 2004Inventors: Lewis R. Dove, Robert E. Alman, James P. Stephens, Michael T. Powers, Michael B. Whitener
-
Patent number: 6822541Abstract: The electromagnetic wave absorber of the present invention is made of a sintered body that contains Fe and at least one element selected from Si, Mg, Zr, Ni, Al and Co, and an attenuation of electromagnetic wave is 2 dB or more at frequencies of 10 GHz and higher so as to provide good electromagnetic wave absorbing characteristic with no corrosive gas generated at all, and is easy to manufacture. The electromagnetic wave absorber is used mainly as a component of a high-frequency circuit package.Type: GrantFiled: April 25, 2003Date of Patent: November 23, 2004Assignee: Kyocera CorporationInventors: Toshiyuki Sue, Kouji Enokida, Yoshihiro Okawa
-
Patent number: 6822529Abstract: In an interconnect system for providing access to a common I/O terminal for multiple circuit devices such as drivers, receivers and electrostatic protection devices implemented on an IC, each such device is provided with a separate contact pad within the IC. The contact pads are linked to one another and to the IC I/O terminal though inductive conductors such as bond wires, metalization layer traces in the IC, or legs of a forked, lithographically-defined spring contact formed on the IC. The conductor inductance isolates the capacitance of the circuit devices from one another, thereby improving characteristics of the frequency response of the interconnect system. The inductances of the conductors and various capacitances of the interconnect system are also appropriately adjusted to optimize desired interconnect system frequency response characteristics.Type: GrantFiled: December 29, 2003Date of Patent: November 23, 2004Assignee: Formfactor, Inc.Inventor: Charles A. Miller
-
Patent number: 6816041Abstract: A microwave monolithic integrated circuit (MMIC) assembly and related method are disclosed. A dielectric substrate has a surface on which radio frequency circuits and microstrip lines are formed. At least one MMIC chip opening is dimensioned for receiving therethrough a MMIC chip. A metallic carrier is mismatched as to coefficient of thermal expansion to the dielectric substrate and includes a component surface adhesively secured to the dielectric substrate on the surface opposing the radio frequency circuits and microstrip lines. At least one raised pedestal is on the component surface that is positioned at the MMIC chip opening. A MMIC chip is secured on the pedestal and extends through the MMIC chip opening for connection to the radio frequency circuits and microstrip lines. Stress relief portions are formed in the metallic carrier that segment the carrier into subcarriers and provide stress relief during expansion and contraction created by temperature changes.Type: GrantFiled: November 19, 2003Date of Patent: November 9, 2004Assignee: Xytrans, Inc.Inventors: Danny F. Ammar, Gavin Clark
-
Patent number: 6812805Abstract: In one aspect, the invention relates to a waveguide structure for differential transmission lines. The waveguide structure includes a first ground structure, a first signal line, a second ground structure, a second signal line, a third ground structure. The first signal line is typically positioned adjacent and substantially parallel to the first ground structure. The second ground structure has a first separation distance from the first ground structure and is typically positioned adjacent and substantially parallel to the first signal line. The first signal line is typically positioned between both the first and second ground structures. The second signal line typically a has a second separation distance from the first signal line and is positioned adjacent and substantially parallel to the second ground structure. The second ground structure is typically positioned between both the first and second signal lines.Type: GrantFiled: July 26, 2002Date of Patent: November 2, 2004Assignee: Multiplex, Inc.Inventor: Liang D. Tzeng