Abstract: A method and an arrangement for synchronizing a receiver for digital signals are described. The synchronizing information is derived from the center of distribution of the squared channel impulse response, which center of distribution is calculated directly from the sampling values of the channel frequency response. Thus a separate calculation of the channel impulse response via an inverse Fourier transform from the channel frequency response is unnecessary. The channel frequency response can be determined in a simple way by correlation of a received signal with a reference signal stored in memory in the receiver.

Abstract: In a method and system for transmitting digital data, a data acceptance clock signal generator that has a controllable clock frequency in a peripheral module is correspondingly adapted to clock frequency information derived from a synchronization pulse train transmitted by a central unit. The same oscillator is used as a frequency source for determining the clock frequency information and for generating the data acceptance clock pulse. In this manner, simple RC oscillators are adequate to fulfill any requirements of long time accuracy of the oscillator. The clock frequency can be changed in that the central unit simply transmits altered clock frequency information. It is also possible to carry out an adjustment or adaptation in the case of deviations of the oscillator frequency in the peripheral unit.

Abstract: A method for modulating a radio signal has the steps of: predetermining a first time interval so as to define a data word; generating a synchronization pulse, the synchronization pulse initiating a single data word having a length of the predetermined first time interval; and generating a single data pulse within the data word after a second time interval with respect to the synchronization pulse, the length of the second time interval defining at least one character. Defining at least one character by a single data pulse after a second time interval with respect to the synchronization pulse enhances an energy efficiency of the transmitted radio signal while mitigating a duty cycle thereof.

Abstract: A multi-bit packet carried on an optical network includes a marker pulse. A bit-rate clock for use in a bit-level operation on the packet is generated by replicating the marker pulse. The bit-level operation may comprise retiming, regeneration or demultiplexing. The marker pulse may be distinguished by a fixed, bit-asynchronous time relationship to the rest of the packet.

Abstract: An ATM communication system including a plurality of communication nodes connected in a loop form by buses, buffers disposed in each communication node, a synchronizing pulse generation circuit for conducting cell demultiplexing of all communication nodes at the same timing, storage devices disposed in each communication node to store mounting position information of the communication node and slot generator position information, and a circuit used by each communication node to automatically transmit and receive cells on the basis of position information described above.

Abstract: A device is disclosed for detecting a frame synchronous signal which has been applied to a communication system for indicating a starting point of transmitted data. The frame synchronous signal detector includes a parallel converter, a detector, and a buffer. The parallel converter sequentially divides parallel data into segments. The detector compares data of each of the segments with the data of the frame synchronous signal which has been mapped, and from this comparison, precisely detects the data of the frame synchronous signal even though data having an abnormal format is inputted.

Abstract: A system and method for jointly determining initial tap coefficients for a maximum likelihood sequence estimating equalizer and a timing error of an incoming signal, in one embodiment, receives the incoming signal into a receiver, and locates a known portion within a time frame of the incoming signal. The known portion is compared with a stored representation of the known portion, and with a stored representation of a derivative of the known portion. The initial tap coefficients and timing error of the incoming signal are jointly determined based on the comparing of the known portion with the stored representations, and a subsequent known portion is located within a subsequent time frame of the incoming signal based on the timing error. The initial tap coefficients are passed to a maximum likelihood sequence estimating equalizer.

Abstract: A method and an apparatus for searching code division multiple access pilot signal energies includes limiting a pilot signal window size above a lower limit and only analyzing search result data corresponding to an instructed pilot signal window size. A central processing unit instructs a searcher receiver within a mobile station modem application specific integrated circuit to search for pilot signal energies within an instructed pilot signal search window unless the instructed pilot signal window size is smaller than a pilot signal window size lower limit. In such a case, the pilot signal search window size is artificially designated as the pilot signal window size lower limit to prevent excessive search completion interrupts from over utilizing central processing unit resources.

Abstract: A burst detector (140) detects the occurrence of a burst in a signal receiver. A filter (220) having an impulse response characteristic of an expected burst filters a received signal. A subtractor (230) subtracts a filtered version of the received signal from a delayed and filtered version of the received signal to provide a detection signal. A burst edge detector (250) detects a leading edge of the burst based on the detection signal.

Abstract: An ATM communication system including a plurality of communication nodes connected in a loop form by buses, buffers disposed in each communication node, a synchronizing pulse generation circuit for conducting cell demultiplexing of all communication nodes at the same timing, storage devices disposed in each communication node to store mounting position information of the communication node and slot generator position information, and a circuit used by each communication node to automatically transmit and receive cells on the basis of position information described above.

Abstract: In multiplex serial data communication circuit network and method, a clock information is always output from a single transmission control apparatus having an oscillation source onto a single signal transmission line. Any one of the other transmission control apparatuses carries out a serial data transmission with the clock pulse signal superposed on the data to be transmitted via the single transmission line. In addition, any one of the transmission control apparatuses extracts the clock information from the clock information superposed data signals on the single transmission line and takes an operation timing within all transmission control apparatuses from the extracted clock pulse signal. Furthermore, a remote DC motor control system and method using the multiplex serial data communication circuit network described above are exemplified. Master station and slave stations in the DC motor control system can be integrated into each plurality of ICs.