Abstract: A method for transmitting concatenated data signals wherein an STM-256/OC-768 signal is divided into four concatenated signals which are inserted into modified STM-64/OC-192 pulse frames. The bytes of the unused information and the frame alignment words of the STM-256/OC-768 signal are not transmitted so that the total content of the STM-256/OC-768 signal, reduced by this redundant information, can be transmitted transparently in the modified STM-64/OC-192 pulse frames. The concatenated signals can be regenerated without problems.

Abstract: A hybrid serial/parallel bus interface has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block.

Abstract: The present invention involves the passing of clock information from a point where a tributary payload is mapped into a carrier to a point where a tributary payload is de-mapped from the carrier. A synchronization signal is generated at the mapping end. Rather than sending clock phase information implicitly by means of the data, as is normally the case, a value of the synchronization signal at a given time, is sent explicitly, independent from the payload data.

Abstract: A method and system for managing inverse multiplexing over ATM is disclosed. In one embodiment, a method for use in a digital communications network, comprises monitoring a plurality of links to determine state changes of the links. An IMA-ID check is enforced when an insufficient links state is reached. The IMA-ID check is relaxed when all the links are in an error state. An IMA-ID check is re-enforced when at least one link of the plurality of links recovers from an error state.

Abstract: A method, a device and a system for delay equalizing of fragment data streams transmitted via N individual paths and forming a virtual data stream, wherein the virtual data stream and each of said fragment data streams consisting of data frames; the method including gradual minimization of differential delay of the fragment data streams at one or more intermediate points between a source point and a destination point of the virtual data stream. The gradual minimization of the differential delay can be provided by devices (30, 32) respectively fitted at the intermediate points; each of the devices comprises a control unit (36) and N memory buffer blocks (34), each associated with a respective individual path.

Abstract: A system and method are provided for paralleling data streams in a G.709 network of connected integrated circuits. The system comprises a demultiplexer for receiving a first digital wrapper data stream having a first data rate. The demultiplexer demultiplexes the first data stream into a second plurality of digital wrapper data streams having a second data rate, less than the first data rate. A second plurality of processors each accept a corresponding one of the second plurality of data streams and supply a processed data stream at the second data rate. The demultiplexer receives frame alignment signal bytes in the overhead of every first data stream frame and synchronizes frame alignment signal bytes in each of the second plurality of data streams to the frame alignment signal bytes in the first data stream.

Abstract: A high data rate switch is disclosed. The switch may include fiber optic channels where a plurality of switching elements necessarily operate at a significantly lower data rate providing routing of variable or fixed size data packets from a plurality of source ports to a plurality of destination ports via a single serial link. This is may be provided by storing the high rate data temporarily in memory in each of the source ports and then downloading it at a lower rate in a complete data packet to a designated switching element, almost immediately distributing the next data packet that has been received by the source port to a next switching element. The switching element configuration provides automatic redundancy and a minimum amount of frame overhead while sustaining throughput at the high data rate.

Abstract: Disclosed is a serial data mapping apparatus and method for mapping DS serial data into VC parallel data which includes an STM-1 address generating unit for generating a mapping address; a VC mapping unit for mapping a DS asynchronous signal into a VC signal as byte unit, according to the mapping address; and an STM-1 formatting unit for pointer processing and multiplexing a virtual container of the mapped VC signal and generating an STM-1 signal.

Abstract: The preferred embodiment of the present invention provides an improved transport demultiplexor that can receive and filter different data types before sending the data to system memory. The preferred embodiment provides a string comparator to facilitate real time filtering of continuous incoming data before loading the data into system memory. The string comparator preferably uses a bit-maskable matching filter that filters system data in real time as the data is being delivered to system memory. When data matching the filter is located, the destination address of that data is determined and delivered to the processor. This allows the processor to quickly locate the desired data and thus facilitates the real time processing of that data.

Abstract: The present invention relates to a computer network and a method for using the network The network and method employ powered multiplexing connection devices which electronically couple two or more network devices to the network. The signals from the network devices to the network are multiplexed at the powered multiplexing connection devices and the signals from the network to the network devices are demultiplexed at the powered multiplexing connection devices. The multiplexing enables the various work-center devices to communicate with the network and, in some cases, to receive power over the network connection. The intelligent electronic circuitry is also capable of aiding in network security and management and in monitoring the status of the network infrastructure.

Abstract: Method, system and computer products are provided for re-mapping and interleaving transport packets of multiple transport streams for processing by a single transport demultiplexor. The re-mapping and interleaving technique ensures unique identification of transport packets associated with multiple transport streams to be multiplexed onto a transport channel for demultiplexing by a single transport demultiplexor. At least one PID re-map table is employed having re-map values indexed by n possible PID values of transport packets associated with at one transport stream of the multiple transport streams. The n possible PID values is less than or equal to the number of PID values which can be handled by the single transport demultiplexor, and is less than all possible PID values of transport packets within the multiple transport streams.

Abstract: A transmit and receive system for transmitting data between a transmit site and a receive site. The system includes a tunnel source, router and modulator for dividing a transmit data stream having a first bit rate into multiple data streams with each of the multiple data streams having a bit rate which is lower than the first bit rate, transmitting each of the multiple data streams over a plurality of RF channels. The system further includes a demodulator and destination source for recombining the multiple data streams at the receive site to provide a receive data stream having a bit rate equal to the first bit rate.

Abstract: An inverse multiplexer device has an input port for receiving a stream of data packets, a plurality of output ports for connection to outgoing physical links, and transmit buffers for preparing outgoing packets. An expansion port can receive packets from the transmit buffers and transfer them through a corresponding expansion port on another like inverse multiplexer to designated output links on the other inverse multiplexer. A controller outputs the data packets on a group of any of the aid links in accordance with an inverse multiplex protocol. The multiplexers can be thus cascaded to increase the number of output links that can be accommodated.

Abstract: A network connection device allowing high-speed data conversion to ensure sufficiently high throughput is disclosed. The network connection device includes a plurality of conversion processors and a layer-4 switch. The layer-4 switch forwards an incoming IP packet to a selected one of the plurality of conversion processors depending on a result of analyzing the IP packet at layer 4. Therefore, the processing of data packet and the processing of control packet can be performed in parallel by the plurality of conversion processors, resulting in high-speed packet transfer.

Abstract: A concatenated signal carrying an arbitrary mix of concatenated data traffic is split and transported across a network between a start node and an end node through a hyper-concatenated connection set up through independent pointer processor state machines. At a start node, the concatenated optical signal is split into two or more hyper-concatenated data streams. If a split occurs at a frame within a concatenated signal, the start node replaces a concatenation indicator of the frame with a payload pointer from a first frame of the concatenated signal and inserts a split indicator in the SS bits of the frame overhead. At an end node, the hyper-concatenated data streams are recombined to recover the original concatenated signal. Frames containing split indicators are modified to remove the split indicator and to replace the payload pointer with a concatenation indicator.

Abstract: A transport stream (TS) demultiplexer has a TS input switch unit and an output switch unit, whereby inputs and outputs can be selected as desired, external output can be easily changed by changing selected information of the TS input switch unit and the output switch unit, without changing inputs. Therefore, the TS demultiplexer receives a plurality of TSs such as MPEG-2 TSs and DSS TSs, and can selectively demultiplex the TSs, and particularly, the TS demultiplexer can store the TSs in a storage medium such as a hard disc drive, or it can easily transmit the TS data over an IEEE1394 bus or a PCI bus.

Abstract: A technique is provided for striping packets across pipelines of a processing engine within a network switch. The processing engine comprises a plurality of processors arrayed as pipeline rows and columns embedded between input and output buffers of the engine. Each pipeline row or cluster includes a context memory having a plurality of window buffers of a defined size. Each packet is apportioned into fixed-sized contexts corresponding to the defined window size associated with each buffer of the context memory. The technique includes a mapping mechanism for correlating each context with a relative position within the packet, i.e., the beginning, middle and end contexts of a packet. The mapping mechanism facilitates reassembly of the packet at the output buffer, while obviating any any out-of-order issues involving the particular contexts of a packet.

Abstract: An apparatus and method for integrating the delivery of data from a multiplicity of sources to a set of user electronic devices that present audio, video and digital information to the user is implemented. These devices may include conventional television displays, personal computers, and other conventional audio and video equipment. Information may be received from a multiplicity of sources which may include may include digital television via terrestrial or satellite broadcast, terrestrial analog radio, and digital data exchanged via a public network, such as the Internet. The mechanism of the present invention receives the multiplicity of data streams, processes them in accordance with each stream's formatting protocols (whether an analog stream, an MPEG Transport Stream, or TCP/IP stream, for example), including any conditional access protocols, and streams the processed data, in multiplexed transport stream to the user's presentation devices via a “fat” pipe, such as a FireWire™ bus.

Abstract: A system and method are provided for determining link characteristics in order to calculate the optimal data rate because of a link failure. The system includes a first unit (20, 22) at a first location coupled to one end of each of a plurality of low capacity data links (28) for assisting in determining the characteristics of each of the links (28), a second unit (22, 20) at the second location coupled to the other end of each of the links (28) for assisting in determining the characteristics of each of the links (28) based on the characteristics of the test signal received at the second unit (22, 20), and a processor coupled to the second unit (22, 20) for determining the optimal transmission rate based on the characteristics of the links (28) and the number of links (28) needed to provide the desired transmission rate.

Abstract: The data transmission and reception system comprises a data transmitter and a data receiver. The data transmitter generates and transmits a high-speed serial signal through a transmission path and the data receiver receives the serial signal. The data transmitter, when forming the frame for every tributary signal, inserts into the frame a frame bit indicating a boundary of the frame and, after having formed the frame, performs only a bit synchronization with respect to every tributary signal. On the other hand, the data receiver, for a respective tributary signal, stores a data indicated by the tributary signal and, in a timing based on a detection of the frame bit of the tributary signal and a reference frame pulse commonly issued between tributary signals, outputs the stored data to thereby perform the tributary synchronization.

Abstract: The present invention relates to a serial interface transmission system with more than one data line, in which the transmitted data has in-band and out-of-band characters. More particularly, the present invention relates to methods and systems for sending side channel data over a high-speed digital communications link, e.g., a video link. One embodiment of the invention provides a high-speed digital transmitter capable of sending side channel data. The transmitter includes a channel zero encoder, a multiplexer, data enable out (DEout) control logic, and a channel one encoder. The channel one encoder receives input from the channel one multiplexer and the channel one DEout control logic. Another embodiment of the invention provides a high-speed digital receiver capable of receiving side channel data. The receiver includes a channel zero decoder, a channel one decoder, DEI signal and FIFO control signal recovery logic, and a channel one de-multiplexer.

Abstract: A system and method for processing control cells to prevent event missequencing and data loss are described. At least one control unit is processed to retrieve communication information related to data received along one or more communication links in a network. The at least one control unit is then stored in one or buffers. Finally, the at least one control unit is further processed to retrieve link information related to the one or more communication links.

Abstract: In a communications system, a network provides multiple physical paths for communicating packets between participants of communication sessions. During a communication session, elements of the network route packets such that the packets are separated for communication to a destination using multiple physical paths.

Abstract: The present invention provides methods and apparatus for creating a Program Association Table (PAT) for a reduced portion of a multiplexed data stream, when the multiplexed data stream has been reduced, for example, to carry fewer services over a cable television plant. More particularly, the present invention provides methods and apparatus for creating a PAT for a desired combination of multiplexed data stream subgroups contained within an incoming data stream, when the incoming multiplexed data stream is reduced. The invention enables a new PAT to be output which correctly corresponds to the services in a reduced data stream (e.g., for cable-side transmissions). The present invention is particularly useful when reducing high data rate satellite television data streams for cable-side transmission.

Abstract: A decoder is provided which includes a demultiplexing unit for separating a multiplexed stream into plural streams by a demultiplexing process and a decoding unit for carrying out a decoding process for one of the plural separated streams, wherein the decoder selects one of the plural separated streams to output the same to the decoding unit such that a decoding process for one stream in the decoding unit is switched to a decoding process for another stream. The decoder is thus able to decode plural streams composing a multiplexed stream with one decoding unit.

Abstract: A method for increasing bandwidth utilization of a transmission channel having a first bandwidth capacity and operative at a first transmission rate, the method including the steps of providing one or more input bit streams each having a transmission rate that does not exceed that of the first transmission rate, dividing the one or more input bit streams into a plurality of sub-streams, each having a bandwidth lower than the first bandwidth capacity, selecting a group of sub-streams out of the plurality of sub-streams which group has a combined bandwidth just lower than the first bandwidth capacity, carrying the selected group of sub-streams over the transmission channel, and assembling the selected group of sub-streams into an output bit stream.

Abstract: A communications system comprises a physical layer device (PLD) including a PLD send interface which, in turn, includes PLD parallel information outputs and at least one PLD control output. The system also includes a logical link device (LLD) which comprises an LLD receive interface which, in turn, includes LLD parallel information inputs and at least one LLD control input. First parallel communications channels connect the PLD information outputs to respective LLD information inputs, and at least one second communications channel connects the at least one PLD control output to the at least one LLD control input so that control signals are sent from the PLD to the LLD out-of-band from information signals. Accordingly, control speed is enhanced, and information throughput efficiency is not compromised.

Abstract: An outer encoder and an inner encoder encode subsets of information to be transmitted, to improve protection by adding redundancy. The redundancy permits decoding of the information from less than a complete encoded block of information. The use of a combiner at an outer decoder enables better outer decoding of symbols.

Abstract: A switching system. The switching system includes a first switch having a primary receive port and a secondary receive port. The switching system includes a second switch connected to the first switch. The second switch has n receive ports, where n is greater than or equal to 2 and is an integer. The second switch has m transmit ports, where m is greater than or equal to 2 and is an integer. The transmit ports are decoupled from the receive ports. The second switch has a connecting mechanism that includes a multicast mechanism which sends data out a primary transmit port of the m transmit ports to the primary receive port of the first switch to define a primary path, and out a secondary transmit port of the m transmit ports to a secondary receive port of the first switch to define a redundant path to the primary path so that if there is a failure of the primary path to provide the data to the first switch, the data is received by the first switch through the redundant path.

Abstract: In accordance with a specific aspect of the present invention, a compressed video stream, such as an MPEG-2 video stream, is received by a transport demultiplexor, synchronized, parsed into separate packet types, and written to buffer locations external the demultiplexor. Adaptation field is handled by a separate parser. In addition, primary elementary stream data can be handled by separate primary elementary stream parsers based upon the packet identifier of the primary elementary stream. Video packets can be parsed based upon stream identifier values. Specific packets of data are stored in one or more system memory or video memory buffers by an output controller based upon allocation table information. Private data associated with specific elementary streams or packet adaptation fields are repacketized, and written to an output buffer location. In specific implementations, the hardware associated with the system is used to acquire the data stream without any knowledge of the specific protocol of the stream.

Abstract: A broadband communication system in which a central office is connected to a high speed network utilizes various LMDS architectures of the present invention to expand network capabilities. For example, LMDS architectures may extend the reach of the existing land line network, and reduce the cost of network expansion.

Abstract: A semi-transparent time division multiplexer/demultiplexer that transmits low rate tributaries from one location to another using a high rate aggregate connection, while preserving substantially all of the TOH and payload for each tributary signal. Transparency of the tributary TOH is accomplished by interleaving both the TOH and the Payload of each tributary into the high rate aggregate signal. Some TOH bytes may be tunneled or re-mapped into unused/undefined TOH locations in the aggregate signal to allow transparency of the TOH without corrupting the aggregate. Errors may be handled by tunneling BIP bytes into unused/undefined aggregate locations and updating the tunneled bytes with error masks calculated at each network elements. Alternatively errors may be forwarded by using an error mask generated from the tributary BIP locations and inserting the mask into the associated aggregate BIP locations. The mask in the aggregate BIP is updated with error masks calculated at each network elements.

Abstract: An integrated circuit with a signal demultiplexor for separating out two signals of different magnitudes from within a multiplexed signal without requiring a large capacitance for signal filtering. A multiple-threshold input comparator stage separates the multiplexed input signal into a first fully demultiplexed signal and a first partially demultiplexed signal. The first fully and partially demultiplexed signals are logically processed in an Exclusive-OR gate to produce a second partially demultiplexed signal which is then time-delayed and gated by the first fully demultiplexed signal. The resultant gated signal is low pass filtered to produce a second fully demultiplexed signal.

Abstract: The present invention discloses a method and apparatus for cross-connecting high-speed telecommunications signals at a cross-connect apparatus. The cross-connect apparatus can transmit the telecommunications signals from an input interface card to a cross-connect card, and from the cross-connect card to an output interface card without any synchronization information. Synchronization of the signals is accomplished with circuitry contained on the interface cards and the cross-connect card. The cross-connect apparatus also includes a control unit for managing the control and timing of the apparatus.

Abstract: Disclosed herein is a gateway arrangement for receiving first and second types of traffic. The arrangement includes first and second gateways. The first gateway is arranged to separate the first and second types traffic. The first type of traffic is output to the second gateway. The second gateway is arranged to extract information from the first type of traffic and output the extracted information to the first gateway. The first gateway has an output interface arranged to output the second type of traffic dependent upon the extracted information.

Abstract: A demultiplexer for channel interleaving in communications systems with multiple carriers and/or transmitter diversity includes a distribution module that distributes data bits in succession to successive transmitter antennas, and a switching module coupled to the distribution module. The distribution module routes one data bit to each antenna such that no data bit is routed to the same antenna as the previous data bit. The switching module controls the distribution module to skip an antenna in the routing process once each time a predefined number of data bits has been routed. Alternatively, the switching module may control the distribution module to repeat an antenna in the routing process once each time a predefined number of data bits has been routed. The transmitter antennas may, in the alternative, be different carrier frequency bands.

Abstract: The invention concerns a data packet switching unit (26) associated with a node (20) in a network (10) and having several input/output ports for the packets. The unit is wherein it has: a number n of intermediate ports (70, 80, 90, 100) disposed between input/output ports of a first (40, 50, 60) and second (C) type, a port of the second type being able to support an internal connection to the node (20), at least one storage means (72, 77) associated with each intermediate port, means (A) of transferring a packet between at least one so-called input port and at least one so-called output port and which uses at least one intermediate port and said at least one associated storage means.

Abstract: Several methods of processing index data in an index node having a circular-queue type structure for adding, deleting, and searching a value in the index node are disclosed. According to the present invention, when a set of values stored in storage blocks is required to be shifted when adding, deleting, or searching a value in the index node, the circular-queue type structure formed by storage blocks in the index node enables the set of data be shifted in a manner that minimizes the number of the total value shifts. Therefore, the data processing time of the database system can be greatly reduced. The described methods can be applied to an Electronic Program Guide (EPG) database system and many others.

Abstract: An access aggregator may receive a data stream from a first computing device. The access aggregator may divide the data stream into a plurality of sub-streams. Then, the access aggregator may transmit the sub-streams over multiple wireless communication channels to a network interface. The network interface can then send the sub-streams to a second computing device. Similarly, the second computing device may send data to the network interface, where the data is divided into sub-streams. The sub-streams can be sent to the access aggregator over multiple wireless communication channels and then sent to the first computing device.

Abstract: Systems, methods, and computer program products for parsing a packetized, multi-program transport stream are disclosed. A packetized, multi-program transport stream is received in a demultiplexer. Program specific information is extracted from the program stream and displayed on a user interface. A user may select a program from the program stream for further processing. The user interface generates a signal indicative of the selected program, and the demultiplexer output is configured based on the selection signal.

Abstract: A novel and useful mechanism of synchronizing and aligning a plurality of data streams. The invention comprises a plurality of sync machines and an alignment circuit which in combination function to synchronize and align multiple variable length cell streams. Each sync machine is operative to control the output clocking of a corresponding FIFO queue. The data stream output of each FIFO queue is monitored by a sync machine and all the sync machines are coupled to the alignment circuit. In operation, the sync machines synchronize to the cells by searching for the error checks sequence (ECS) at the end of each cell. Upon synchronization being achieved for all the data streams, the alignment circuit causes each sync machine to freeze its respective FIFO until the ECS arrives on the data stream most delayed in time. Once the ECS is received on the slowest data stream, the alignment circuit releases the hold and consequently the FIFOs are released by the sync machines.

Abstract: A system for transparently transporting m synchronous data streams as an aggregate data stream on a single channel of a Wave Division Multiplexed (WDM) optical link without pointer processing uses m unique encoding schemes to enable recovery of the respective m data streams from the aggregate data stream. The encoding schemes are preferably self-inverting. The respective m data streams are parsed into data units and encoded. The data units are then interleaved to form the aggregate data stream. Recovery is accomplished using a reverse process.

Abstract: An inverse multiplexing method for transmitting data via multiple data links and a system for implementing same. Efficient utilization of links having disparate data rates is provided by apportioning data units to the links in proportion to their data rates. Rather than perform the apportioning algorithm in real time, the algorithm is executed off-line, and the results recorded as a mapping vector. The mapping vector is used by the transmitter to apportion data units to the links, and by the receiver to re-assemble the data units.

Abstract: A multiplexed audio data decoder apparatus is provided in which integration of an audio decoder is easy, and has a high flexibility when the number of the formats to be processed is increased or when the specification is changed. In an external ROM 60 there are accumulated a plurality of decoding program codes corresponding to respective plural methods for compressing and encoding. A controller means 50 transfers the decoding program code corresponding to the method for compressing and encoding after changing thereof, from the external ROM 60 to an internal RAM 25. A DSP 22 starts decoding processing by using the decoding program code which is transmitted into the internal RAM 25.

Abstract: In a digital broadcasting signal receiving/recording/reproducing apparatus, a recorded program can be immediately reproduced without performing complicated operations. Only a desired program and information related to the desired program are separated to be extracted from the digital broadcasting signal. Then, the separated/extracted broadcasting signal is supplied to a recording/reproducing apparatus. In the recording/reproducing apparatus, the supplied broadcasting signal is recorded, and the recorded program can be immediately reproduced without complicated manipulating operations during the signal reproducing operation.

Abstract: The streaming-media input port provides an inexpensive way to get a video signal from an audio/video device (such as a camcorder) into a personal computer in a convenient streamable media format (e.g., Windows Media Format). This streaming-media input port is an external hardware device that captures media content (i.e., video and audio) input, compresses it, converts it to an immediately streamable media (ISM) format, and sends it to a coupled computer for immediate storage or use. Such a use is transmission over the Internet to a streaming media player. This use allows for a “live” transmission from a typical analog video camera. The computer receiving media data in the ISM format from the streaming-media input port does not need to decompress and recompress the media data. It may directly save to storage or transmit to the streaming media player. It may do so without any modifications to the format of the media data.

Abstract: Circuitry for a node of an optical communication network is configured to mux (i.e., combine) one or more incoming customer signals for transmission as a single outgoing optical signal and to demux (i.e., split) an incoming optical signal into one or more outgoing customer signals, where the muxing and demuxing clocks are selected from one or more customer clocks recovered from the one or more customer signals, an input clock recovered from the incoming optical signal, and a local clock generated by a local clock generator. When configured for an add/drop configuration, the circuitry selects (1) the muxing clock from the one or more customer clocks, the input clock, and the local clock and (2) the demuxing clock from the input clock and the local clock. When configured for a drop/continue configuration, the circuitry is configured to select both the muxing and demuxing clocks from either the first input clock or the local clock.

Abstract: A digital device, such as a digital VTR, receives and records an MPEG compatible datastream. On play back, the DVTR inserts packetized auxiliary information, such as on-screen display information, into the transport datastream for transmission to another digital device, such as a television receiver. Time stamps in the MPEG compatible datastream are unaffected by the insertion of the auxiliary information. The DVTR VSB modulates the datastream to provide sufficient bandwidth for the auxiliary information in the datastream.

Abstract: A method to restore the original order of packets in an end-to-end data flow after the flow has been multiplexed over a set of communication or switching paths whose available bandwidth varies significantly over time. To convey the relative path ordering, the method considers all possible path pairs. For each such path pair it enumerates the packet block transmissions, i.e., the sequences of packets transmitted on a selected path of the given path pair which are not interleaved by the packets transmitted on the other path of the same pair. Packet block enumeration for each path pair is performed independently and does not take into account any packets transmitted on the other paths. A packet transmitted on a given path carries a set of packet block identifications for each path pair the given path belongs to. Increasing the range of the packet block enumeration, the robustness of the method can be adjusted to an arbitrary level of packet loss tolerance.

Abstract: Disclosed is a time-division multiplexer for demultiplexing, into individual time slots, time-division multiplexed data in a receive direction received from a network via a trunk unit, and sending the data to a prescribed tributary unit, and for multiplexing, to a prescribed time slot, data in a transmit direction which enters from tributary units and sending the data to the network via the trunk unit. The time-division multiplexer has a trunk bus to which a trunk unit is connected and a tributary bus to which tributary units are connected, and a time-slot interchange unit provided between these buses, wherein interchange of cross-connected time slots on the trunk side and time slots on the tributary side is performed dynamically by the time-slot interchange unit.