Abstract: Normally ordered robust VSB data are reordered in accordance with a first interleave to produce reordered robust VSB data. The reordered robust VSB data and ATSC data are reordered in accordance with a second interleave to produce normally ordered robust VSB data and reordered ATSC data. The normally ordered robust VSB data and reordered ATSC data are time multiplexed for transmission to a receiver. The receiver discards the reordered ATSC data or the normally ordered robust VSB data depending upon receiver type or user selection. A robust VSB receiver is able to process the normally ordered robust VSB data upstream of an outer decoder without an interleave thereby avoiding the delay associated with an interleave.

Abstract: A multi-channel communication link generates a transport data protocol unit (TPDU) corresponding to each data packet received at a particular interface in a packet switching network. Each TPDU may comprise a data packet in accordance with a standard data transfer protocol and a modified header comprising a sequence number responsive to the relative position of the data packet within a data stream. The multi-channel communication link may inverse multiplex the various TPDUs for transmission across a plurality of asynchronous communication lines. A multi-channel communication link in accordance with the present disclosure may comprise a source first-in first-out (FIFO) buffer, a source line multiplexer/demultiplexer, a plurality of asynchronous communication links, a destination line multiplexer/demultiplexer, and a destination FIFO buffer. The present disclosure also provides a method for transferring data between computing devices via a virtual transport link.

Abstract: In decoding a data signal that is associated with a compressed video signal and a compressed audio signal in digital broadcast and is multiplexed in digital broadcast, a digital broadcast receiver according to the present invention efficiently decodes the data signal when the data signal includes a compressed video signal or a compressed audio signal and the compression method used for the compressed video signal or the compressed audio signal is the same as that used for the compressed video signal or the compressed audio signal multiplexed in the digital broadcast.

Abstract: In order to allow various user setups associated with a communication using a plurality of communication channels, the number of communication channels used in a communication with a single partner is varied depending on whether or not the automatic answering mode is set. The number of communication channels used in the communication with the single partner can be independently set in correspondence with transmission and reception. The number of communication channels used in the communication with another communication partner can be independently set in correspondence with whether an incoming call or a call origination request is detected.

Abstract: A real-time load-balancing system for distributing a sequence of incoming data packets emanating from a high speed communication line to a plurality of processing means, each operating at a capacity that is lower than the capacity of the high speed communication line; the system according to the invention comprises: a parser capable of extracting a configurable set of classifier bits from the incoming packets for feeding into a compression means; the compression means is capable of reducing a bit pattern of length K to a bit pattern having a length L which is a fraction of K; a pipeline block for delaying incoming packets until a load balancing decision is found, and an inverse demultiplexer for receiving a port identifier output from said compression means as selector and for directing pipelined packets to the appropriate output port.

Abstract: An encoding device includes a processor unit controlling an overall operation and at the same time having a software for executing an audio encoding process, a video encoding unit to execute a video encoding process, a multiplex process unit to execute a system process and a timing control unit to generate a timing signal for activating an audio encoding process, a video encoding process and a system process, all of these elements are mountable on the same substrate. Each of a control process for controlling the audio encoding process, the video encoding process and system process is executed as an interrupt process. The processor unit includes an interrupt control circuit. The interrupt control circuit selects, based on a predetermined priority, one interrupt process corresponding to at least one generated timing signal.

Abstract: A system (10) for communicating information includes a connecting link (50) to communicate ATM cells. A first switching system (14) receives ATM cells for at least first and second virtual circuits using a first link (20) and communicates ATM cells for the second virtual circuit using the connecting link (50). A second switching system (14) receives ATM cells for at least the first and second virtual circuits using a second link (20) and communicates ATM cells for the first virtual circuit using the connecting link (50). The first switching system (14) receives the ATM cells for the first virtual circuit from the second switching system (14), using the connecting link (50), and sequences all ATM cells for the first virtual circuit using first IMA functionality (80).

Abstract: The transmission system comprises a transmitter (10) and a receiver (14). The transmitter (10) can transmit a number of multiplex signals (12) to the receiver (14). The receiver (14) comprises storage means (20) for storing data sections included in the multiplex signals (12) in dependence on information present in the multiplex signals (12). The information for the complete set of multiplex signals (12) is contained in a single information section in at least one of the multiplex signals (12).

Abstract: The invention relates to an arrangement for deriving an ancillary signal from a compressed digital video signal (e.g. MPEG). The ancillary signal comprises selected parts of the main signal, for example, the DC coefficients of I-pictures, or the unscrambled parts. The ancillary signal thus obtained can be used for display in a (multi-) picture-in-picture television receiver, or as an “appetizer” in order to encourage the user to pay a subscription fee. The ancillary signal can separately be recorded in digital video recorders so as to assist the user in finding the beginning of a scrambled program on tape. The ancillary signal can also be generated at the transmitter end and transmitted at a low bit rate. A decoder for decoding such an ancillary signal is considerably simpler and less expensive than a full-spec MPEG decoder.

Abstract: An information reproduction apparatus which can perform repetitive reproduction is provided. In the apparatus, Information read from an information recording medium is decoded by the plurality of decoding devices. Then a source of an output of the information reproduction apparatus is switched among outputs of a plurality of the decoding devices. If a start position to start repetitive reproduction is designated, another decoding device except one decoding device whose output is currently switched as the source is controlled so as to be able to begin to decode the information on and after the start position. Then if a start instruction is provided, the source is switched from the output of the one decoding device to the output of the another device. Further, the another decoding device is controlled to decode the information on and after the start position, and the one decoding device is controlled to be able to begin to decode the information on and after the start position.

Abstract: The preferred embodiment of the present invention provides an improved receiver that can receive and process many different data types in addition to decoding MPEG-2 transport streams. The preferred embodiment minimizes hardware complexity by using the same loaders for both MPEG-2 and alternative stream data. The preferred embodiment utilizes a bypassable synchronizer and a bypassable packet parser to allow alternative data streams to be sent to system memory for decoding by a the host processor. When receiving MPEG-2 transport streams, the bypassable synchronizer and bypassable packet parser are used to synchronize and filter the MPEG-2 transport stream. The parsed MPEG-2 streams are then loaded into a packet buffer and passed to the video and audio decoders. When non-MPEG-2 stream data is provided, the bypassable synchronizer and bypassable packet parser instead forward the data to the packet buffer without performing synchronization or filtering.

Abstract: A communications system utilizes, inverse multiplexing to transfer wide band signals over a plurality of narrow band links. To enable efficient use of the available links, incoming data whether or not cell or packet based, is inverse multiplexed in a byte format regardless of packet boundaries into virtual containers. Overhead signals are generated to enable the original data to be reassembled at the receiving end.

Abstract: In a stream demultiplexing device, a synchronous clock signal is supplied to a header processing unit only when a header is being inputted and processed in the header processing unit, and supplied to a payload processing unit only when a payload is being inputted and processed in the payload processing unit. By such cutting off the synchronous clock signal supply to the header processing unit and the payload processing unit while they are not active, power consumption in the stream demultiplexing device is reduced.

Abstract: A high speed demodulator system is comprised of an analog to digital converter (ADC); a high speed demultiplexer connected to an input of the ADC; a bank of parallel programmable demodulators connected to an output of the high speed demultiplexer; a timing interface connected to the bank of parallel programmable demodulators; and a phase reference interface connected to the bank of parallel programmable demodulators and a data processor. A parallel programmable demodulator includes a reconfigurable FIR filter, has an input port for receiving digital input signals and an output coupled to a coherent signal processor and a coherent memory. The programmable FIR filter provides filtered signals to the coherent signal processor for storage in the coherent memory. The integrated circuit further includes a sequential weight processor having an input coupled to an output of the coherent memory.

Abstract: A method for reconstructing an aggregate stream of cells transmitted over communication links in an asynchronous transfer mode protocol includes determining a respective link delay for each of the communication links, including determining a fastest communication link. A common starting cell at which the cells from the communication links will correspond in time is determined based upon the fastest communication link. The method further includes filling a respective delay compensation buffer with corresponding cells for each of the communication links beginning with the common starting cell. The cells are read from the delay compensation buffers in a round-robin fashion to reconstruct the aggregate stream of cells.

Abstract: Techniques relating to aligning data bits in frequency synchronous data channels are disclosed. The techniques include determining a phase relationship between clock signals in a pair of data channels. If the clock signals are determined to be out-of-phase, the data bits in a particular one of the data channels may be reordered.

Abstract: A bit stream demultiplexer that couples a high-speed bit stream media to a communication Application Specific Integrated Circuit (ASIC). The bit stream multiplexer performs its demultiplexing function staged within at least two integrated circuits. The first Integrated Circuit (IC) receives a first bit stream and performs a first demultiplexing function. A second IC performs a second demultiplexing function. The second IC acts as either a slave or a master to the first IC. In a slave mode, the second IC depends upon a transmit data clock from the first IC for latching bit stream data received from the first IC. When the second IC operates in the master mode, the second IC uses the transmit data clock from first IC as a reference input for a PLL to generate a Receive Data Clock. If an LOL or LOS occurs within the first IC, a signal to the second IC indicates these conditions causing the second IC to switch to a local oscillator reference clock to generate the Receive Data Clock.

Abstract: In the operation of an MPLS network or the like, a network node receives a plurality of packets assigned to a label switched path (LSP) which exits the node on a link bundle. The node forwards the received packets such that packets assigned to the LSP are distributed over two or more distinct component links of the bundle.

Abstract: A termination device for connection to a group of TDM (time division multiplexed) trunks is capable of sending cells over one or more links either individually or as part of an inverse multiplexed group. The device includes a Utopia interface for receiving an incoming cell stream, a buffer for storing incoming cells at specific memory locations identified by pointers obtained from a queue of available pointers, a round robin scheduler for sequentially assigning cells to links forming an IMA group or individually in the UNI mode, and a pointer queue for each channel address, the pointer queue indicating the location of the next cell to be transmitted for each virtual channel. An adaptive shaper determines when a stuff cell is inserted and a per link output circuit places cells on the links, which can operate in CTC or ITC mode. The device can operate in mixed mode where up to four IMA and/or up to eight UNI channels can be supported concurrently. The links assigned to the IMA or UNI channels is programmable.

Abstract: The streaming-media input port provides an inexpensive way to get a video signal from an audio/video device (such as a camcorder) into a personal computer in a convenient streamable media format (e.g., Windows Media Format). This streaming-media input port is an external hardware device that captures media content (i.e., video and audio) input, compresses it, converts it to an immediately streamable media (ISM) format, and sends it to a coupled computer for immediate storage or use. Such a use is transmission over the Internet to a streaming media player. This use allows for a “live” transmission from a typical analog video camera. The computer receiving media data in the ISM format from the streaming-media input port does not need to decompress and recompress the media data. It may directly save to storage or transmit to the streaming media player. It may do so without any modifications to the format of the media data.

Abstract: In an ATM cell multiplexing apparatus for assembling data, which arrives from multiple terminal lines, into cells, time-division multiplexing the cells and transmitting them to a network, traffic management is performed in each cell assembler, based upon service category and traffic, for every channel accommodated by the terminal lines, and traffic management on a per-cell-assembler basis is performed in an ATM bus scheduler taking into consideration service categories and traffic of all channels accommodated by the cell assemblers. Further, the ATM bus scheduler creates a main schedule table and a subschedule table, which is referred to after the main schedule table, for allocating more transmission privileges to a cell assembler that accommodates a CBR channel, and grants transmission privileges to the cell assemblers upon referring to the main schedule table and subschedule table.

Abstract: A digital arrangement for selecting a channel coefficient and DC estimate comprises a demultiplexer receiving a digital input signal splitting the digital input signal into a first and second signal, a first joint detection unit receiving the first signal generating a first channel coefficient and DC estimate, a second joint detection unit receiving the second signal generating a second channel coefficient and DC estimate, a first and second error determination unit receiving the first and second channel coefficients and DC estimates, respectively for generating a first and second error signal, a decision unit receiving the first and second error signal generating a control signal, and a selection unit controlled by the control signal for selecting the first or second channel coefficient and DC estimate.

Abstract: It is an object of the present invention to provide an optical transmission system in which multiple optical frequencies can be efficiently used and the change of the system can be easily made, and to provide an optical demultiplexer suitable for such optical transmission system. In an optical demultiplexer according to the present invention, signal light having a plurality of wavelength components arranged on a grid having predetermined frequency intervals is input from an input port thereof to be demultiplexed. The demultiplexed signal lights output from the output ports thereof have a plurality of wavelength components, respectively, and any three wavelength components, fa, fb, and fd, that satisfy the following conditions: fa<fb<fd; and fd−fa≦N&Dgr;f have the following relationship: 2fb≠fa+fd where N represents an integer, and &Dgr;f represents each of the predetermined frequency intervals.

Abstract: A method, apparatus, and system are provided for multi-link extensions and bundle skew management. According to one embodiment, multiple parallel links between a central processing unit (CPU) and a peripheral device are combined into a single channel, and cells on the various links are received in a round-robin order, and variations in flight time between the various links are compensated through a timer at each receive port of the bundle.

Abstract: A transport stream demultiplexer which receives transport stream packets and outputs data included the packets, has functions of judging whether a received transport stream packet is a null packet, and, if the received transport stream packet is a null packet, prohibiting writing data included in the received transport stream packet thereinto.

Abstract: A demultiplexer for selectively demultiplexing ATM signals and MPEG signals received at an input of the demultiplexer, the demultiplexer comprising an MPEG demultiplexer for demultiplexing an MPEG transport stream, an ATM section for identifying MPEG transport stream data in an ATM signal, and a selection unit for selectively connecting the input to the MPEG demultiplexer or the ATM section according to whether the received signal is an MPEG signal or an ATM signal, wherein the demultiplexer comprises a memory shared between the demultiplexer and the ATM section and the ATM section processes ATM signals by storing the received signals in the memory and providing the MPEG demultiplexer with addresses appropriate for the MPEG demultiplexer to retrieve demultiplexed data from the memory.

Abstract: A SERDES (serializer/deserializer) time domain multiplexer/demultiplexer multiplexes N input signals into a single output signal. In multiplexing the N input signals, each input signal utilizing its respective clock is latched in a respective one of N latches whose respective outputs are respectively inputted into N circular buffers. The outputs of the N circular buffers are inputted to a multiplexer whose output is outputted to a latch. In demultiplexing an input signal into N output signals, the input signal is latched in N respective latches whose outputs are inputted to N respective circular buffers. The outputs of the N respective circular buffers are inputted to N respective output latches. The N output latches are clocked by N respective output clock inputs which are different from the N respective input clocks used to clock the N respective input latches.

Abstract: A method and system for demultiplexing packets of a message is provided. The demultiplexing system receives packets of a message, identifies a sequence of message handlers for processing the message, identifies state information associated with the message for each message handler, and invokes the message handlers passing the message and the associated state information. The system identifies the message handlers based on the initial data type of the message and a target data type. The identified message handlers effect the conversion of the data to the target data type through various intermediate data types.

Abstract: A stream of incoming digital signals (Ia) is split (10) into a plurality of derived streams (Ib) that are sent over respective transmission links (R). The derived streams transmitted in this way (Ic) are then bundled again (20) to form a stream of outgoing digital signals (Id). At the transmission end, symbols are inserted into the derived streams (Ib) simultaneously and at constant intervals (T), in order to subdivide the transmitted information into packets of equal duration and aligned in time when being transmitted. At the reception end, the above symbols associated to the transmitted derived streams (Ic) are generally time-shifted as a consequence of the transmission over the various transmission links (R). At the reception end (20) the time alignment of the above symbols is recovered so as to recover the time alignment of the various transmitted derived streams (Ic), so that the subsequent bundling can take place on the streams correctly time-aligned.

Abstract: A method and system of combining a plurality of parallel communication channels to emulate a single high-bandwidth communication channel. A continuous stream of packets are grouped as traffic aggregates and assigned to queues associated with the plurality of parallel communication channels. The assignment and reassignment of traffic aggregates to the queues is performed dynamically based on measuring the queue load ratios associated with the lengths of the queues for each of the parallel communication channels. Grouping of existing and future packets as traffic aggregates is based on common attributes shared by the packets such as common source and destination IP addresses.

Abstract: A network device includes a port and a bus transmission calculation module. The port is connected to the network device to receive a data burst. The bus transmission calculation module connects to the port for calculating a first number of bytes to be transmitted from a first bus and a second number of bytes to be transmitted from a second bus. The first and second bus connect to the network device and transfer data from the network device.

Abstract: A demultiplexer apparatus has a plurality of integrating circuits which operate in parallel. The plurality of integrating circuits receive in parallel an input time-series binary data. One of the plurality of integrating circuits in a current stage converts the input binary data into multi-value data in the current stage, and generates recovery data in the current stage based on the multi-value data and recovery data from one of the plurality of integrating circuits in a stage immediately or more previous to the current stage integrating circuit. The plurality of integrating circuits output the generated recovery data as parallel data to the input binary data. In this way, the demultiplexer apparatus which can read the input binary data with a frequency component exceeding a maximum operation frequency is provided.

Abstract: A processing apparatus for processing multiple video programs from one or more transport streams. The processing apparatus has a transport processing circuit that includes multiple transport processor units. The transport processor units utilize a common transport processor memory unit having demux context entries containing processing and hardware state information for packet types. Each transport processor unit includes a transport interface for identifying data packets to be acquired from the transport stream, a demultiplexing processor for processing the acquired data packets, and a demultiplexing DMA unit for memory handling operations ofthe processed data packets. Index chaining allows the transport processor units to access information from the transport processor memory unit. The method uses indices to access demux context entries from the transport processor memory unit. Related DMA indices are used to access memory handling information from the transport processor memory unit.

Abstract: A single ATM traffic stream is carried over a plurality of lower bandwidth media, such as T-1 or E-1 interfaces, using inverse multiplexing assisted by a prepended byte at the beginning of each ATM cell, the byte containing a key to permit recovery of the proper order of ATM cells.

Abstract: A serial interface for interfacing communications traffic, e.g. frame based voice traffic, with a cell or packet based communications network, the interface comprises; a transmit unit and a receive unit, the units being coupled via a first serial line and one or more further serial lines. The transmit unit has packetising means for packing the communications traffic into micro-packets, each having a header portion containing control information and a payload portion. The payloads and control information are transmitted in parallel respectively over the first and further serial lines to the receive unit The receive unit has means for receiving the transmitted payloads and for relating the corresponding control information thereto.

Abstract: A demultiplexer for selectively demultiplexing ATM type signals and MPEG type signals received at an input of the demultiplexer, the demultiplexer comprising an MPEG demultiplexer for demultiplexing an MPEG transport stream, an ATM section for identifying MPEG transport stream data in an ATM type signal, and means for selectively connecting the input to the MPEG demultiplexer or the ATM section according to whether the received signal is an MPEG type signal or an ATM type signal, wherein the demultiplexer comprises a memory shared between the demultiplexer and the ATM section and the ATM section processes ATM type signals by storing the received signals in the memory and providing the MPEG demultiplexer with addresses appropriate for the MPEG demultiplexer to retrieve demultiplexed data from the memory.

Abstract: The processor (24) retrieves from a memory (22) values of a signal recovered from received wireless signal and demultiplexes and de-interleaves them simultaneously. The system can be operated in reverse to produce a multiplexed, interleaved data stream for wireless transmission.

Abstract: There is disclosed a method and a system for multiplexing data from a plurality of user data sources across an ATM adaption layer type-2 connection, in which a multiplexed trunk group extends across a plurality of common part sub-layer protocol data unit (CSU-PDU) mini-cells, and across a plurality of ATM cells. Large trunk groups are assembled by use of a single bit continuation indicator in the service specific convergence sub-layer header (SSCS) of successive CPS-PDU mini-cells. A packet payload type field (PPT) of the common part sub-layer (CPS)/service specific convergence sub-layer (SSCS) is used to indicate timing of changes in number of user data sources in a trunk group and provides for robust error recovery on loss of a single CPS-PDU mini-cell.

Abstract: A mapping memory, for use with a transmitter, for mapping a first signal segment and a second signal segment of a packet so that each signal segment has the same average power level. Each signal segment is characterized by a different modulation format. The first signal segment might use BPSK, while the second signal segment might use QAM, having multiple amplitude levels.

Abstract: A coding apparatus of the present invention comprises coding circuit 1 for audio signals, coding circuit 2 for video signals, interface circuit 3 on input of scene data, coding circuit 4 for scene data, composition circuit 5, multiplexing circuit 6, display circuit 7 and clock generating circuit 8. Each of coding circuits 1, 2 and 4 outputs time information representing a decoding timing, and composition circuit 5 outputs time information representing a composition timing. Multiplexing circuit 6 multiplexes time information together with the compressed data given from each of coding circuits 1, 2 and 4, thereby generating a bit stream.

Abstract: In a method of communicating a plurality of parallel data packets from a first data parallel bus to a second parallel data bus, each of the plurality of parallel data packets is separated into a first portion and a second portion. Each first portion is converted into a first serial data stream and each second portion is converted into a second serial data stream. The first serial data stream is transmitted over a first serial data channel and the second serial data stream is transmitted over a second serial data channel. The first serial data stream is converted into a plurality of first received portions and the second serial data stream is converted into a plurality of second received portions. Selected first received portions are combined with corresponding selected second received portions so as to regenerate the plurality of parallel data packets.

Abstract: A broadband communication system in which a central office is connected to a high speed network utilizes various LMDS architectures of the present invention to expand network capabilities. For example, LMDS architectures may extend the reach of the existing land line network, and reduce the cost of network expansion.

Abstract: An apparatus for and a method of establishing a connection between a source and destination node using multiple parallel paths. To establish a connection, bandwidth capacity on one or more parallel paths are aggregated and combined to form a route having a bandwidth larger than any single path. A technique similar to inverse multiplexing is used at the source end to split the cell stream into multiple parallel paths. At the destination end, the parallel multiple cell streams are inverse demultiplexed and the multiple cell streams combined into a single cell stream. The parallel routes are established by building parallel VCCs for the same call via the network. The ATM signaling process at the source and destination nodes is modified to accommodate multiple VCCs. In addition, the hardware at each source and destination node is configured to perform the inverse and inverse demultiplexing.

Abstract: A data multiplexing network is described which multiplexes a plurality of asynchronous data channels with an asynchronous data stream representing compressed voice signals and/or facsimile signals onto a single synchronous data packet stream. The single synchronous data packet stream is then transmitted by a high speed statistical multiplexer over a composite link to a second site using a modified high-level synchronous data link control protocol with an overlay of an advanced priority statistical multiplexing algorithm. The asynchronous data channels and the compressed voice channel and/or facsimile signals are demultiplexed and reconstructed for sending to other asynchronous computer terminals and to a standard telephone or facsimile analog port at the second site, respectively. PBX trunk interfaces are also provided to allow PBX's to share the composite link between sites. Communication between the first site by voice or facsimile and the second site is transparent to the users.

Abstract: A switch for routing information to one of a first and second outputs, respectively, is provided. The switch includes first and second multi-rail control paths, first and second mutex gates, and first and second demultiplexers. The first and second multi-rail control paths are cross connected into the first and second gates. Outputs of the first and second mutex gates are cross connected into the first and second demultiplexers. First and second data paths input to the first and second demultiplexers, respectively. Data on at least one the first and second data paths is routed to one of the first and second outputs based upon a state of the outputs of the first and second mutex gates.

Abstract: A transmission device on the side of subscriber terminals that have been divided into groups multiplexes, on a per-group basis, signals from the subscriber terminals, further time-division multiplexes the multiplexed data in each group and sends the time-division multiplexed data to a transmission device on the side of an exchange switch. The transmission device on the subscriber side senses the traffic states (on-hook/off-hook states) of the subscriber terminals and sends a signal indicative of the sensed states to the transmission device on the switch side.

Abstract: In a transmitter of a wireless communications system having M transmit antennas (10), each transmit antenna is supplied with a respective combined signal comprising a respective one of M groups each of N data sub-streams, orthogonally spread by N Walsh code sequences (W1 to WN). The N orthogonal code sequences used for each of the M groups comprise a respective one of M different combinations of N from Nw orthogonal code sequences, where Nw>N. M and N are integers greater than one. The combined signals can also include orthogonally spread pilot signals (WP) for channel estimation at a receiver. Orthogonality of the signals transmitted from the transmit antennas is increased, so that transmit signal power can be decreased and/or the receiver can have fewer than M receive antennas.

Abstract: In a communication network for transferring signals, e.g. according to the SONET or SDH standards, interconnecting node devices are provided consisting of parallel processing modules (9-T, 9-R). A plurality of processing modules with first and second interfaces rearrange/insert/extract tributary signals and configurable multiplexing/de-multiplexing components enable each processing module to access any portion of an arbitrarily preselected tributary signal. In a SONET/SDH system, signals between SONET/SDH frames are rearranged on incoming (20) and outgoing (26) main lines=Digital Cross-Connect, or tributary signals are transferred between frames and local lines (16-i-T, 16-i-R)=Add/Drop Function.

Abstract: An asymmetric digital subscriber line (ADSL) termination unit, which at the transmission end includes a descrambler and a compressor between its scrambler and interleaver. The present invention provides for the use of compression on the data in a channel to remove some of the inherent redundancy, in order to yield much better throughput, particularly in conjunction with certain powerful forward error correction (FEC) schemes. In this manner the compression may be performed on unscrambled data that has a higher redundancy than scrambled data, thereby improving compression. At the reception end, the ADSL termination unit includes a decompressor and a scrambler between its deinterleaver and descrambler.

Abstract: Disclosed is an apparatus for demultiplexing multiplexed data. This apparatus comprises a demultiplexer for receiving a multiplexed packet stream in which a plurality of object data are multiplexed, and demultiplexing the multiplexed data with reference to packet identification numbers added to the respective packets; a decoder for decoding M pieces of object data separated from the multiplexed data, and outputting M pieces of decoded object data; a memory for storing N pieces of information relating to a program and separated by the demultiplexer; a memory for storing object composition information separated by the demultiplexer; a memory for storing information relating to the object data and separated by the demultiplexer; a compositor for compositing the M pieces of decoded object data; and an information analyzer for analyzing the packet identification numbers from the N pieces of information relating to the program, the object composition information, or the information relating to the object data.