Synchronization Signals With Unique Amplitude, Polarity, Length, Or Frequency Patents (Class 375/364)
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Patent number: 8081726Abstract: A time synchronization device (TSD) that produces a synchronization signal and couples it onto energized power conductors in a power monitoring system. Monitoring devices coupled to the TSD include frequency detection algorithms, such as a Goertzel filter, for detecting the synchronization signal and interpreting the information encoded in the signal. The frequency of the synchronization signal may correspond to the fourth or tenth harmonic component of the fundamental frequency of the voltage on the power conductors. The magnitude of the signal is selected to be above the expected or established noise floor of the power monitoring system plus a predetermined threshold. The duration of the signal can be varied, such as lasting a full cycle of the fundamental frequency. Multiple TSD signals received in a predetermined sequence may be converted into digital words that convey time, configuration, reset, control, or other information to the monitoring device.Type: GrantFiled: May 10, 2007Date of Patent: December 20, 2011Assignee: Schneider Electric USA, Inc.Inventors: Jon A. Bickel, E. Avery Ashby
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Patent number: 8065052Abstract: A method and arrangement for correlating time in different time bases used by interconnected units by timestamping a reference event with a time determined with respect to a first time base. A message unit provides the time to a second interconnected unit that uses a second time base. A translation device is configured to calculate a difference between the time measured by the first time base and in the second time base. The difference is used to translate a time measured by the first clock to a time in a different time base at run time.Type: GrantFiled: October 30, 2006Date of Patent: November 22, 2011Assignee: Xinshu Management, L.L.C.Inventors: Lars-Berno Fredriksson, David Lindqvist
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Patent number: 8054865Abstract: A secure information transmission system includes one or more transmitters and one or more receivers. The transmission waveform employed includes highly randomized, independent stochastic processes, and is secured as a separate entity from the information it carries. The signal, using novel modulation methodology reducing impulse responses, has a paucity of spectral information and may be detected, acquired and demodulated only by communicants generating the necessary receiving algorithm coefficients. The physical area of signal reception is restricted to that of each intended communicant, reception areas following movements of mobile communicants. A unique instant in time is used as basis for communications keys to the securing algorithms dynamically generated on a one-time basis and never exchanged or stored by communicants.Type: GrantFiled: October 28, 2009Date of Patent: November 8, 2011Inventor: Edward G. Frost
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Patent number: 8054901Abstract: A method for generating a signal is presented. The method includes selecting a first set of carrier frequencies that are integral multiples of a first frequency interval, and selecting a second set of carrier frequencies that are integral multiples of a second frequency interval. The second frequency interval is an integral multiple of the first frequency interval and the second set is a subset of the first set. The method includes, for each of one or more signal carrier frequencies in the second set, selecting a plurality of associated carrier frequencies in the first set including a peak carrier frequency having substantially the same value as the signal carrier frequency, and modulating waveform frequency components at each of the selected plurality of associated carrier frequencies according to the same data value.Type: GrantFiled: August 5, 2009Date of Patent: November 8, 2011Assignee: Qualcomm Atheros, Inc.Inventors: Lawrence W. Yonge, III, Timothy J. Vandermey
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Patent number: 8045657Abstract: A method is provided for estimating a frequency offset in a carrier signal caused by the Doppler effect. The method determines a frequency offset estimate by utilizing a multi stage estimation scheme. More specifically, the method determines the frequency offset estimate of a data frame by iteratively estimating the frequency offset by comparing different portions of the preamble. As the length of the sampled patterns varies, the frequency offset estimates vary in accuracy and range. The method may adjust frequency offset estimates that are out of range. Finally, the receiver obtains a frequency offset estimate for the data frame from a weighted combination of frequency offset estimates. This method is applicable in WiFi (IEEE 802.11a/g), WiMax (IEEE 802.16), and WAVE (IEEE 802.11p) systems.Type: GrantFiled: September 26, 2008Date of Patent: October 25, 2011Assignee: The Regents Of The University Of MichiganInventor: Weidong Xiang
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Patent number: 8036256Abstract: A method of generating a code sequence in a wireless communication system is disclosed. More specifically, the method includes recognizing a desired length of the code sequence, generating a code sequence having a length different from the desired length, and modifying the length of the generated code sequence to equal the desired length. Here, the step of modifying includes discarding at least one element of the generated code sequence or inserting at least one null element to the generated code sequence.Type: GrantFiled: May 11, 2010Date of Patent: October 11, 2011Assignee: LG Electronics Inc.Inventors: Seung Hee Han, Min Seok Noh, Yeong Hyeon Kwon, Hyun Hwa Park, Hyun Woo Lee, Dong Cheol Kim
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Patent number: 8032916Abstract: An optical signal return path system analog RF signals are sampled using a master clock frequency, and combined with digital data such as Ethernet data at a cable node. The cable node sends the combined signals on a return path over a fiber optic medium to the cable hub. The cable hub extracts an approximate in-frequency replicate of a master clock signal, and can use the replicate master clock signal to desample the digitized RF signals back to analog. The cable hub can further use the replicate of the master clock signal to serialize Ethernet data, and send the Ethernet data back to the cable node via an optical cable in the forward direction. Accordingly, a single master clock signal can be used on a CATV network for encoding/decoding, and transmitting a variety of data signals, which enhances the integrity and reliability of the data signals.Type: GrantFiled: August 2, 2004Date of Patent: October 4, 2011Assignee: Finisar CorporationInventors: Randy Ichiro Oyadomari, Arthur Michael Lawson, Stephen Charles Gordy
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Patent number: 8023602Abstract: Serial data communication methods and apparatus using a single line are provided. The data communication methods may include: setting a rising edge of a serial pulse signal so that a cycle of the serial pulse signal begins therefrom; setting a falling edge of the serial pulse signal within the cycle of the serial pulse signal according to a data value recorded within the cycle of the serial pulse signal; and transmitting a packet formed by combining at least one cycle of the serial pulse signal in series via a single line.Type: GrantFiled: December 16, 2005Date of Patent: September 20, 2011Assignee: Samsung Electronics Co., Ltd.Inventor: Jong-Sang Choi
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Patent number: 8019025Abstract: Disclosed is a system and a training sequence setting method for performing frame synchronization in a wireless communication system. A received signal is affected by a frequency offset due to an oscillator mismatch between the transmitter and the receiver, which is one of the main causes of performance degradation of frame synchronization. In a prior Constant Amplitude Zero Auto-Correlation (CAZAC) sequence, the larger the frequency offset becomes, the more conspicuously the performance degradation of the frame synchronization occurs. The proposed training is designed to maintain a prior CAZAC property during a differential detection so as to perform a differential detection-based frame synchronization sequence insensitive to the frequency offset. As a result of performance verification, the proposed training sequence indicates that its performance of the frame synchronization is irrespective of the frequency offset, and has a better performance than the prior CAZAC sequence and random sequence.Type: GrantFiled: February 15, 2007Date of Patent: September 13, 2011Assignee: Sungkyunkwan University Foundation for Corporate CollaborationInventors: Sebin Im, Hyungjin Choi
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Patent number: 8014437Abstract: A system for implementing an orthogonal frequency division multiplexing scheme and providing an improved range extension. The system includes a transmitter for transmitting data to a receiver. The transmitter includes a symbol mapper for generating a symbol for each of a plurality of subcarriers and a spreading module for spreading out the symbol on each of the plurality of subcarriers by using a direct sequence spread spectrum. The symbol on each of the plurality of subcarriers is spread by multiplying the symbol by predefined length sequences. The receiver includes a de-spreader module for de-spreading the symbols on each of the plurality of subcarriers. The de-spreader module includes a simply correlator receiver for obtaining maximum detection. The correlator produces an output sequence of a same length as an input sequence and the de-spreader module uses a point of maximum correlation on the output sequence to obtain a recovered symbol.Type: GrantFiled: June 8, 2010Date of Patent: September 6, 2011Assignee: Broadcom CorporationInventor: Jason Alexander Trachewsky
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Patent number: 8005155Abstract: A system includes an input, a differential demodulation module, a magnitude measuring module, a summing module, and a metric generator module. The input receives input signals that include s sets of modulated sub-carriers carrying symbols, where s is an integer greater than or equal to 1. The differential demodulation module generates differentially demodulated signals based on the input signals. The magnitude measuring module measures magnitudes of real portions of the differentially demodulated signals. The summing module generates s sums, wherein each of the s sums is a sum of the magnitudes generated based on a respective one of the s sets. The metric generator module generates metrics for the symbols based on the s sums.Type: GrantFiled: December 18, 2007Date of Patent: August 23, 2011Assignee: Marvell International Ltd.Inventors: Jungwon Lee, Qing Zhao
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Patent number: 7961811Abstract: A radio transmitting apparatus and method thereof wherein a guard interval (GI) having a variable length allows a radio receiving apparatus to precisely and easily obtain a symbol synchronization. A GI adding part adds a short GI or a long GI to the head of each of a plurality of data parts. In a case of adding the long GI, the GI adding part copies the symbols of a portion of a second data part, which immediately follows a first data part, including the rear of the second data part, and then adds the copied symbols to the head of the first data part, thereby providing a second GI. Moreover, the GI adding part copies the symbols to a portion of the first data part including the rear thereof, and then adds the copied symbols to the head of the second GI, thereby providing the first GI.Type: GrantFiled: August 25, 2006Date of Patent: June 14, 2011Assignee: Panasonic CorporationInventors: Kenichi Miyoshi, Akihiko Nishio, Daichi Imamura
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Patent number: 7953137Abstract: A method of generating a code sequence in a wireless communication system is disclosed. More specifically, the method includes recognizing a desired length of the code sequence, generating a code sequence having a length different from the desired length, and modifying the length of the generated code sequence to equal the desired length. Here, the step of modifying includes discarding at least one element of the generated code sequence or inserting at least one null element to the generated code sequence.Type: GrantFiled: May 11, 2010Date of Patent: May 31, 2011Assignee: LG Electronics Inc.Inventors: Seung Hee Han, Min Seok Noh, Yeong Hyeon Kwon, Hyun Hwa Park, Hyun Woo Lee, Dong Cheol Kim
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Patent number: 7953189Abstract: When a correlation judging circuit judges that the correlation degree between r pulses in a reception signal and a generated substantially the same template as the r pulses is small, a pulse number adjusting circuit outputs a pulse number signal representing s pulses in place of the r pulses, and a template generating circuit generates the substantially the same template as the s pulses, whereby the correlation judging circuit judges the correlation degree between the r pulses in the reception signal and the generated substantially the same template as the s pulses. Accordingly, even when a confronted transmitter changes the number of pulses contained in a reception signal, synchronization capture of the reception signal can be established.Type: GrantFiled: March 6, 2008Date of Patent: May 31, 2011Assignee: Seiko Epson CorporationInventors: Isuke Karaki, Makoto Inoguchi
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Patent number: 7940866Abstract: The present invention is directed to a correlation interval synchronization apparatus and method. Correlation is firstly performed on received data, followed by searching peaks in accordance with the output of the correlation. Subsequently, peak intervals are acquired according to the peaks, and the peak interval where the synchronization head position resides is determined. Finally, the synchronization head position is identified within the associated peak interval.Type: GrantFiled: August 7, 2007Date of Patent: May 10, 2011Assignee: Via Technologies, Inc.Inventors: Xue Yuan, Min Lei
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Patent number: 7899143Abstract: An apparatus for adjusting a lockout time in a source synchronous strobe receiver, including a delay-locked loop (DLL) and receivers. The DLL receives a reference clock and generates adjusted and encoded vectors, both indicating a first time period. A select vector is employed to select a delayed version of the reference clock that lags the reference clock by a second time period, which is slightly less than a number of reference clock cycles. The select vector is reduced in value to generate the adjusted vector. The receivers are coupled to the delay-locked loop. Each of the one or more receivers receives the encoded vector and a corresponding strobe, and locks out reception of the corresponding strobe for the first time period following transition of the corresponding strobe. The encoded vector is employed to determine the first time period by selecting a delayed version of the corresponding strobe.Type: GrantFiled: March 19, 2007Date of Patent: March 1, 2011Assignee: Via Technologies, Inc.Inventor: James R. Lundberg
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Patent number: 7889778Abstract: A circuit for detecting attacks by contacting an integrated circuit chip comprising means for applying a random signal to a first terminal of at least one conductive path formed in at least one first metallization level of the chip, means for comparing the applied signal with a signal present on a second terminal of the path, and means for delaying the comparison time with respect to the application time, of a duration longer than or equal to the propagation delay through the first path.Type: GrantFiled: March 31, 2005Date of Patent: February 15, 2011Assignee: STMicroelectronics, SAInventors: Fabrice Marinet, Camille Botella
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Patent number: 7885250Abstract: A method and apparatus for synchronizing timing of Access Points (APs) and/or Synchronization Units (SUs) includes (a) arranging a cable having at least four pairs of twisted wires connected between two or more fixed APs and/or SUs in a network; (b) assigning a first pair of the twisted wires to carry a positive D.C. voltage to at least one AP or SU; (C) assigning a second pair of the twisted wires to carry a negative D.C. voltage to at least one AP or SU; (d) providing to the first and second pairs of rails a series of synchronization pulses generated from a synchronization source and capacitively-coupled to the first and second pairs of twisted wires so as to supply a composite signal; and (e) reconstructing the generated synchronization pulses by detecting pulses on the positive and negative D.C. voltages at a receiving end by at least one AP or SU.Type: GrantFiled: February 3, 2005Date of Patent: February 8, 2011Assignee: Koninklijke Philips Electronics N.V.Inventor: Tim Whittaker
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Patent number: 7873129Abstract: A method and a communication modem for broadband communication over power transmission lines. The modem includes a coarse level synchronization mapping unit which maintains a regularly updated coarse level clock synchronization map of neighboring communication units with which it is likely to exchange communications; and a second level synchronization unit which utilizes session handshakes and session data capacity to increase the synchronization level with a neighboring communication unit to allow a communication session to be held at a higher modulation level than the coarse level synchronization is able to support.Type: GrantFiled: November 8, 2007Date of Patent: January 18, 2011Assignee: Main.Net Communications Ltd.Inventors: Shmuel Goldfisher, Erez Geva
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Patent number: 7869552Abstract: In a receiving apparatus for receiving communication data from a transmitting apparatus, specific code patterns are inserted in the communication data at predetermined intervals. The receiving apparatus includes a first frequency difference measurement device for measuring a first frequency difference between a receiving clock of the receiving apparatus and a transmission clock provided to the communication data, based on one of the specific code patterns and another of the specific code patterns which is positioned later; and a frequency adjustment device for adjusting a frequency of the receiving clock based on the measured first frequency difference so that the frequency substantially coincides with a frequency of the transmission clock.Type: GrantFiled: March 26, 2007Date of Patent: January 11, 2011Assignee: Olympus CorporationInventor: Masaharu Yanagidate
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Patent number: 7835428Abstract: A MODEM device includes a detector configured to detect a synchronization signal transmitted from a source MODEM in a resynchronization process of a primary channel and a timer configured to count up starting from a beginning of a detection of the synchronization signal, and send information to forcibly move into a receiving mode for receiving image data when a time period from the beginning to a completion of the detection of the synchronization signal exceeds a predetermined time period.Type: GrantFiled: August 9, 2006Date of Patent: November 16, 2010Assignee: Ricoh Company, Ltd.Inventors: Masashi Tokuda, Hirofumi Nishi
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Patent number: 7826567Abstract: Receivers (1) for receiving frequency signals are, to improve their time synchronization accuracy, provided with synchronization stages (20) for performing a coarse time synchronization through autocorrelating samples of a group of preamble symbols (t1,t2,t3) and a fine time synchronization through crosscorrelating samples of a further group of preamble symbols (t10,G1) with predefined samples. The synchronization stages (20) also perform a coarse and a fine frequency synchronization through detecting and accumulating phases of samples of a yet further group of preamble symbols (t8,t9) and of another group of preamble symbols (T1,T2). The synchronization stages (20) have buffering units (21) and controlling units (22) for controlling mixing units (11) and transformating units (12) in processing stages (10). The preamble symbols have ten short preamble symbols (t1-t10), a guard interval preamble symbol (G 1) and two training symbols (T 1,T2).Type: GrantFiled: July 6, 2004Date of Patent: November 2, 2010Assignee: NXP B.V.Inventors: Paulus Wilhelmus Franciscus Gruijters, Lucas Hendrikus Gerardus Tan
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Patent number: 7817759Abstract: An approach is provided for supporting carrier synchronization in a digital broadcast and interactive system. A carrier synchronization module receives one or more signals representing a frame that includes one or more overhead fields (e.g., preamble and optional pilot blocks and one or multiple segments separated by pilot blocks). The module estimates carrier frequency and phase on a segment by segment basis and tracks frequency between segments. Carrier phase of the signal is estimated based upon the overhead field. Estimates carrier phase of random data field are determined based upon the estimated phase values from the overhead fields, and upon both the past and future data signals. Further, the frequency of the signal is estimated based upon the overhead fields and/or the random data field. The above arrangement is particularly suited to a digital satellite broadcast and interactive system.Type: GrantFiled: March 26, 2008Date of Patent: October 19, 2010Assignee: DTVG Licensing, Inc.Inventors: Yimin Jiang, Feng-Wen Sun, Lin-Nan Lee, Neal Becker
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Patent number: 7804890Abstract: A discussion of improving integrated device deterministic response to test vectors. For example, limiting the transmission delay for an integrated device's response within known bounds by synchronizing an initialization training sequence to a reset deassertion. Specifically, the proposal facilitates response determinism from the DUT by synchronizing training sequences and subsequently synchronizing flit transmission to reset assertion as sampled by reference clock.Type: GrantFiled: June 23, 2005Date of Patent: September 28, 2010Assignee: Intel CorporationInventors: Muraleedhara H. Navada, Tim Frodsham, Sanjay Dabral, Allen Baum, Chris D. Matthews, Chris C. Gianos, Rahul R. Shah, Theodore Z. Schoenborn
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Patent number: 7801260Abstract: A time reference point can be determined in a radio system by sending a synchronization sequence s(i), i=0, . . . N?1, from transmitter X, 40 to receiver Y, 48, and by detecting the peak value at the output of a matched-filter, 44, h(i)=s(N?1-i) on Y. In practical systems the accuracy of this peak detection is limited by interference and noise on the radio channel. To increase the peak detection accuracy, we propose to repeat the transmission of the same synchronization sequence K times. The interval L between repetitions is constant and the amplitude of the synchronization sequence in each repetition varies according to a given variation pattern a(jL), j=0, . . . , K?1. The receiver Y, 48 knows L and a(jL), j=0, . . . , K?1. After comparison to a threshold, the matched-filter 44 at the receiver 48 may deliver peaks resulted from repeatedly received synchronization sequences or peaks caused by interference and/or noise.Type: GrantFiled: June 13, 2002Date of Patent: September 21, 2010Assignee: ST-Ericsson SAInventors: Yonggang Du, Li Sun
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Patent number: 7801227Abstract: A composite signal includes a high power beacon signal and low power corresponding wideband synchronization signal and is communicated over a time interval exceeding a single OFDM transmission time interval. A base station transmits one or more different such composite broadcast signals in a recurring timing structure. Each different potential beacon signal, e.g., a single tone signal, is paired with a unique wideband synchronization signal. A wideband synchronization signal includes at least some predetermined null tones and at least some predetermined non-null tones. For a given wideband synchronization signal, the predetermined null tones carry predetermined modulation symbol values, A wireless terminal receives a composite signal, identifies a beacon, determines a corresponding known wideband synchronization signal, compares received to known wideband synchronization signals, and determines at least one of a timing adjustment, frequency adjustment and channel estimation.Type: GrantFiled: July 14, 2006Date of Patent: September 21, 2010Assignee: QUALCOMM IncorporatedInventors: Vladimir Parizhisky, Rajiv Laroia, Alexander Leonidov, Tom Richardson, Junyi Li, Sathyadev Venkata Uppala
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Patent number: 7787579Abstract: A frame synchronous circuit operable in a dedicated short-range communication system, applicable to several modulation schemes, includes a UW detector for detecting a UW word from received data, an operation setting register group for specifying the operations of an on-board unit, a synchronous manager for controlling synchronization, an unlimited synchronization continuation register for maintaining the unlimited continuation of the synchronization, and an FCMC data analyzer for analyzing FCMC data. The operation setting register group can control synchronization by using not only operational information obtained from the FCMC data but also another operational information retrieved from an input device such as a CPU or terminal connected to the on-board unit. Consequently, debug and test operations can be performed without receiving any FCMC data.Type: GrantFiled: July 24, 2007Date of Patent: August 31, 2010Assignee: Oki Semiconductor Co., Ltd.Inventors: Kentaro Toda, Motoatsu Yoshikawa
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Patent number: 7782844Abstract: The present invention provides a method and apparatus for detecting and decoding data. The method comprises: receiving a set of data signals from an external data source; detecting a size of said received set of data signals; decoding said received set of data signals; extracting a destination address from said set of data signals; comparing said destination address extracted from said data signals to a known data value; determining whether said received data signals should be received by a host circuitry based upon said comparison of said destination address extracted from said data signals to a known data value; generating at least one status signal alerting said host circuitry of said determination that said received data signals should be received by said host circuitry; and waking up said host circuitry upon a determination that said received set of data is addressed to said host circuitry.Type: GrantFiled: January 5, 1999Date of Patent: August 24, 2010Assignee: GlobalFoundries, Inc.Inventor: David W. Smith
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Patent number: 7773685Abstract: This invention describes a wireless system comprising a plurality of transmitters and receivers, wherein each transmitter has between 1 and n antennas and each receiver has between 1 and m antennas wherein one of said transmitter is arranged to transmit to one of the receivers, said one transmitter is controlled in dependence on at least one of at least one parameter of said transmitters, at least one parameter of said receiver, and at least one parameter of a wireless environment between said transmitter and said receiver.Type: GrantFiled: January 23, 2003Date of Patent: August 10, 2010Assignee: Nokia CorporationInventors: Olav Tirkkonen, Mikko Kokkonen, Kari Kallojärvi, Rinat Kashaev
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Patent number: 7756230Abstract: A method for synchronizing on a pulsed waveform sequence including pulsed waveforms. An impulse radio receiver is provided including a radio frequency (RF) front end connected to a demodulator, and the demodulator is connected to a processing unit. Power is provided to at least a portion of an RF component such as the RF front end and/or the demodulator, during time windows sufficient for testing an hypothesis regarding timing of the pulsed waveforms. The powering is controlled by the processing unit. Preferably, testing the hypothesis includes accumulating a signal of the pulsed waveforms, correlating with the pulsed waveforms, or accumulating the correlation result of the pulsed waveforms. Preferably, others functions of the receiver are powered or enabled subsequent to the testing. Preferably, the impulse radio receiver is an ultra-wide band receiver.Type: GrantFiled: May 15, 2005Date of Patent: July 13, 2010Assignee: Sandlinks Systems Ltd.Inventors: Dan Raphaeli, Gideon Kaplan
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Patent number: 7742552Abstract: A programmable spread spectrum clock generator (SSCG) reduces electromagnetic interference by spreading the frequency bandwidth of an output signal. The rate at which the frequency of the output signal changes, as well as other aspects of the output signal, are software programmable. The programmable SSCG receives a periodic signal whose cycles have substantially identical periods and outputs the output signal whose cycles have periods that vary smoothly over a plurality of cycles of the periodic signal. The programmable SSCG generates a control signal using the periodic signal. The programmable SSCG includes a variable delay element that generates the output signal by delaying the periods of the periodic signal based on the magnitude of the control signal. The output signal is generated without using a phase locked loop. Moreover, successive cycles of the output signal rarely have identical periods.Type: GrantFiled: March 17, 2008Date of Patent: June 22, 2010Assignee: ZiLOG, Inc.Inventor: Hide Hattori
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Patent number: 7738613Abstract: Systems and methods for converting a data stream from a first sample rate to a second sample rate, where the data is received in bursts. In one embodiment, a method includes receiving bursty audio data on a first input line and receiving synchronization data on a second input line that is separate from the first input line. An input sample rate is then estimated for the received audio data based on the received synchronization data and the audio data is converted to an output sample rate. The input sample rate is determined by counting samples received in a time interval and potentially low-pass filtering the result. The audio data may be in packetized, parallel, or other forms, and the synchronization data may include individual signals, such as pulses or bits received at regular or irregular intervals.Type: GrantFiled: March 20, 2004Date of Patent: June 15, 2010Assignee: D2Audio CorporationInventors: Jack B. Andersen, Joel W. Page, Daniel L. W. Chieng, Douglas D. Gephardt
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Patent number: 7729386Abstract: Systems and methods are disclosed for detecting framing data in a telecommunications signal. In one embodiment, a frame synchronizer circuit is provided that includes an interface for receiving bits of a telecommunications signal and storage for storing a framing state for the bit positions in the frame, the framing state for a given bit position indicating whether that bit position is a potential holder of the frame synchronization pattern. The frame synchronizer circuit also contains a state update function that determines the current-state for each bit position based on the bit position's previous state, and the value of the most recently received bit in that bit position. The encoding scheme makes use of shorter bit length symbols to represent statistically more frequently occurring states. In one embodiment, a single code word is used to record the state of a sequence of consecutively occurring bit positions that share the same state.Type: GrantFiled: September 4, 2002Date of Patent: June 1, 2010Assignee: Tellabs Operations, Inc.Inventors: Sean M. Furuness, Lawrence D. Weizeorick, Steve J. Butz
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Patent number: 7720177Abstract: A known sequence of symbols is located within a transmitted sequence of symbols by estimating the phase differences between offset symbols within a portion or more of the transmitted sequence, estimating the phase differences between offset symbols in the known sequence, and determining that the symbols within the portion or more of the transmitted sequence are the known sequence if the phase difference estimates determined from the symbols within the portion or more of the transmitted sequence are substantially equal to the phase difference estimates determined from the known sequence.Type: GrantFiled: July 28, 2005Date of Patent: May 18, 2010Assignee: Trident Microsystems (Far East) Ltd.Inventors: Chi-Ping Nee, Durgaprasad Kashinath Shamain, Gdaliahou Kalit, Abraham Krieger
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Patent number: 7720159Abstract: In some embodiments, the inventions includes a transmitter including a cycle encoding circuit to receive a data input signal and to provide a full cycle encoded signal in response thereto by continuously joining portions of different encoding signals. Some of the encoding signals have a different frequency than others of the encoding signals and some of the encoding signals have a different phase than others of the encoding signals. Data is represented in data time segments of the full cycle encoded signal and no data time segment has more than one cycle of an encoding signal. In some embodiments, a receiver receives the cycle encoded signal and recovers data of the data input signal.Type: GrantFiled: October 26, 2007Date of Patent: May 18, 2010Assignee: Intel CorporationInventors: Jed D. Griffin, Jerry G Jex, Arnaud J. Forestier, Kersi H. Vakil, Abhimanyu Kolla
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Patent number: 7711074Abstract: A synchronization extraction apparatus for a communication system and a method thereof are disclosed. A frame synchronization is obtained in a manner that the sum of an input signal and a delay signal is obtained without obtaining a simple correlation value between the input signal and the delay signal, and then a correlation value between a summed signal and the delay signal is obtained. The synchronization extraction apparatus and method can reduce the implementation complexity and power consumption in obtaining the frame synchronization, and thus increase the battery cycle of a terminal provided with the synchronization extraction apparatus or method.Type: GrantFiled: August 31, 2005Date of Patent: May 4, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-Yong Lee, Yun-Sang Park, Bong-Gee Song
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Patent number: 7697647Abstract: An apparatus and method is disclosed for synchronizing a timing signal for a computational system to different reference clock signals without impairing the operation of the computational system. A corresponding “offset” register is provided for each of the reference clock signals (RCS) for storing signal timing differences between the timing signal and RCS. When one of the reference clock signals not used for synchronizing the timing signal, is selected as the signal for synchronizing the timing signal, the corresponding offset register R0 (for the newly selected reference clock signals) retains its last value prior to the switch, and another register R1 stores subsequent signal timing differences between the timing signal and the newly selected reference clock signals.Type: GrantFiled: October 3, 2005Date of Patent: April 13, 2010Assignee: Avaya Inc.Inventor: Matthew Duane McShea
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Patent number: 7688904Abstract: A method and system for transmitting signals between communication nodes is presented. The method includes generating a first waveform that includes a shaped portion; generating a second waveform that includes a shaped portion; and combining the first and second waveforms including overlapping the shaped portion of the first waveform with the shaped portion of the second waveform and adding the overlapped portions of the waveforms. The method includes generating a signal including the combined first and second waveforms. At least one of the first and second waveforms includes a characteristic signature configured for synchronizing with the signal.Type: GrantFiled: February 3, 2006Date of Patent: March 30, 2010Assignee: Intellon CorporationInventors: Lawrence W. Yonge, III, Timothy J. VanderMey
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Patent number: 7684466Abstract: A wired spread spectrum communication device, a method for communication thereof and a wired spread spectrum communication system capable of enabling easy establishment of synchronism are disclosed. In a transmitter unit of the wired spread spectrum communication device, a spreading code generator generates spread spectrum signals that are based on specified spreading codes, a strobe signal generator and a timing gate output the spread spectrum signals as sync signals at specified timings, and an adder superposes the sync signals to the spread information signals, while the adder further sends the information signals that have been superposed with the sync signals as transmitting signals to transmission paths.Type: GrantFiled: February 28, 2003Date of Patent: March 23, 2010Assignee: Ibiden Industries Co., Ltd.Inventors: Shigenobu Sasaki, Mitsusato Kawashima
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Patent number: 7680230Abstract: A frame format decoder (22) and training sequence generator (24) for determining the frame format of received data which is compliant with the IEEE 802.1 1b standard for wireless local area networks, and for providing a training sequence for an adaptive equalizer (16). The received signal is first despreaded, demodulated and descrambled, so that the SYNC field is reconstructed, and then a counter 32 counts the number of consecutive bits having the same polarity or logic value until N such bits are counted (where N is an integer greater than 1). The polarity or logic value of the N counted bits enables the decoder (22) to determine whether the frame format is long or short. A training sequence, being a copy of the transmitted SYNC field eventually followed by an SFD field, is also generated for use by an adaptive equalizer (16).Type: GrantFiled: June 21, 2004Date of Patent: March 16, 2010Assignee: NXP B.V.Inventor: Arie Geert Cornelis Koppelaar
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Publication number: 20100046685Abstract: A method and system for reducing power consumption of OFDM (Orthogonal Frequency Division Multiplexing) signal synchronization circuit comprises a sync setting, a sync controller, a sync pipeline and a data corrector. The sync setting dynamically changes correlation data sample rate based on synchronization statuses and results. The sync controller controls and schedules frame and symbol synchronizations, and turns on and off the sync pipeline based on synchronization activities. The sync pipeline integrates frame and symbol synchronization operations, synchronizes receiving signal with scalable synchronization window, synchronization sequence length, synchronization delay and variable data sample rate. Data corrector adjusts input data with coarse timing and fine frequency offsets estimated in sync pipeline, and generates corrected output data for further processing. By using the above techniques, the power consumption of signal synchronization circuit is reduced.Type: ApplicationFiled: August 20, 2008Publication date: February 25, 2010Inventor: Jung-Jen Liu
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Patent number: 7664214Abstract: A communication system, clock generation circuit, and method are provided for receiving jitter upon data and to generate a clock reference that does not contain the received jitter. The clock reference can be used either by a digital subsystem of a communication system node, or can be transmitted as substantially jitter-free data from that node to a downstream node of the communication system. Instead of recovering the clock reference from the data having jitter, a pattern is regularly defined within the data stream preferably at periodic, timed intervals. The data pattern may be made up of a series of non-transitions which, regardless of any jitter in the data itself, does not impute any jitter onto a phase-locked loop triggered from an edge of the non-transitioning data pattern. Using the edge as a reference point, a jitter-free clocking signal can be derived at the same frequency as a clocking signal which would normally be produced from the jitter-induced data.Type: GrantFiled: September 24, 2002Date of Patent: February 16, 2010Assignee: Standard Microsystems CorporationInventors: David J. Knapp, Jason E. Lewis
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Patent number: 7653156Abstract: A method of processing a timing synchronization signal includes selecting an initial sequence of complex numbers and modifying the initial sequence based upon a metric applied to the autocorrelation function to enhance its autocorrelation properties within a predetermined window about the main autocorrelation peak determined by the timing uncertainty of the system. This two-step optimization process produces a new complex sequence used for timing acquisition. It is applied by transmitting the sequence through a medium and correlating the received signal against a known error-free sequence. Only correlation within the window of the bounded timing uncertainty is performed, thus saving valuable computational cycles. Also, because the sidelobe levels of the autocorrelated function are significantly lower within the timing uncertainty window than the sidelobe levels of a non-optimized autocorrelation function of a signal, the likelihood of finding a peak for the wrong timing signal is greatly reduced.Type: GrantFiled: April 20, 2006Date of Patent: January 26, 2010Assignee: The Boeing CompanyInventors: Gary A. Ray, James B. Baker
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Patent number: 7652608Abstract: A waveform acquisition system that captures and digitizes a wideband electrical signal through a bank of front end filters, frequency down converters, and conventional digitizers (A/D converters). A software algorithm reconstructs the composite input signal and applies the necessary corrections to remove the effects of hardware impairments. This approach is possible because it uses a class of filters that exhibit the quality of perfect waveform reconstruction, allowing signals whose spectral components overlap multiple filter bands, to be faithfully reconstructed. A calibration generator switched into the input port serves as a reference for quantifying and removing hardware errors. The channelized analog-to-digital converter (ADC) effectively multiplies the bandwidth and sampling rate of the conventional digitizer performance in a single channel by the number of channels in the system.Type: GrantFiled: December 9, 2005Date of Patent: January 26, 2010Assignee: Photonics Products, Inc.Inventors: Ronald F. Mathis, Stephen R. Mathis, Paul N. Huntley, James A. Crawford, Barry L. Dorr, William L. Floyd
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Patent number: 7627068Abstract: An apparatus and method for frequency synchronization is proposed to obtain the pilot tones and evaluate the frequency offset and time offset for frequency synchronization. The frequency synchronization method has the following steps: filtering a baseband signal of a frequency correction burst by using multiple pre-filters; measuring the baseband signal and the signals output from the pre-filters to produce the first power value and the second power values respectively; normalizing the maximum second power value by using the first power value so as to produce the first detection value; using the samples of the baseband signal at different time points and a predetermined mathematical function to produce the second detection value; combining the first and second detection values to produce the third detection value; and using the third detection value to determine whether the frequency correction burst is received or not.Type: GrantFiled: July 26, 2005Date of Patent: December 1, 2009Assignee: Mediatek IncorporationInventors: Wei-Nan Sun, Ho-Chi Huang
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Patent number: 7619456Abstract: A multi-phase signal generator may include a duty control buffer configured to receive a first differential input signal and a second differential input signal, and generate a first differential output signal and a second differential output signal having variable duty ratios based on a control voltage, a first edge combiner configured to generate a first pulse signal based on first edges of the respective first and second differential output signals, a second edge combiner configured to generate a second pulse signal based on second edges of the respective first and second differential output signals, and a control voltage generator configured to generate the control voltage in response to a logic signal obtained by performing a logic operation on the first and second pulse signals.Type: GrantFiled: July 16, 2007Date of Patent: November 17, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Byung-Guk Kim, Lee-Sup Kim, Kwang-Il Park
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Patent number: 7590183Abstract: A method for generating a signal is presented. The method includes selecting a first set of carrier frequencies that are integral multiples of a first frequency interval, and selecting a second set of carrier frequencies that are integral multiples of a second frequency interval. The second frequency interval is an integral multiple of the first frequency interval and the second set is a subset of the first set. The method includes, for each of one or more signal carrier frequencies in the second set, selecting a plurality of associated carrier frequencies in the first set including a peak carrier frequency having substantially the same value as the signal carrier frequency, and modulating waveform frequency components at each of the selected plurality of associated carrier frequencies according to the same data value.Type: GrantFiled: May 12, 2005Date of Patent: September 15, 2009Assignee: Intellon CorporationInventors: Lawrence W. Yonge, III, Timothy J. Vandermey
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Patent number: 7558354Abstract: This invention relates to signal processing in telecommunications, particularly but not exclusively for use in wireless TDMA systems. In particular, the invention concerns methods for use in communication systems making use of pilot symbols. The invention provides a method of placing pilot symbols in a data stream for telecommunication systems, wherein the pilot symbols are spaced in time using a range of different intervals between symbols. The intervals between the pilot symbols are substantially fractal in nature, the distribution of pilot symbols involving repetitions of irregular groupings of pilot symbols in the data stream. Preferably, the irregular groupings of pilot symbols are irregularly spaced in the data stream. The invention also provides a method and means for acquiring the time and frequency offset of a packet of data by using pilot symbols distributed within the packet as defined above.Type: GrantFiled: November 7, 2003Date of Patent: July 7, 2009Assignee: DSpace Pty., Ltd.Inventors: Michael Robert Peake, Mark Rice
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Patent number: 7526054Abstract: An apparatus, method, and article to dynamically adjust a data signal using a regenerated clock signal in an emulator to increase communication speed between the emulator and the evaluation board is disclosed. In one embodiment, this is achieved by applying a reference clock signal at a predetermined frequency to a digital circuit. A delayed return data signal is then sampled from the digital circuit. The sampled delayed return data signal is then compared to an expected return data signal. The delayed return data signal is then adjusted as a function of the comparison to increase the communication speed between the emulator and the evaluation board.Type: GrantFiled: March 4, 2005Date of Patent: April 28, 2009Assignee: Analog Devices, Inc.Inventors: David Doyle, Hossain Hajimowlana, Kevin Gagne, Joseph Bastos, Chirag Patel
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Patent number: RE42538Abstract: A system and method for information content-independent synchronization with a received signal. A variable of the signal (e.g., average energy or magnitude) which is related to the energy distribution, is measured over a period of time. The signal's information bearing point is found at the point within the information period of the signal with the highest averaged energy. The point may be found, for example, by detecting the sample point with highest average energy, or by correlating multiple sample points to a stored template. Interpolation may be performed to locate an information bearing point that is between sample points. Because the relative energy content of the signal is effectively independent of the specific information content, synchronization with the information bearing point is accomplished without requiring the insertion of any special information content or fixed content patterns into the signal.Type: GrantFiled: August 1, 2007Date of Patent: July 12, 2011Assignee: Soar S.K., Limited Liability CompanyInventors: Chiaming Lo, Robert Joseph McCarty