Abstract: This disclosure relates systems and methods for a high bandwidth modulation and transmission of communication signals.

Abstract: Systems, methods, and other embodiments associated with preamble detection based on repeated preamble codes are described. According to one embodiment, an apparatus is provided that wirelessly receives a signal and calculates a differential output corresponding to a multiplication of the signal and a delayed version of the signal. A cross correlation is performed between the differential output and a known preamble pattern to produce a cross correlation output. A moving average calculation is performed on the cross correlation output to produce an average cross correlation. One or more peaks are detected in the average cross correlation when the average cross correlation has an amplitude greater than a threshold. When the one or more detected peaks meets predetermined criteria, the apparatus provides information about at least one of the detected peaks for subsequent signal processing.

Abstract: An all-digital frequency synthesizer architecture is built around a digitally controlled oscillator (DCO) that is tuned in response to a digital tuning word (OTW). In exemplary embodiments: (1) a gain characteristic (KDCO) of the digitally controlled oscillator can be determined by observing a digital control word before and after a known change (?fmax) in the oscillating frequency; and (2) a portion (TUNE_TF) of the tuning word can be dithered (1202), and the resultant dithered portion (dkTF) can then be applied to a control input of switchable devices within the digitally controlled oscillator.

Abstract: A successive approximation register switched capacitor analog to digital converter utilizes a high frequency clock for controlling comparator reset switches and a clock distribution block to operate at lower sample rates. The successive approximation cycles are clocked with the high frequency clock so that the reset switches stay within the leakage limit irrespective of the sample rate but the end of conversion signal is delayed to mimic the slower sample rate.

Abstract: A method and an interface unit is provided to maintain timing synchronization between a first Radio Equipment Controller (REC) and a second REC operating with a multi-standard base station. The first REC receives a synchronization signal and synchronized data output is generated from the synchronization signal. A clock signal is then generated from the synchronized data output. At the second REC, the synchronized data output is received and a synchronization source is then reconstructed from the first clock signal. A timing and frequency component of a second clock signal is then aligned to that of the reconstructed synchronization source, such that the second REC can maintain synchronization with the first REC.

Abstract: A receiver and method for determining a characteristic from an input signal is disclosed. A characteristic is at least one selected from a group comprising preamble detect, frequency offset and timing offset. The input signal comprises an IF frequency fIF and a preamble signal which is a sequence of M similar data symbols. The data symbols have a symbol period SP, and M is an integer greater than or equal to 2. The method comprises: —receiving N subsequent samples of the input signal, the N subsequent samples representing a part of the input signal approximating the symbol period SP, —rotating N subsequent samples to obtain N rotated symbols; —correlating the N rotated symbols with P correlation functions to generate a set of N×P correlation values, P being an integer greater than or equal to 2; and, —selecting a maximum correlation value from the set of N×P correlation values and determining the characteristic.

Abstract: Apparatus and methods are disclosed, such as those involving deskewing serial data transmissions. One such apparatus includes a plurality of receivers, each of which is configured to receive a serial data stream. Each of the receivers includes a shift register including a plurality of stages arranged in sequence to propagate a stream of characters. Each of the stages is configured to store a character, and shift the character to a next stage in response to a clock signal. The receiver also includes a multiplexer having a plurality of inputs, each of the inputs being electrically coupled to a respective one of the stages of the shift register, and to select one of the stages to generate an output such that the outputs of the multiplexers in the receivers are deskewed.

Abstract: Apparatus and methods are disclosed, such as those involving deskewing serial data transmissions. One such apparatus includes a plurality of receivers, each of which is configured to receive a serial data stream. Each of the receivers includes a shift register including a plurality of stages arranged in sequence to propagate a stream of characters. Each of the stages is configured to store a character, and shift the character to a next stage in response to a clock signal. The receiver also includes a multiplexer having a plurality of inputs, each of the inputs being electrically coupled to a respective one of the stages of the shift register, and to select one of the stages to generate an output such that the outputs of the multiplexers in the receivers are deskewed.

Abstract: A radio transmission device and a radio communication method employ sequence length decision units which hold a correspondence in which one basic sequence length is set for a plurality of transmission bandwidths. The sequence length decision units acquire transmission bandwidth information and decide a sequence length corresponding to the acquired transmission bandwidth information. A decision is made as to which of the cyclic extension process or the truncation process is to be executed on a Zadoff-Chu sequence according to the sizes of the acquired transmission bandwidth information and the basic sequence length. Then, a difference between the transmission bandwidth and the basic sequence length, i.e., the number of possible cyclic extension/truncation symbols, is obtained.

Abstract: A method of processing first and second corresponding signals having a delay therebetween. The method includes introducing a plurality of different delays between the first and second signals, successive delay amounts differing from each other by less than the interval between chip boundaries, and for each introduced delay, summing samples of the second signal which are obtained at the times of, at least, chip boundaries between bits of the first signal which have the same state, to obtain a value; thereby to obtain a representation of how the value varies according to the introduced delay, which representation contains a level change associated with an introduced delay which bears a predetermined relationship to the delay between the first and second signals.

Abstract: Certain aspects of a method and system for satellite communication are disclosed. Aspects of one method may include a receiver that handles digital broadcasting. The receiver may be enabled to dynamically vary spacing between two or more pilots and/or the size of one or more pilots within at least one frame based on a determined symbol rate. The size of each of a plurality of received programs may be determined and the spacing between two or more pilots may be dynamically varied based on the determined size of each of the plurality of received programs.

Abstract: A timing synchronous detection device includes: a first autocorrelator that performs autocorrelation using a received signal and a first delay signal in which the received signal is delayed; a second autocorrelator that performs autocorrelation using the received signal and a second delay signal in which the received signal is delayed; an average-normalization device that obtains an average value of an output signal of the first autocorrelator and an output signal of the second autocorrelator; a comparator that compares the average value and a threshold value and that outputs, if the average value is larger than the threshold value, the average value; and a maximum value search device that searches for a maximum value of the average values that are output from the comparator.

Abstract: A method of generating preamble sequence is disclosed. A channel used by a wireless device may be divided into four sub-channels, and the method includes forming a preamble sequence of a first sub-channel, making three replicas of the preamble sequence of the first sub-channel, each replica with a phase rotation of a first angle, a second angle, and a third angle respectively, for forming each preamble sequence of a second sub-channel, a third sub-channel, and a fourth sub-channel, and arranging the preamble sequences of the first, the second, the third, and the fourth sub-channels to form a preamble sequence of the channel.

Abstract: A method and system for a estimating a most likely location of a periodic SYNC burst within an optical signal received through an optical communications system. A cross-correlation is calculated between a multi-bit digital signal derived from the optical signal and a known symbol sequence of the SYNC burst. The cross-correlation is logically partitioned into sub-blocks. A candidate sub-block in which the SYCN burs is mot likely located is identified, and analysed to estimate a location of the SYNC burst.

Abstract: A positioning system comprises a plurality of controllers, each controller comprising a wideband receiver and a narrow band transmitter, the each controller configured to receive a wideband positioning frame using the wideband receiver from one or more devices and to transmit acknowledgement frames using the narrow band transmitter that include timing and control data for use by the devices to establish timing for transmission of the positioning frame; and at least one device comprising a wideband transmitter and a narrow band receiver, the device configured to transmit a positioning frame to the plurality of controllers using the wideband transmitter and to receive an acknowledgement frame from one or more controllers using the narrow band receiver, extract timing and control information from the frame, and adjust the timing and synchronization of the wideband transmitter using the timing and control information.

Abstract: There is provided a communication system that includes master and slave communication ECUs. The master communication ECU sends a clock signal to a clock communication line, with which the communication ECUs synchronize with each other when sending and receiving data. The master and slave communication ECUs then receive the clock signal through the clock line. The ECUs use the received clock signal as a reference timing, which is designated as a transmission/reception reference, and send or receive data to/from data communication lines.

Abstract: A transmission apparatus includes a plurality of orthogonal frequency division multiplexing (OFDM) modulation signal generators, which generate a first OFDM modulation signal and a second OFDM modulation signal. The transmission apparatus also includes a transmitter that transmits the first OFDM modulation signal from a first antenna and the second OFDM modulation signal from a second antenna, in an identical frequency band.

Abstract: Methods and apparatus for have frequency offset estimation and cell search in radio communication systems take into account the time-frequency correlation properties of reference and synchronization signals in such systems. This reduces the probability of misdetection of the physical layer cell ID and frequency offset by accounting for time-frequency ambiguities and evaluating correlation signal peaks in the frequency domain, saving signal processing time and making initial cell search considerably faster. Also, lower-grade and hence cheaper oscillators can be used without causing problems in the user's experience with a receiver, such as a cellular telephone.

Abstract: Computer-readable media, apparatus and other embodiments associated with performing comma alignment with scrambled data are described. One example method includes controlling an apparatus to generate a data stream that facilitates achieving and determining alignment in a device. The data stream includes sequences of N random portions of Y-bit characters followed by a Z-bit alignment character, N, Y and Z being integers. Another example method includes controlling an apparatus to receive and examine the data stream. The method also includes generating an alignment signal upon determining an alignment for recovered data in the device.

Abstract: A frequency offset estimation and correction apparatus including a frame averaging unit to average a plurality of frequency offset values to obtain a frame offset average for each of a plurality of frames, a re-sampling unit to produce a plurality of interpolated frequency offset values uniformly distributed over a time period of a frame of the plurality of frames based on the frame offset average of the frame and a frame offset average of at least one frame that precedes the frame, and an exponential averaging unit to calculate the estimated frequency offset based on the plurality of interpolated frequency offset values weighted by an exponential averaging coefficient.

Abstract: In a signal processing apparatus a synchronizer acquires synchronization with the spreading code of an intermediate frequency signal converted from a signal received from a satellite in a global positioning system. A demodulator then demodulates a message contained in the intermediate frequency signal. A measuring unit outputs a primary signal to a predetermined signal line, the primary signal expressing positioning results for the apparatus as measured on the basis of the demodulated message. A secondary signal output unit attaches a predetermined header to a secondary signal and outputs the result to the predetermined signal line, the secondary signal containing at least the intermediate frequency signal, or a signal generated from the intermediate frequency signal.

Abstract: Provided is a method for detecting frame sync and frame structure in a satellite broadcasting system, which acquires an estimated value for detecting frame structure and frame sync and overcomes distortion of correlation analysis values by summing differential correlation values for SOF positions in consideration of the variable frame length, and selecting a maximum value in a channel environment with low signal-to-noise ratio and high frequency error. SOF is a sync word indicating the start point of a frame. The method includes the steps of: acquiring SOF differential correlation value sequences; acquiring sums (di,t) of the correlation values normalized for SOF positions based on the number of symbols per frame by using the above-generated SOF differential correlation value sequences; and selecting a maximum value (dz,x) among the sums of correlation values, detecting z as a frame sync position, and detecting x as a frame structure index.

Abstract: A method and circuit for dynamically changing the frequency of clock signals. The method including: detecting an edge of a first clock signal operating at a first frequency using a second clock signal operating at a second frequency; detecting an edge of the second clock signal using the first clock signal; detecting coincident edges of the first and the second clock signals; and changing the second frequency to a third frequency different from the second frequency upon detection of the coincident edges.

Abstract: A communication device includes a current information storage unit 130 that stores the bit boundary signal at each of timings at which a sampling clock is updated, a past information storage unit 140 that takes in and stores a signal stored in the current information storage unit 130 when a variation point of a reception signal is detected, and does not update a signal stored therein when no variation point of the reception signal is detected, and a clock selection unit 44 that selects CLKSEL2 used for the sampling of the reception signal from N-phase clocks based on a signal stored in the current information storage unit 130 when a variation point of the reception signal is detected, and selects CLKSEL3 based on a signal stored in the past information storage unit 140 when no variation point of the reception signal is detected.

Abstract: A method for countervailing clock skew between a first clock signal and a second clock signal in a core logic circuit. The second clock signal is sampled based on the first clock signal in a sampling cycle to obtain a sampling result. When the sampling result indicates a non-compliant pattern, the phase of at least one of the first clock signal and the second clock signal is adjusted. Desirably, the core logic circuit keeps on working with the current first and second clock signals while continuing the sampling procedure of the second clock signal based on the first clock signal when the sampling result indicates a compliant pattern.

Abstract: Disclosed is a frame synchronizing device and method for a binary data transmission system wherein digital data are transmitted as a serial bit stream organized into frames, each frame including a pre-defined frameheader, wherein said serial bit stream is inputted into a serial input portion of a serial input parallel output shift register means having at least as many stages as the number of bits of a frame, and said frames are outputted in a consecutive order from a parallel output portion of said shift register means. The particularity of the present invention is that it is detected whether or not a frameheader is present in the output of said parallel output portion, and, if not, the outputting of a frame from said parallel output portion is delayed by at least one time period which is needed for shifting a bit in said serial input portion from a stage to a next one, until synchronization is reached.

Abstract: A frame sync detecting circuit and FSK receiver sequentially derive a moving average value (?) from oversample values of a received word pattern, for given symbol periods, and a difference between the moving average value and an average value for the given symbol periods in a given sync word pattern is determined as DC offsets ?f. Subsequently, the DC offset ?f is subtracted from the received word pattern, and correlation processing with respect to the sync word pattern is performed to determine a correlation value (?). If the correlation value exceeds a predetermined threshold, it is determined that a sync word candidate has been received, and symbol values of the received word pattern after the DC offset correction are compared with respective symbol values of the sync word pattern. A sync word pattern detection is determined if errors in the symbols are within a given range.

Abstract: Disclosed is a system and method for improving the linearity of a clock and data recovery (CDR) circuit. In one embodiment, a data stream is received, and the phase of a clock signal is adjusted using two interpolators. The phase of the output signal of the second interpolator is adjusted simultaneously with, and complementary to, adjusting the phase of the first interpolator. The first interpolator's output signal is injected into a first delay cell in a delay loop having a plurality of delay cells, and the output of the second interpolator is inactivated. When the maximum phase of the first interpolator's output signal is reached, the second interpolator's output signal is injected into another one of the delay cells, and the first interpolator's output signal is inactivated. The data stream is then recovered using the output of the delay loop as a clock signal.

Abstract: Apparatus, methods, and systems are disclosed, including, for example, a data receiver to receive a calibration voltage and a reference voltage to calibrate the data receiver. The output of the data receiver is provided to a first ripple counter that counts the outputs from the data receiver and provides an output count. The ripple counter may count either ones or zeros. A second ripple counter counts the number of a clock signals over the same period of time. The output count is either multiplied by two or the count of clock signals is divided by two. A ripple comparator may then compare the outputs and adjust the reference voltage based upon the comparison results.

Abstract: A receiver includes a receiving unit that receives a signal from a satellite, a frequency conversion-discretization unit that converts the signal received in the receiving unit into an intermediate frequency signal of a frequency bandwidth including 0 Hz, and discretizes the frequency-converted intermediate frequency signal with a predetermined sampling frequency, a filter unit that filters the discretized signal, which is output from the frequency conversion-discretization unit, through a predetermined filter, a synchronization acquisition unit that acquires synchronization of a spreading code in the discretized signal filtered by the filter unit, and a synchronization holding unit that holds the synchronization of the spreading code, which is acquired by the synchronization acquisition unit.

Abstract: Provided are a transmission device, a receiving device, and a communication system having a simple configuration and capable of reliably executing the confirmation of a changed bit rate. The communication system 1 sends, to the receiving device 3, a serial data signal Sdata that is set as a constant value across a period of a constant multiple of a cycle of the clock when a bit rate of a serial data signal Sdata in the transmission device 2 is changed. The receiving device 3 that received the serial data signal Sdata receives training data Tdata from the transmission device 2 when it is determined that the serial data signal Sdata is a constant value across a period of a constant multiple of a cycle of the clock, and proceeds to the processing of confirming the changed bit rate.

Abstract: Methods and systems are disclosed for decoding digital data received by a correspondent device over a communication channel. The data includes a component corresponding to a plurality of values unknown to the correspondent device and a component corresponding to one or more values known a priori by the correspondent device. To perform decoding, the correspondent device retrieves from memory at least one of the one or more known values. The correspondent device then applies a statistical measure using the known value(s) to estimate the location of the component corresponding to the one or more known values. The one or more known values and the estimated location of the component corresponding to the one or more known values are then used to assist in decoding the data.

Abstract: A relay station includes a receiver that receives a signal from a base transceiver station, a detection unit that detects a carrier frequency deviation of the received signal, and a calculation unit that calculates a delay rate of the signal based on the detected carrier frequency deviation. The relay station includes a delay control unit that controls an amount of delay of the signal in accordance with the calculated delay rate, a compensation unit that compensates for the detected carrier frequency deviation of the signal, and a transmitter that transmits the signal of which the amount of delay is controlled and of which the carrier frequency deviation is compensated for.

Abstract: A method of achieving reduced modulation range requirement in a Digitally Controlled Oscillator (DCO) which is deployed as part of a DRP (Digital Radio Processor) and tuned to a tuning frequency range having operating-channel center-frequencies, wherein phase difference between consecutive samples is termed as FCW (Frequency Control Word), uses the steps of digitally modifying and limiting the FCW so that the FCW does not exceed known FCW thresholds, e.g., chosen from ?/2, ?/4, ?/8, and redistributing the FCWs while maintaining a cumulative sum of phases and without significant EVM (Error Vector Magnitude) degradation. The FCW threshold can be chosen arbitrarily and need not be in the form of ?/2n. The method uses a FCW limiting algorithm which reduces supply voltage sensitivity of the DCO and enables significant reduction in area of capacitor bank which would be otherwise needed.

Abstract: In one aspect, the present invention greatly simplifies soft modulation calculations, in part by exploiting certain properties of Gray-mapped QAM constellations used in modulating symbols of interest. In at least one embodiment, the simplified processing includes performing the soft modulation separately for the real and imaginary parts of each symbol of interest, by using the Gray mapping to decompose each of the real and imaginary parts into binary soft modulations for each bit, and then using a computationally-efficient table lookup to calculate the binary soft modulation. Here, the look-up table comprises pre-computed bit contributions to the complex soft symbol value to be formed for the symbol of interest.

Abstract: A correlation image detector is provided that co-registers sonar images by finding peaks in correlation images. To obtain the peaks, the mean of the absolute values of the correlation coefficients in the correlation image is found and the Rayleigh parameter is determined from the mean. Based on the Rayleigh parameter, an appropriate threshold can be determined using a desired probability of false detection. The threshold can be chosen such that the probability of a single false detection over the expected life of the mission for which correlation detection is being performed is extremely low, e.g., one in a million. The peak value in the image is determined and a correlation is considered detected when the peak value is greater than the product of the threshold and the Rayleigh parameter. If a detection occurs, the correlation image detector returns the transformation that co-registers the two images.

Abstract: A passive phase jitter modulation (PJM) tag is charged with power in a continuous wave (CW) section. When receiving a command from a reader, the passive PJM tag must recognize the command and determine exactly when to begin demodulating the command. Only then can the passive PJM tag demodulate the command. To this end, a synchronization apparatus for accurately demodulating a signal input to a PJM tag includes a plurality of correlators correlating a received phase jitter-modulated signal with a template of an internal matched filter which is in the same form as at least a portion of a modified frequency modulation (MFM) flag.

Abstract: A communication apparatus is connected to a transmission channel for transmitting data to another communication apparatus. The communication apparatus includes: a communication frame generator which generates a communication frame for storing the data; and a controller which controls to insert a pilot symbol into the communication frame based on a state of the transmission channel.

Abstract: A system including an estimation module, a processing module, and a control module. The estimation module is configured to generate a first set of channel estimates for a plurality of subcarriers of a received signal. The processing module is configured to generate a second set of channel estimates for the plurality of subcarriers, in which the second set of channel estimates are generated based on the first set of channel estimates. The control module is configured to estimate a preamble sequence in the received signal based on each of (i) the first set of channel estimates and (ii) the second set of channel estimates.

Abstract: In a method and a device for decoding a signal, the signal is transmitted via at least one connecting line of a data transmission system, in a user of the data transmission system receiving the signal. It is provided to measure the interval of a change—provided compulsorily in a transmission protocol used in the data transmission system—of the signal from rising to falling or from falling to rising edge. A tendency for an asymmetrical delay of the signal can be ascertained from the measured interval. The sampling of the bits of the received signal can be improved as a function of the interval or of the asymmetrical delay, for example, by setting the sampling instant in variable fashion. Alternatively, the interval or the asymmetrical delay can be utilized for diagnostic purposes.

Abstract: A system for synchronizing a wireless receiver is provided. The system includes a first antenna and a second antenna to receive independent wireless signals containing different combination of data packets. The system includes one or more analyzer components operable to determine correlation metrics based on at least a portion of the first received signal and a portion of the second received signal. The system further includes a synchronization component operable to use the correlation metrics to determine a preferred correlation metric for synchronization by the wireless receiver of the first and second received signals to decode the data packet. A method for synchronizing a receiver of two wireless signals is also provided.

Abstract: A clock generator circuit for generating synchronization signals for a multiple chip system. The clock generator circuit comprises generation of a synchronization signal from a reference clock and chip global clock with edge detection logic. In high performance server system design with multiple chips, a common practice for server systems is to use feedback clock and delayed reference clock to generate the synchronization signal. The generated synchronization signal is transferred to latches clocked by the global clock to be used for chip synchronization functions. As the system clock frequency is pushed higher, the phase difference between generated synchronization signal clocked by feedback clock and receiving latch clocked by global clock is becoming such a large portion of cycle time that this signal cannot be transferred deterministically.

Abstract: An apparatus for frequency synchronization is proposed to detect a synchronization signal from the baseband signals. It is featured that three types of detection values are introduced to detect whether the synchronization signal is received or not. More particularly, the claimed frequency synchronization apparatus provides at least one signal power generator for receiving a predetermined number of symbols of the baseband signals, and further calculating an average quality value therefore. Further, the apparatus includes a signal selector for producing a first detection value according to the average quality value. Still further, the apparatus provides a decision unit to produce a second detection value. After that, a signal processor inside the decision unit is used to calculate a third detection value as combining the first detection value and the second detection.

Abstract: The disclosed embodiments provide methods and systems for synchronizing a transmitter and a receiver. In one embodiment, a method for synchronizing a transmitter and a receiver includes the transmitter performing a reset operation, and the receiver responding by performing a reset operation. In another embodiment, a method for synchronizing a transmitter and a receiver includes the receiver performing a reset operation, and the transmitter responding by performing a reset operation. The reset indicator includes toggling a reset indicator.

Abstract: A method and a receiver are provided for demodulating a received multi-carrier modulated signal. The demodulation procedure includes (a) multiplying the received multi-carrier modulated signal with its complex conjugate to obtain a squared signal; (b) multiplying the squared signal with a carrier demodulating signal to obtain a product signal, and integrating the product signal over the duration T. A bit decision may then be performed on the integration result using analog components without the need for high-speed analog-to-digital conversion.

Abstract: Systems and techniques are disclosed wherein a gated pilot signal can be re-acquired faster by searching a last known pilot offset and/or searching a last coset in which the last pilot signal was found.

Abstract: Provided is a method for synchronizing a multiple carrier receiver to receive a transmitted signal. The method includes determining a location of one or more scattered pilot carriers in a received symbol sequence and modulating the scattered pilot carriers in accordance with a single pseudorandom binary sequence. The method also includes performing phase error correction via the modulated scattered pilot carriers.

Abstract: A method for detecting a specific timing from a synchronization channel is described. A signal with a known sequence is received. Two or more correlation values between the received signal and the known sequence are calculated at two or more positions. The two or more correlation values are compared. A determination is made whether the position of the known sequence has been shifted based on the comparison. A specific timing of a synchronization channel is detected based on the determination.

Abstract: A communication apparatus including a clock generation circuit outputting a plurality of clocks, each clock having a different phase from the other, a synchronization detection block receiving a sync word and a payload having a predetermined length after receiving the payload, sampling the sync word by using each of the plurality of clocks and to output a first signal indicating a clock or clocks capable of sampling the sync word successfully, the synchronization detection block being capable of sampling the payload by using a clock or clocks, a clock phase selection block coupled to the synchronization detection block to receive the first signal, and a clock gate unit to receive each of the plurality of clocks and the second signal to output the selected one of the plurality of clocks, and not to output a rest of the plurality of the clocks based on the second signal.

Abstract: Certain aspects of a method and system for satellite communication are disclosed. Aspects of one method may include a receiver that handles digital video broadcasting. The receiver may be enabled to dynamically vary spacing between one or more pilots within at least one frame based on a determined symbol rate. The size of each of a plurality of received programs may be determined and the spacing between one or more pilots may be dynamically varied based on the determined size of each of the plurality of received programs.