Nonuniform Coating Patents (Class 427/102)
  • Patent number: 6214563
    Abstract: The present invention provides a method for reducing undesirable light emission from a sample using at least one photon producing agent and at least one photon reducing agent (e.g. dye-based photon reducing agents). The present invention further provides a method for reducing undesirable light emission from a sample (e.g., a biochemical or cellular sample) with at least one photon producing agent and at least one collisional quencher. The present invention also provides a method for reducing undesirable light emission from a sample (e.g., a biochemical or cellular sample) with at least one photon producing agent and at least one quencher, such as an electronic quencher. The present invention further provides a method of determining bound and free analyte in a sample using at least one photon reducing agent. The present invention also provides a method of screening test chemicals in fluorescent assays using photon reducing agents.
    Type: Grant
    Filed: July 21, 1998
    Date of Patent: April 10, 2001
    Assignee: Aurora Biosciences Corporation
    Inventors: Paul Negulescu, Gregor Zlokarnik, Tom Knapp, Roger Y. Tsien, Tim Rink
  • Patent number: 6200762
    Abstract: The present invention provides a method for reducing undesirable light emission from a sample using at least one photon producing agent and at least one photon reducing agent (e.g. dye-based photon reducing agents). The present invention further provides a method for reducing undesirable light emission from a sample (e.g., a biochemical or cellular sample) with at least one photon producing agent and at least one collisional quencher. The present invention also provides a method for reducing undesirable light emission from a sample (e.g., a biochemical or cellular sample) with at least one photon producing agent and at least one quencher, such as an electronic quencher. The present invention further provides a method of determining bound and free analyte in a sample using at least one photon reducing agent. The present invention also provides a method of screening test chemicals in fluorescent assays using photon reducing agents.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: March 13, 2001
    Assignee: Aurora Biosciences Corporation
    Inventors: Gregor Zlokarnik, Paul Negulescu, Tom Knapp, Roger Y. Tsien, Tim Rink
  • Patent number: 6187372
    Abstract: A method for creating large area, thick film resistors with improved predictability and uniformity. “Tent poles” are employed during the printing of the large area resistors to prop up the screen mesh to ensure the resultant resistor does not have a scooped out center portion. The tent poles can be made from gold pads, resistor spots or emulsion spots.
    Type: Grant
    Filed: April 29, 1999
    Date of Patent: February 13, 2001
    Assignee: Agilent Technologies, Inc.
    Inventors: Rosemary O Johnson, John F Casey, Lewis R Dove
  • Patent number: 6171644
    Abstract: The present invention aims to present an electronic component which is free from the fear of sneaking-in of water etc. from the edge of electrode, by covering the electrode edge with resin. For the purpose, external electrodes (3) are formed at both ends of varistor (1) comprised of ceramic sheet (1a) and internal electrode (2) laminated alternately, and then, a within-the-surface insulation layer (30) is formed by covering the porous surface inside the varistor (1), or filling the Porosity, with silicone resin, and an outside-the-surface insulation layer (31) is formed covering the surface of varistor (1) and the edge of external electrode (3).
    Type: Grant
    Filed: April 22, 1999
    Date of Patent: January 9, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Riho Jinno, Kazuyuki Nakamura
  • Patent number: 6153256
    Abstract: A chip resistor includes a spaced pair of main top electrodes on an insulating substrate, a resistor layer formed on the insulating substrate to bridge between the main top electrodes, an overcoat layer formed over the resistor layer, and a pair of auxiliary top electrodes formed on the main top electrodes in contact with the overcoat layer. Each of the auxiliary top electrodes contains a glass material in addition to a metal material for integration with the overcoat layer.
    Type: Grant
    Filed: August 13, 1999
    Date of Patent: November 28, 2000
    Assignee: Rohm Co., Ltd.
    Inventors: Shigeru Kambara, Kaoru Sakai
  • Patent number: 6146552
    Abstract: Zinc oxide ceramics and a method for producing the same are provided wherein zinc oxide varistors for low and high voltages having excellent electric characteristics and high reliability upon DC loading and surge can be obtained in high yield by low-temperature sintering. 0.2 to 20 parts by weight of a mixed powder of bismuth oxide, titanium oxide and antimony oxide is treated in advance at a temperature of 850.degree. C. or less. The synthetic powder thus obtained is added to 100 parts by weight of ZnO material powder to produce ceramics. By using the ceramics for a zinc oxide varistor, a zinc oxide varistor for a low or high voltage can be produced in high yield, which can be sintered at a low temperature and is excellent in electric characteristics and reliability upon DC loading and surge. Aluminum is sprayed on both sides of a sintered body so that an aluminum layer is formed. Copper is sprayed on the aluminum layer so that an electrode is formed. A lead wire is bonded to the electrode.
    Type: Grant
    Filed: February 12, 1998
    Date of Patent: November 14, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Atsushi Iga, Hideyuki Okinaka, Masahiro Ito
  • Patent number: 6127040
    Abstract: Electroceramic component having a component body (10), connection metallization coatings (2, 3) and also a protective encapsulation (15 to 18) made of two different materials on in each case two mutually opposite areas of the component body (10) which are free from the connection metallization coatings (2, 3).
    Type: Grant
    Filed: February 22, 1999
    Date of Patent: October 3, 2000
    Assignee: Siemens Matsushita Components GmbH & Co. KG
    Inventors: Peter Grobbauer, Gunter Ott, Heinrich Zodl
  • Patent number: 6120835
    Abstract: A thick film process for producing hydrogen sensors capable of sensing down to a one percent concentration of hydrogen in carrier gasses such as argon, nitrogen, and air. The sensor is also suitable to detect hydrogen gas while immersed in transformer oil. The sensor includes a palladium resistance network thick film printed on a substrate, a portion of which network is coated with a protective hydrogen barrier. The process utilizes a sequence of printing of the requisite materials on a non-conductive substrate with firing temperatures at each step which are less than or equal to the temperature at the previous step.
    Type: Grant
    Filed: July 13, 1999
    Date of Patent: September 19, 2000
    Assignee: Honeywell International Inc.
    Inventor: Louisa H. Perdieu
  • Patent number: 6090435
    Abstract: The electronic component of the present invention includes: an element having an internal electrode therein; an external electrode formed on an end portion of the element where an end face of the internal electrode is exposed; and a protection layer formed on the entire surface of the element except for the end portion of the element, wherein the protection layer is made of a metal oxide.
    Type: Grant
    Filed: September 15, 1998
    Date of Patent: July 18, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd
    Inventors: Iwao Ueno, Yasuo Wakahata
  • Patent number: 5935642
    Abstract: Resistor material such as polysilicon is deposited on the insulating surface of a substrate and patterned to form resistor layers disposed generally parallel. Another resistor material such as polysilicon is deposited filling each space between adjacent resistor layers, with an insulating film being interposed between the upper and lower resistor materials, and etched back to form other resistor layers at respective spaces. After an insulating film is formed covering the resistor layers, contact holes are formed in the insulating film. A conductive layer is deposited and patterned to serially connect the resistor layers.
    Type: Grant
    Filed: November 20, 1996
    Date of Patent: August 10, 1999
    Assignee: Yamaha Corporation
    Inventor: Shigeru Suga
  • Patent number: 5932280
    Abstract: Resistors for a printed circuit board and methods for making are provided using thermal transfer techniques to transfer coating material having some degree of electrical conductivity from a thermal transfer ribbon to the printed circuit board. Parts of the coating material transferred to the printed circuit board form resistors having varying resistances based on the geometry of the material transferred. Multiple ribbons having coatings with varying degrees of electrical conductivity may also be used to provide greater variances in resistor values obtainable.
    Type: Grant
    Filed: December 19, 1995
    Date of Patent: August 3, 1999
    Assignee: NCR Corporation
    Inventor: Joseph D. Roth
  • Patent number: 5900275
    Abstract: The haze in a conductive tin oxide coating deposited on a substrate, particularly glass, can be reduced by applying, to a desired thickness, a solid-state coating, where the solid-state layer is applied as a precursor liquid to the tin oxide layer, is then dried and/or converted to a solid-state film overlying the conductive tin oxide film on the substrate.
    Type: Grant
    Filed: July 15, 1992
    Date of Patent: May 4, 1999
    Assignee: Donnelly Corporation
    Inventors: John P. Cronin, Anoop Agrawal, Michael Trosky
  • Patent number: 5866196
    Abstract: The electronic component of the present invention includes: an element having an internal electrode therein; an external electrode formed on an end portion of the element where an end face of the internal electrode is exposed; and a protection layer formed on the entire surface of the element except for the end portion of the element, wherein the protection layer is made of a metal oxide.
    Type: Grant
    Filed: March 6, 1997
    Date of Patent: February 2, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Iwao Ueno, Yasuo Wakahata
  • Patent number: 5837178
    Abstract: A method for use in making multilayered varistors including the steps of forming a plurality of interleaved layers of ceramic material and conductive material, confining the conductive material to spaced areas arranged in rows and columns, displacing the spaced areas of adjacent layers of conductive material from each other, and cutting perpendicularly through the layers. The layers are formed by screen printing.
    Type: Grant
    Filed: June 18, 1993
    Date of Patent: November 17, 1998
    Assignee: ECCO Limited
    Inventors: Stephen P. Cowman, Alan J. Ratcliffe, Derek A. Nicker, John M. Shreeve, Anthony L. Oliver
  • Patent number: 5702653
    Abstract: A thick-film switch element includes a high-temperature glass frit fused to a non-conductive substrate. A cermet layer having a low-temperature glass matrix is fired in a conventional furnace to sink into the glass frit layer such that the resulting thickness of the switch element layer is approximately equal to the original thickness of the glass frit layer. The wet print thickness of the cermet layer is controlled upon application of the cermet to the glass frit. The glass frit and cermet are fired at a controlled temperature and duration to achieve a fired print thickness of the cermet above the surface of the glass frit having a pre-determined value. In one embodiment, the non-conductive substrate is a metal, such as stainless steel.
    Type: Grant
    Filed: July 11, 1995
    Date of Patent: December 30, 1997
    Assignee: Spectrol Electronics Corporation
    Inventor: Richard E. Riley
  • Patent number: 5624782
    Abstract: To provide a method of manufacturing thick-film resistor elements that forms thick-film resistors having a uniform thickness on a substrate surface with high precision.A method of manufacturing thick-film resistor elements by applying a thick-film resistor composition, obtained by dispersing a conductive component and an inorganic binder in an organic medium and which has a specified rheology, through a clear relief image obtained by exposing, curing, and developing a resist layer of a photopolymerizable mixture formed on an insulating substrate according to the resist pattern, and the thick-film paste obtained at this time has almost the same thickness as the photopolymerizable layer on the surface of the insulating substrate and is patterned according to the high-precision pattern defined by the sharp, linear, lateral edge enclosed by the resist image removed by development.
    Type: Grant
    Filed: May 11, 1995
    Date of Patent: April 29, 1997
    Assignee: E. I. Du Pont de Nemours and Company
    Inventors: Keiichiro Hayakawa, Jerome D. Smith, Hidehiro Yamada
  • Patent number: 5614074
    Abstract: A method of providing a semiconductor device with an inorganic electrically insulative layer, the device having exposed semiconductor surfaces and electrically conductive metal end terminations, in which the device is reacted with phosphoric acid to form a phosphate on the exposed surfaces of the semiconductor but not on the metal end terminations, and in which the device is thereafter barrel plated in a conventional electrical barrel plating process and the plating is provided only on the end terminations because the phosphate is not electrically conductive.
    Type: Grant
    Filed: December 9, 1994
    Date of Patent: March 25, 1997
    Assignee: Harris Corporation
    Inventor: Palaniappan Ravindranathan
  • Patent number: 5609910
    Abstract: A heater array for an ink jet printhead includes an insulating substrate, which can be a layer of ceramic, flexible plastic, insulated flexible metal, polysilicon, or single crystalline silicon. A first material layer is deposited atop the insulating substrate and patterned in parallel stripes. A first insulating layer is deposited atop the first material layer and patterned with contact windows above the first material layer in corresponding desired heating locations, usually in a symmetrical grid. A second material layer is deposited atop the first insulating layer and pattern in parallel stripes orthogonal to those in the first material layer. The first and second material layers are in physical and electrical contact with each other through the contact windows in the first insulating layer to form a resistive diode junction at each desired heating location. The entire surface of the heating array is covered with a second insulating layer, with contacts provided to the first and second material layers.
    Type: Grant
    Filed: January 10, 1995
    Date of Patent: March 11, 1997
    Assignee: Hewlett-Packard Company
    Inventor: David E. Hackleman
  • Patent number: 5589270
    Abstract: Electrification is suppressed with a water-soluble electrification-suppressing film having an electron conductivity and comprising a polymer resin. A high electrification-suppressing effect which is also high in vacuum can be easily obtained by using the electrification-suppressing film with less contamination.
    Type: Grant
    Filed: June 1, 1995
    Date of Patent: December 31, 1996
    Assignees: Hitachi, Ltd., Showa Denko K.K.
    Inventors: Fumio Murai, Yasunori Suzuki, Hideki Tomozawa, Ryuma Takashi, Yoshihiro Saida, Yoshiaki Ikenoue
  • Patent number: 5494756
    Abstract: A procedure is described for wet chemical surface modification of formed articles and substrates coated with made of organopolysiloxanes: the articles formed were contacted with metal hydroxide solutions to tailor the binding capacity for ions, particularly metal ions, bivalent cations, organic macro anions, and organic macro cations, e.g. proteins. The procedure creates organopolysiloxane surfaces which are better wettable, have reduced surface resistance, are less sticky, are smoother and more biocompatible.
    Type: Grant
    Filed: May 14, 1993
    Date of Patent: February 27, 1996
    Assignee: General Electric Company
    Inventor: Rolf Siegel
  • Patent number: 5494180
    Abstract: A hybrid resistance card (R-Card) is manufactured using a two-step process wherein an electrically conductive ink layer and an electrically resistive ink layer are printed onto a surface, which may be either a substrate or the part on which the R-Card is to be used. The conductive ink layer is selectively applied in a pattern of shapes to electrically short out portions of the resistive ink layer, thereby permitting the R-Card to have a predetermined resistive taper across its width according to a desired resistivity curve. The resistive ink layer comprises grid-like lines bordering and separating the conductive shapes. The resistive taper is substantially continuous along the length of the R-Card, at least linearly, though if the card is designed to cover an entire part, it is substantially continuous along a plurality of directions on the card, with the tapers being designed to round into one another.
    Type: Grant
    Filed: September 26, 1994
    Date of Patent: February 27, 1996
    Assignee: McDonnell Douglas Helicopter Company
    Inventor: Stephen A. Callahan
  • Patent number: 5443862
    Abstract: A method is provided for generating one or more differentiated zones of electrical conductivity or infrared emissivity in a thin semi-conducting layer of metallic oxide or oxides, comprising:subjecting the thin semi-conducting layer to an ion beam having sufficient energy to cause a change in electrical conductivity or infrared emissivity of the one or more zones without atomizing the thin semi-conducting layer, wherein the thin semi-conducting layer is at a high temperature during the subjecting step and the use of the method to prepare films for incorporation into transparent heating panes having uniform heating characteristics, especially for use in vehicles.
    Type: Grant
    Filed: August 30, 1993
    Date of Patent: August 22, 1995
    Assignee: Saint-Gobain Vitrage International
    Inventors: Bernard Buffat, Daniele Pillias, Francois Lerbet
  • Patent number: 5382205
    Abstract: A control device for an internal combustion engine (E) and a continuous variable transmission (35) according to the present invention is disposed in a power transmission method (P) between the internal combustion engine (E) mounted on a vehicle and driving wheels (32) and of which transmission ratio can be continuously changed at a predetermined transmission speed Vm so as to maintain the transmission ratio i suitable for engine speed .omega.e and vehicle speed Vc. In addition, the device controls power of the internal combustion engine (E).The control device for an internal combustion engine (E) and a continuous variable transmission (35) sets the transmission speed Vm according to a deviation .DELTA.i between an objective transmission ratio io and an actual transmission ratio in to control the continuous variable transmission (35) at the transmission speed Vm. On the other hand, it controls the power of the internal combustion engine (E) by means of transmission auxiliary torque .DELTA.
    Type: Grant
    Filed: January 7, 1993
    Date of Patent: January 17, 1995
    Assignee: Mitsubishi Jidosha Kogyo Kabushiki Kaisha
    Inventors: Kazuhide Togai, Takashi Takatsuka, Makoto Shimada, Junji Kawai, Kazuya Hayafune
  • Patent number: 5364705
    Abstract: A hybrid resistance card (R-Card) is manufactured using a two-step process wherein an electrically conductive ink layer and an electrically resistive ink layer are printed onto a surface, which may be either a substrate or the part on which the R-Card is to be used. The conductive ink layer is selectively applied in a pattern of shapes to electrically short out portions of the resistive ink layer, thereby permitting the R-Card to have a predetermined resistive taper across its width according to a desired resistivity curve. The resistive ink layer comprises grid-like lines bordering and separating the conductive shapes. The resistive taper is substantially continuous along the length of the R-Card, at least linearly, though if the card is designed to cover an entire part, it is substantially continuous along a plurality of directions on the card, with the tapers being designed to round into one another.
    Type: Grant
    Filed: June 25, 1992
    Date of Patent: November 15, 1994
    Assignee: McDonnell Douglas Helicopter Co.
    Inventor: Stephen A. Callahan
  • Patent number: 5346720
    Abstract: An electrically resistive film of the type used for forming thick film resistors is formed predominantly of palladium and includes an addition of boron nitride to increase resistance, preferably in combination with tantalum oxide. A paste of palladium powder and boron nitride powder dispersed in a vaporizable vehicle is applied to a substrate and sintered to form the film. In a preferred embodiment, the substrate is a ceramic powder compact that is concurrently sintered in a co-firing process.
    Type: Grant
    Filed: July 6, 1993
    Date of Patent: September 13, 1994
    Assignee: Motorola, Inc.
    Inventors: James H. Lombard, Leonard J. Anderson
  • Patent number: 5326589
    Abstract: The invention provides a method of protecting an electronic or electric part by coating the part with a silicone rubber composition comprising an organopolysiloxane, an organohydrogenpolysiloxane, an addition reaction catalyst, and a filler. When metal oxide fine particles obtained by deflagration of metal powder dust in an oxygen-containing atmosphere are blended as the filler, the composition has sufficient purity to cover electronic and electric parts and cured products of the composition are improved in electrical properties and heat resistance, thereby protecting the electronic or electric part.
    Type: Grant
    Filed: February 4, 1993
    Date of Patent: July 5, 1994
    Assignee: Shin-Etsu Chemical Co., Ltd
    Inventors: Hiroshige Okinoshima, Toshio Shiobara, Tsutomu Kashiwagi
  • Patent number: 5302412
    Abstract: The present invention provides an improved method for firing thick film inks in hybrid circuits which comprises firing different copper compatible thick film materials in a single firing atmosphere. The method comprises the steps of providing a paste suitable for application to a ceramic substrate, applying the paste to the substrate by a conventional technique such as screen printing, drying the substrate, and firing the substrate at an elevated temperature in an ambient comprising an inert gas and carbon dioxide to form the electrical component. In another embodiment, the substrate is fired in an ambient comprising only carbon dioxide.
    Type: Grant
    Filed: May 14, 1992
    Date of Patent: April 12, 1994
    Assignee: The BOC Group, Inc.
    Inventors: Satish S. Tamhankar, Mark J. Kirschner
  • Patent number: 5262195
    Abstract: Soluble conducting polymers from substituted polyanilines and large organic counterions are disclosed and used directly from solution in the manufacture of electronic devices.
    Type: Grant
    Filed: October 7, 1992
    Date of Patent: November 16, 1993
    Assignee: Brewer Science
    Inventors: Mary G. Moss, Terry L. Brewer, Tony D. Flaim
  • Patent number: 5169465
    Abstract: A thick-film switch element includes a high-temperature glass frit fused to a ceramic substrate. A cermet layer having a low-temperature glass matrix is fired in a conventional furnace to sink into the glass frit layer such that the resulting thickness of the switch element layer is approximately equal to the original thickness of the glass frit layer. The exposed surface of the resulting thick-film switch element product is substantially smooth and the joint between the low-temperature cermet layer and the high-temperature glass frit layer is substantially uniform.
    Type: Grant
    Filed: January 28, 1991
    Date of Patent: December 8, 1992
    Assignee: Spectrol Electronics Corporation
    Inventor: Richard E. Riley
  • Patent number: 5169493
    Abstract: A conductive paste layer of less than 5 .mu.m is formed on an insulating substrate. After a drying and a baking treatment of the conductive paste layer, an etching is carried out to form a plurality of electrode pairs. Resistor layers are formed corresponding to each pair of the electrodes so as to partially overlap with the electrodes.
    Type: Grant
    Filed: April 16, 1990
    Date of Patent: December 8, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Minoru Nii, Yoshitaka Fukuoka
  • Patent number: 5169679
    Abstract: A printed circuit board includes both high and low resistive value thick film resistors interconnected by a copper film. To lower the contact resistance to the thick film resistors of high value, each is provided at its ends with a termination of a composition similar to that used for the low value resistors. This provides a relatively low resistance contact region which overcomes the difficulty that a copper thick film conductor has in making electrical connections to compositions generally used for making high value thick film resistors. The composition of high and low resistivities are adapted to permit firing of both compositions in a single firing step.
    Type: Grant
    Filed: October 11, 1988
    Date of Patent: December 8, 1992
    Assignee: Delco Electronics Corporation
    Inventor: Ponnusamy Palanisamy
  • Patent number: 5089293
    Abstract: A platinum resistance thermometer is formed in a process which includes the defining of a path for the resistance thermometer in an inert material deposited in a layer on the substrate. The substrate surface is exposed in the path, and the inert material forms a negative pattern for the path. The resistive material for the thermometer is then deposited on both the substrate surface exposed in the path and on the surfaces of the inert material remaining on the substrate. After this, the inert material is etched away, and the resistive material deposited on top of the inert material is then loose and can be removed leaving a strip of resistive material in the desired path for forming the resistive thermometer. The strip has low contamination and impurities to more easily reach the desired temperature coefficient of resistance of the strip forming the thermometer.
    Type: Grant
    Filed: July 13, 1989
    Date of Patent: February 18, 1992
    Assignee: Rosemount Inc.
    Inventors: Robert C. Bohara, James A. Ruf
  • Patent number: 5069748
    Abstract: This is a structure of, and method for preparation of, molybdenum resistors in a superconductor integrated circuit. It utilizes a pattern superconductor film; applying a titanium film on the patterned superconductor film; and then applying a molybdenum film on the titanium film to provide a titanium-molybdenum, etch-stop interface; applying a patterned resist film on the molybdenum film; etching the exposed molybdenum film to expose a portion of the titanium-molybdenum, etch-stop interface; and oxidizing the exposed titanium-molybdenum, etch-stop interface. The titanium-molybdenum etch stop interface protects the patterned superconductor film and the support (including any other underlayers) and increases processing margins for the etch time.
    Type: Grant
    Filed: January 22, 1991
    Date of Patent: December 3, 1991
    Assignee: Westinghouse Electric Corp.
    Inventor: John X. Przybysz
  • Patent number: 5037670
    Abstract: Fine copper and nickel powders are well mixed in a preselected ratio with bonding agents and carriers as appropriate. The composition then may be patterned upon a substrate by screen printing and subsequent firing in a nitrogen atmosphere to produce a low sheet resistance, low TCR electrical resistor. Various alloy powders, inert materials, and glass frits may be used depending upon the desired characteristics.
    Type: Grant
    Filed: November 1, 1989
    Date of Patent: August 6, 1991
    Assignee: CTS Corporation
    Inventors: Charles C. Y. Kuo, Tom O. Martin
  • Patent number: 5030479
    Abstract: A method for producing an air flow rate meter substrate which includes at least one resistive film on one side of the substrate with a teardrop end face that faces the direction of air flow to be determined, formed by dipping the face end of the substrate into a liquid plastic or a lacquer composition.
    Type: Grant
    Filed: April 27, 1990
    Date of Patent: July 9, 1991
    Assignee: Robert Bosch GmbH
    Inventors: Heinz Gneiss, Wolfgang Kienzle, Rudolf Sauer, Weiner Wuensch
  • Patent number: 5023589
    Abstract: A low-resistance nickel-chromium-based thin film resistor and method for forming same. A nickel-chromium alloy film is coated on at least one side with a layer of gold, the resulting gold-coated alloy film is heated at a temperature and for a time effective to cause diffusion of sufficient gold into the nickel-chromium film to lower its resistance to a desired value, and the gold layer is then removed, to leave a nickel-chromium-gold composite film resistor.
    Type: Grant
    Filed: September 8, 1989
    Date of Patent: June 11, 1991
    Assignee: Electro-Films, Inc.
    Inventor: Allen T. Hall
  • Patent number: 4975299
    Abstract: The invention comprises applying to a substrate a precursor of an organo-metallic compound, the precursor preferably consists of one or more pairs of ligand substituted Group III and V elements. The precursor is decomposed and deposits onto a receiving layer held at the decomposing temperature of the vaporized material.
    Type: Grant
    Filed: November 2, 1989
    Date of Patent: December 4, 1990
    Assignee: Eastman Kodak Company
    Inventors: Jose M. Mir, Alex Wernberg
  • Patent number: 4963389
    Abstract: A method for producing a high density hybrid integrated circuit substrate capable of forming a very fine pattern of a conductor by means of the chemical plating and at the same time capable of applying the chemical plating, while protecting the resistor formed on the substrate in advance of the chemical plating step, the production method comprising steps of: forming a resistor on an electrically insulating substrate; forming an activating layer for depositing a chemical plating on the electrically insulating substrate in contact with the resistor; forming a stable resin layer, during the chemical plating step, by the photolithography process in a manner to cover the resistor, except for the portion of the activating layer where an electrically conductive layer is to be formed; and forming the electrically conductive layer by the chemical plating on the exposed portion of the activating layer.
    Type: Grant
    Filed: January 6, 1989
    Date of Patent: October 16, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuyuki Takada, Ryusaku Tsukao, Hayato Takasago
  • Patent number: 4956298
    Abstract: A column unit is provided consisting of a centrifuging vessel and a receiving body with feed and discharge openings located at opposite ends. Desired column material is located within a middle portion of a hollow cylinder of the receiving body. A portion of the receiving body containing the discharge opening and the column material is received by the centrifuging vessel. The entire column unit is inserted into a conventional stand in a centrifuge. Accordingly, when sample material is introduced into the receiving body through the feed opening, it may flow without misdirection through the column material and discharge opening and into the centrifuge vessel.
    Type: Grant
    Filed: January 13, 1989
    Date of Patent: September 11, 1990
    Inventor: Stephan Diekmann
  • Patent number: 4956335
    Abstract: A patterned crystalline superconducting layer is formed by first providing a copper oxide lift-off layer under an amorphous metal oxide superconducing precursor layer and then photolithographically forming a pattern in the layers. The patterned layers are then heat treated to form the final crystalline superconducting layer.
    Type: Grant
    Filed: June 20, 1988
    Date of Patent: September 11, 1990
    Assignee: Eastman Kodak Company
    Inventors: John A. Agostinelli, Gerrit Lubberts
  • Patent number: 4888089
    Abstract: An electrical resistance device includes a conductive metal pattern carried on an insulating surface. A portion of the conductive metal pattern includes a two-dimensional array of areas devoid of conductive material ("voids") within a mesh of conductive material. Typically, the voids are hexagonal and are arranged such that the adjacent edges of adjacent hexagons are parallel to each other and spaced apart a distance not more than about 0.10 in. The hexagonal voids typically are arranged so that the centers of sets of three adjacent voids lie on the corners of equilateral triangles.
    Type: Grant
    Filed: January 11, 1988
    Date of Patent: December 19, 1989
    Assignee: Flexwatt Corporation
    Inventors: John A. Marstiller, Paul H. Bodensiek, Frederick G. Grise
  • Patent number: 4841626
    Abstract: A process for producing nonlinear resistance tracks on a supporting base uld be carried out in such a way that constant transitions are provided between the nonlinear resistance sub-ranges. For this purpose the supporting base is moved under a coating device at right angles to the longitudinal direction of the base strips provided whereby this coating device applies several strips of resistance paste onto the supporting base in the wet condition so that they are close to each other. The resistance pastes have different resistance values according to the set non-linear resistance pattern. The base strips are cut out of the supporting base at right angles to its direction of movement.
    Type: Grant
    Filed: September 11, 1987
    Date of Patent: June 27, 1989
    Assignee: Preh, Elecktrofeinmechanische Werke, Jakob Preh, Nachf. GmbH & Co.
    Inventor: Franz Griebel
  • Patent number: 4827287
    Abstract: An orifice plate assembly for use in continuous ink jet printers includes a linear orifice plate having formed therein at least one linear array of orifices extending from a first end region to a second end region. The orifice plate has a main body portion which tapers gradually in thickness (t) along the length of the plate from the first end region to the second end region. The orifice plate is mounted so as to have an effective width (w) which tapers from the first to second end region. The relation t.div.w remains approximately constant along its length dimension.
    Type: Grant
    Filed: August 8, 1988
    Date of Patent: May 2, 1989
    Assignee: Eastman Kodak Company
    Inventors: Hilarion Braun, Ralph E. Antolik, III
  • Patent number: 4824694
    Abstract: An improved resistive element comprises a film-type resistive layer applied to an insulative substrate and then fired. An array of discrete, spaced apart islands of predominantly conductive material is then applied to the resistive layer in a repetitive pattern having predetermined inter-island spacing. The islands have a conductivity that is substantially greater than the conductivity of the resistive layer. Preferably, the islands are of substantially uniform shape and size. In one preferred embodiment, the islands are formed of a conductive thick film ink that is screen-printed onto a cermet resistive layer through an appropriate mask, and then fired. In another preferred embodiment, the islands are formed of a conductive metal that is applied to the resistive layer by vapor deposition, sputtering, or ion implantation through a suitable mask.
    Type: Grant
    Filed: February 26, 1988
    Date of Patent: April 25, 1989
    Assignee: Bourns, Inc.
    Inventors: Wayne P. Bosze, Ronald L. Froebe, Gordon McClure, Ronald E. Thomas, Jr., Philip F. Weingartner
  • Patent number: 4812419
    Abstract: A via connection and method for making the same for integrated circuits having multiple layers of electrically conductive interconnect lines separated by an insulative layer. The via connection is characterized by a very thin layer of high resistivity material lining the via hole in conductive contact with interconnect lines in two layers. The resistivity of the thin layer material is in a range from about 10 to about 50 times the interconnect line resistivities and generally has a thickness of less than 100 nanometers. The thin layer assures more uniform current flow in the via connection thereby preventing electromigration, with reduced peak local current density by causing current to swing more widely around the corner at the interface between the interconnect lines at the via.
    Type: Grant
    Filed: April 30, 1987
    Date of Patent: March 14, 1989
    Assignee: Hewlett-Packard Company
    Inventors: Keunmyung Lee, Yoshio Nishi
  • Patent number: 4805296
    Abstract: A method of manufacturing a resistance thermometer which includes the steps of preparing a support substrate and forming a platinum film, which serves as a temperature measuring element, on the support substrate by a sputtering process employing a sputtering gas which contains a predetermined amount of oxygen gas, and a resistance thermometer produced by the method. The method which optionally includes forming an aluminum oxide film, the substrate and the platinum film.
    Type: Grant
    Filed: September 10, 1986
    Date of Patent: February 21, 1989
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akihito Jinda, Hisatoshi Furubayashi, Masaya Hijikigawa, Hiroki Tabuchi
  • Patent number: 4801469
    Abstract: A standard thin film circuit containing Ta.sub.2 N (100 ohms/square) resirs is fabricated by depositing on a dielectric substrate successive layers of Ta.sub.2 N, Ti and Pd, with a gold layer to provide conductors. The addition of a few simple photoprocessing steps to the standeard TFN manufacturing process enables the formation of Ta.sub.2 N+Ti (10 ohms/square) and Ta.sub.2 N+Ti+Pd (1 ohm/square) resistors in the same otherwise standard thin film circuit structure.
    Type: Grant
    Filed: August 7, 1986
    Date of Patent: January 31, 1989
    Assignee: The United States of America as represented by the Department of Energy
    Inventor: David P. Norwood
  • Patent number: 4766010
    Abstract: A ceramic composition for dielectrics, consisting essentially of an inorganic dielectric material including at least one electrically insulating glass and at least one organic binder, and further comprising at least one inorganic peroxide. The inorganic peroxide serves to facilitate burnout or removal of the organic binder during firing of the ceramic composition and minimizes the content of residual carbon in the fired ceramic composition. The inorganic peroxide is preferably selected from the group consisting of calcium peroxide, strontium peroxide, barium peroxide, zinc peroxide and cadmium peroxide, and present preferably in an amount of 0.1-40% by weight. Also disclosed is a process of manufacturing a ceramic circuit board using the ceramic composition stated above.
    Type: Grant
    Filed: December 2, 1986
    Date of Patent: August 23, 1988
    Assignee: NGK Insulators, Ltd.
    Inventors: Yukihisa Takeuchi, Hideo Masumori
  • Patent number: 4759836
    Abstract: A thin film resistor is formed using sputtering to deposit a thin film of resistive material on an insulating surface. The sputter target is composed of constituents which are normally present in relatively large quantities in thin film resistors, such as chromium silicide and silicon carbide. The sputtered thin film material is formed into resistor regions. An insulating layer is deposited over the thin film material. Ions (e.g., boron ions) are then implanted into the thin film through the insulating layer. These implanted constituents have a significant effect on the temperature coefficient and sheet resistance of the thin film resistor. Ion implantation of these constituents enables more control over the characteristics of the thin film resistor as compared to prior art techniques not using ion implantation.
    Type: Grant
    Filed: August 12, 1987
    Date of Patent: July 26, 1988
    Assignee: Siliconix Incorporated
    Inventors: Lorimer K. Hill, Barry L. Chin, Richard A. Blanchard
  • Patent number: 4735676
    Abstract: A method for forming a plurality of electrically conductive circuits of at least four laminations on a single base board having copper laminations attached on both sides thereof, for example, wherein the base board is processed to provide a through-hole therein, subjected to a catalyst treatment, etched to provide a plurality of circuits of a first lamination, effectively processed with a plating-resistant resist and an electrically conductive copper paste to provide a circuit of a second lamination on the circuits of the first lamination by making a pre-plating treatment and a subsequent chemical treatment applied to the copper paste.
    Type: Grant
    Filed: December 29, 1986
    Date of Patent: April 5, 1988
    Assignee: Asahi Chemical Research Laboratory Co., Ltd.
    Inventor: Yamahiro Iwasa