Abstract: A first BPSG film covering a transistor is formed. Next, a second BPSG film is formed on the first BPSG film. The B concentration in the first BPSG film is about five times higher than the B concentration in the second BPSG film. Next, the first BPSG film is separated into a part of a source diffusion layer side and a part of a drain diffusion layer side, with a gate electrode being a boundary. Subsequently, a contact hole reaching the source diffusion layer is formed in the first and second BPSG films. Then, by removing the first BPSG film exposed to the contact hole by isotropic etching, a hollow portion is formed between the source diffusion layer and the second BPSG film. Then, a barrier metal film made of TiN or the like is formed in the hollow portion.

Abstract: A semiconductor structure and methods for forming the same. The structure includes (a) a substrate; (b) a first device and a second device each being on the substrate; (c) a device cap dielectric layer on the first and second devices and the substrate, wherein the device cap dielectric layer comprises a device cap dielectric material; (d) a first dielectric layer on top of the device cap dielectric layer, wherein the first dielectric layer comprises a first dielectric material; (e) a second dielectric layer on top of the first dielectric layer; and (f) a first electrically conductive line and a second electrically conductive line each residing in the first and second dielectric layers. The first dielectric layer physically separates the first and second electrically conductive lines from the device cap dielectric layer. A dielectric constant of the first dielectric material is less than that of the device cap dielectric material.

Abstract: An electro-optic display comprises a substrate (100), non-linear devices (102) disposed substantially in one plane on the substrate (100), pixel electrodes (106) connected to the non-linear devices (102), an electro-optic medium (110) and a common electrode (112) on the opposed side of the electro-optic medium (110) from the pixel electrodes (106). The moduli of the various parts of the display are arranged so that, when the display is curved, the neutral axis or neutral plane lies substantially in the plane of the non-linear devices (102).

Abstract: A method for fabricating a fine pattern in a semiconductor device includes forming a first polymer layer and a second polymer layer over an etch target layer. The second polymer layer is patterned at a first substrate temperature. The first polymer layer is etched at a second substrate temperature using an etch gas that does not include oxygen (O2). The first polymer layer is etched using the patterned second polymer layer as an etch mask. The etch target layer is then etched using the etched first polymer layer and the etched second polymer layer as an etch mask.

Abstract: A method of curing a low dielectric constant (low-k) dielectric film on a substrate is described, wherein the dielectric constant of the low-k dielectric film is less than a value of approximately 4. The method comprises exposing the low-k dielectric film to infrared (IR) radiation and ultraviolet (UV) radiation.

Abstract: A method of forming an air gap within a semiconductor structure by the steps of: (a) using a sacrificial polymer to occupy a space in a semiconductor structure; and (b) heating the semiconductor structure to decompose the sacrificial polymer leaving an air gap within the semiconductor structure, wherein the sacrificial polymer of step (a) is a copolymer of bis[3-(4-benzocyclobutenyl)]1,n (n=2-12) alkyldiol diacrylate (such as bis[3-(4-benzocyclobutenyl)]1,6 hexanediol diacrylate) and 1,3 bis 2[4-benzocyclobutenyl(ethenyl)]benzene. In addition, a semiconductor structure, having a sacrificial polymer positioned between conductor lines, wherein the sacrificial polymer is a copolymer of bis[3-(4-benzocyclobutenyl)]1,n (n=2-12)alkyldiol diacrylate and 1,3 bis 2[4-benzocyclobutenyl(ethenyl)]benzene.

Abstract: A method of manufacturing an insulating film includes coating a first liquid material in which polysilazane is dissolved on a substrate; decreasing dangling bonds of silicon (Si) in the first liquid material; after decreasing the dangling bonds, coating a second liquid material which is similar to the first liquid material on the first liquid material; and converting the first liquid material and the second liquid material into a silicon (Si) insulating film.

Abstract: Polymer interlayer dielectric and passivation materials for a microelectronic device are generally described. In one example, an apparatus includes one or more interconnect structures of a microelectronic device and one or more polymeric dielectric layers coupled with the one or more interconnect structures, the polymeric dielectric layers including copolymer backbones having a first monomeric unit and a second monomeric unit wherein the first monomeric unit has a different chemical structure than the second monomeric unit and wherein the copolymer backbones are cross-linked by a first cross-linker or a second cross-linker, or combinations thereof.

Abstract: A method forms a first active electronic layer, prints an array of pillars on the first active electronic layer, dispenses a curable polymer over the array of pillars, molds the curable polymer by contacting the curable polymer with a mold structure to displace the curable polymer from upper surfaces of the pillars, cures the curable polymer to produce a hardened polymer, and removes the array of pillars to leave an array of holes in the hardened polymer. Another method provides a substrate having selected areas, prints an array of pillars on the substrate, dispenses a curable polymer over the array of pillars, molds the curable polymer by contacting the array of pillars with a mold structure to displace the curable polymer from upper surfaces of the pillars, cures the curable polymer to produce a hardened polymer, and removes the array of pillars to leave an array of holes in the hardened polymer corresponding to the selected areas.

Abstract: A method for manufacturing an alignment layer is provided, which includes the following steps. First, a substrate is provided. Next, an auxiliary layer is formed on the substrate. Then, an alignment solution is sprayed on the auxiliary layer through an inkjet printing process. The alignment solution includes an alignment material and a first solvent, and the auxiliary layer has the same polarity as the first solvent. Then, by performing a curing process, the alignment solution is cured to form an alignment layer. As mentioned above, the method for manufacturing an alignment layer may be applied to manufacture an alignment layer with preferred smoothness.

Abstract: Methods for fabricating sublithographic, nanoscale microstructures in one-dimensional arrays utilizing self-assembling block copolymers, and films and devices formed from these methods are provided.

Abstract: The invention provides a method of fabricating a semiconductor device. In one aspect, the method comprises forming a stress inducing layer over a semiconductor substrate, subjecting the stress inducing layer to a first temperature anneal, and subjecting the semiconductor substrate to a second temperature anneal subsequent to the first temperature anneal, wherein the second temperature anneal is higher than the first temperature anneal.

Abstract: In a method for forming an insulating film, a film containing an organic curable material and provided on a substrate for an electronic device is irradiated with an energy plasma produced by a microwave irradiation through a planar antenna member having a plurality of slits to thereby cure the film containing the organic curable material and form the insulating film having a dielectric constant of 3 or less.

Abstract: The present invention relates to dielectric nanostructures useful in semiconductor devices and other electronic devices and methods for manufacturing the dielectric nanostructures. The nanostructures generally comprises an array of isolated pillars positioned on a substrate. The methods of the present invention involve using semiconductor technology to manufacture the nanostructures from a mixture of a crosslinkable dielectric material and an amphiphilic block copolymer.

Abstract: A low-k dielectric material with increased cohesive strength for use in electronic structures including interconnect and sensing structures is provided that includes atoms of Si, C, O, and H in which a fraction of the C atoms are bonded as Si—CH3 functional groups, and another fraction of the C atoms are bonded as Si—R—Si, wherein R is phenyl, —[CH2]n— where n is greater than or equal to 1, HC?CH, C?CH2, C?C or a [S]n linkage, where n is a defined above.

Abstract: A semiconductor fabrication method. The method includes providing a semiconductor structure which includes (i) a semiconductor layer, (ii) a gate dielectric layer on the semiconductor layer, and (iii) a gate electrode region on the gate dielectric layer. The gate dielectric layer is sandwiched between and electrically insulates the semiconductor layer and the gate electrode region. The semiconductor layer and the gate dielectric layer share a common interfacing surface which defines a reference direction perpendicular to the common interfacing surface and pointing from the semiconductor layer to the gate dielectric layer. Next, a resist layer is formed on the gate dielectric layer and the gate electrode region. Next, a cap portion of the resist layer directly above the gate electrode region in the reference direction is removed without removing any portion of the resist layer not directly above the gate electrode region in the reference direction.

Abstract: This invention relates to a method of treating a semiconductor wafer and in particular, but not exclusively, to planarisation. The method consists of depositing a liquid short-chain polymer formed from a silicon containing bas or vapour. Subsequently water and OH are removed and the layer is stabilised.

Abstract: Disclosed is a heat treatment unit 4 serving as a heat treatment apparatus, which includes a chamber 42 for containing a wafer W on which a low dielectric constant interlayer insulating film is formed, a formic acid supply device 44 for supplying gaseous formic acid into the chamber 42, and a heater 43 for heating the wafer W in the chamber 42 which is supplied with formic acid by the formic acid supply device 44.

Abstract: A method for fabricating a semiconductor device utilizing the step of forming a first insulating film of a porous material over a substrate; the step of forming on the first insulating film a second insulating film containing a silicon compound containing Si—CH3 bonds by 30-90%, and the step of irradiating UV radiation with the second insulating film formed on the first insulating film to cure the first insulating film. Thus, UV radiation having the wavelength which eliminates CH3 groups is sufficiently absorbed by the second insulating film, whereby the first insulating film is highly strengthened with priority by the UV cure, and the first insulating film can have the film density increased without having the dielectric constant increased.

Abstract: A method for coating a structure that includes at least one semiconductor chip involves electrostatically depositing coating particles on the areas of the structure to be coated. The coating particles are first applied to a carrier and the latter is electrostatically charged with the coating particles. The structure including at least one semiconductor chip is charged electrostatically to a polarity opposite to the carrier. The carrier and/or the structure are then moved towards one another in the direction of an area of the structure to be coated until the coating particles jump to the areas of the structure to be coated and adhere there. The coating particles are liquefied by heating the area with coating particles to form a coating.

Abstract: A method for fabricating a thin film pattern and a method for fabricating a flat panel display device using the same to form an organic material pattern by not using a photo process are disclosed. The method for fabricating the thin film pattern includes forming a first conductive thin film pattern on a substrate; forming a master mold provided with a second thin film pattern; coating an organic material on the master mold provided with the second thin film pattern; joining the substrate and the master mold to contact the first thin film pattern and a surface of the substrate with the organic material; hardening the organic material; separating the substrate and the master mold from each other to provide an organic thin film pattern having step coverage formed by the second thin film pattern on a substrate provided with the first thin film pattern.

Abstract: A multi-functional cyclic silicate compound, a siloxane-based polymer prepared from the silicate compound and a process of producing an insulating film using the siloxane-based polymer. The silicate compound of the present invention is highly compatible with conventional pore-generating substances and hardly hygroscopic, so it is useful for the preparation of a siloxane-based polymer suitable to a SOG process. Furthermore, a film produced by the use of such siloxane-based polymer is excellent in mechanical properties, thermal stability and crack resistance and enhanced in insulating properties by virtue of its low hygroscopicity. Therefore, in the field of semiconductor production, this film is of great use as an insulating film.

Abstract: The formation of an interlayer insulating film above a substrate, the formation of an insulating film of an organic material on the interlayer insulating film thereafter, and the irradiation of the insulating film of an organic material and the interlayer insulating film with electron beams, thereby curing at least the insulating film of an organic material, are proposed.

Abstract: Provided is a method of manufacturing a nitride-based semiconductor light-emitting device having an improved structure in which optical extraction efficiency is improved. The method of manufacturing a nitride-based semiconductor light-emitting device including an n-doped semiconductor layer, an active layer, a p-doped semiconductor layer, an n-electrode and a p-electrode includes: forming an azobenzene-functionalized polymer film on a base layer by selecting one layer from the group consisting of the n-doped semiconductor layer, the p-doped semiconductor layer, the n-electrode and the p-electrode as the base layer; forming surface relief gratings of a micro-pattern caused by a photophysical mass transport property of azobenzene-functionalized polymer by irradiating interference laser beams onto the azobenzene-functionalized polymer film; forming a photonic crystal layer using a metal oxide on a recessed gap of the azobenzene-functionalized polymer film, and removing the azobenzene-functionalized polymer film.

Abstract: In a light emitting apparatus comprising a light emitting device, a fluorescent substance capable of absorbing at least a portion of light emitted by the light emitting device and emitting light having a different wavelength, and a color converting member which contains the fluorescent substance and directly coat the light emitting device, the color converting member contains at least an epoxy resin derived from triazine and a mixing ratio of the epoxy resin derived from triazine to the acid anhydride curing agent in the color converting member is from 100:80 to 100:240.

Abstract: Semiconductor devices, structures and systems that utilize a polysilazane-based silicon oxide layer or fill, and methods of making the oxide layer are disclosed. In one embodiment, a polysilazane solution is deposited on a substrate and processed with ozone in a wet oxidation at low temperature to chemically modify the polysilazane material to a silicon oxide layer.

Abstract: An object of the present invention is to provide a method for manufacturing an SOI substrate provided with a semiconductor layer which can be used practically even where a substrate having a low upper temperature limit such as a glass substrate is used. The manufacturing method compromises the steps of preparing a semiconductor substrate provided with a bonding layer formed on a surface thereof and a separation layer formed at a predetermined depth from the surface thereof, bonding the bonding layer to the base substrate having a distortion point of 700° C. or lower so that the semiconductor substrate and the base substrate face each other, and separating a part of the semiconductor substrate at the separation layer by heat treatment in order to form a single-crystal semiconductor layer over the base substrate. In the manufacturing method, a substrate which shrinks isotropically at least by the heat treatment is used as the base substrate.

Abstract: A method is provided for forming silicon oxide layers during the processing of semiconductor devices by applying a SOG layer including polysilazane to a substrate and then substantially converting the SOG layer to a silicon oxide layer using an oxidant solution. The oxidant solution may include one or more oxidants including, for example, ozone, peroxides, permanganates, hypochlorites, chlorites, chlorates, perchlorates, hypobromites, bromites, bromates, hypoiodites, iodites, iodates and strong acids.

Abstract: A method for reworking semiconductor materials includes: (i) applying a silicone composition to a surface of a substrate to form a film, (ii) exposing a portion of the film to radiation to produce a partially exposed film having non-exposed regions covering a portion of the surface and exposed regions covering the remainder of the surface; (iii) heating the partially exposed film for an amount of time such that the exposed regions are substantially insoluble in a developing solvent and the non-exposed regions are soluble in the developing solvent; (iv) removing the non-exposed regions of the heated film with the developing solvent to form a patterned film; (v) heating the patterned film for an amount of time sufficient to form a cured silicone layer; and (vi) removing all or a portion of the cured silicone layer by exposure to an anhydrous etching solution including an organic solvent and abase.

Abstract: A semiconductor structure is provided that includes a spacer directly abutting a topographic edge of at least one patterned material layer. The spacer is a non-removable polymeric block component of a self-assembled block copolymer. A method of forming such a semiconductor structure including the inventive spacer is also provided that utilizes self-assembled block copolymer technology.

Abstract: A low dielectric constant polymer, comprising monomeric units derived from a compound having the general formula I (R1—R2)n—Si—(X1)4-n, wherein each X1 is independently selected from hydrogen and inorganic leaving groups, R2 is an optional group and comprises an alkylene having 1 to 6 carbon atoms or an arylene, R1 is a polycycloalkyl group and n is an integer 1 to 3. The polymer has excellent electrical and mechanical properties.

Abstract: A method of manufacturing a semiconductor device, includes preparing a work piece having a trench on its main surface side, forming a polymer film containing a polymer containing silicon, hydrogen and nitrogen on the main surface of the work piece, holding the work piece with the polymer film in a first atmosphere, which contains oxygen, and whose oxygen partial pressure is set in a range of 16 to 48 Torr, oxidizing the polymer film in a second atmosphere containing water vapor to form an oxide film containing a silicon oxide as a main component, after holding the work piece in the first atmosphere, and removing an upper portion of the oxide film to remain a lower portion of the oxide film in the trench.

Abstract: A method of manufacturing a semiconductor device having damascene structures with air gaps is provided. In one embodiment, the method comprises the steps of depositing and patterning a disposable layer, depositing a first barrier layer on top of the patterned disposable layer, depositing a metal layer, planarizing the metal layer, depositing a second barrier layer, planarizing the second barrier layer until substantially no barrier layer material is present on top of the disposable layer, depositing a permeable layer, removing the disposable layer through the permeable layer to form air gaps.

Abstract: Disclosed is a method for the formation of features in a damascene process. According to the method, vias are formed in a dielectric layer and then covered by a layer of high molecular weight polymer. The high molecular weight polymer covers the vias but does not enter the vias. A trench is then etched through the high molecular weight polymer and the dielectric layer. Any remaining high molecular weight polymer is then removed.

Abstract: A porous SiCOH (e.g., p-SiCOH) dielectric film in which the stress change caused by increased tetrahedral strain is minimized by post treatment in unsaturated Hydrocarbon ambient. The inventive p-SiCOH dielectric film has more —(CHx) and less Si—O—H and Si—H bondings as compared to prior art p-SiCOH dielectric films. Moreover, a stable pSiOCH dielectric film is provided in which the amount of Si—OH (silanol) and Si—H groups at least within the pores has been reduced by about 90% or less by the post treatment. Hence, the inventive p-SiCOH dielectric film has hydrophobicity improvement as compared with prior art p-SiCOH dielectric films. In the present invention, a p-SiCOH dielectric film is produced that is flexible since the pores of the inventive film include stabilized crosslinking —(CHx)— chains wherein x is 1, 2 or 3 therein.

Abstract: A method of fabricating a semiconductor device includes providing a semiconductor substrate in which a gate insulating layer and a pad layer are formed in an active region. A first trench is formed in an isolation region of the substrate. A passivation film is formed to cover the pad layer and fill the first trench. A second trench is formed by patterning the pad layer and removing an exposed semiconductor substrate, the second trench being formed within the first trench. An ion implantation process is performed on the semiconductor substrate exposed through the second trench.

Abstract: In the present invention, a coating solution containing polysilazane is applied to a substrate to form a coating film. Thereafter, an ultraviolet ray is applied to the coating film formed on the substrate to cut a molecular bond of polysilazane in the coating film. Then, the coating film in which the molecular bond of polysilazane has been cut is oxidized while the coating film is being heated. Then, the oxidized coating film is baked at a baking temperature equal to or higher than a heating temperature when the coating film is oxidized.

Abstract: A porous low k or ultra low k dielectric film comprising atoms of Si, C, O and H (hereinafter “SiCOH”) in a covalently bonded tri-dimensional network structure having a dielectric constant of less than about 3.0, a higher degree of crystalline bonding interactions, more carbon as methyl termination groups and fewer methylene, —CH2— crosslinking groups than prior art SiCOH dielectrics is provided. The SiCOH dielectric is characterized as having a FTIR spectrum comprising a peak area for CH3+CH2 stretching of less than about 1.40, a peak area for SiH stretching of less than about 0.20, a peak area for SiCH3 bonding of greater than about 2.0, and a peak area for Si—O—Si bonding of greater than about 60%, and a porosity of greater than about 20%.

Abstract: A method for fabricating a SiCOH dielectric material comprising Si, C, O and H atoms from a single organosilicon precursor with a built-in organic porogen is provided. The single organosilicon precursor with a built-in organic porogen is selected from silane (SiH4) derivatives having the molecular formula SiRR1R2R3, disiloxane derivatives having the molecular formula R4R5R6—Si—O—Si—R7R8R9, and trisiloxane derivatives having the molecular formula R10R11R12—Si—O—Si—R13R14—O—Si—R15R16R17 where R and R1-17 may or may not be identical and are selected from H, alkyl, alkoxy, epoxy, phenyl, vinyl, allyl, alkenyl or alkynyl groups that may be linear, branched, cyclic, polycyclic and may be functionalized with oxygen, nitrogen or fluorine containing substituents. In addition to the method, the present application also provides SiCOH dielectrics made from the inventive method as well as electronic structures that contain the same.

Abstract: In a method of forming a thin film and methods of manufacturing a gate structure and a capacitor, a hafnium precursor including one alkoxy group and three amino groups, and an oxidizing agent are provided on a substrate. The hafnium precursor is reacted with the oxidizing agent to form the thin film including hafnium oxide on the substrate. The hafnium precursor may be employed for forming a gate insulation layer of a transistor or a dielectric layer of a capacitor.

Abstract: Low dielectric materials and films comprising same have been identified for improved performance when used as performance materials, for example, in interlevel dielectrics integrated circuits as well as methods for making same. In one aspect of the present invention, the performance of the dielectric material may be improved by controlling the weight percentage of ethylene oxide groups in the at least one porogen.

Abstract: A wafer including a high stressed thin film thereon is lifted, and a pre-heating process is performed while the wafer is lifted. Subsequently, a dielectric layer is deposited on the high stressed thin film.

Abstract: A method of manufacturing a semiconductor device having a low-k dielectric layer is provided. An embodiment comprises forming a dielectric layer on a substrate, wherein the layer comprises a pore generating material dispersed in an uncured matrix. A second step comprises forming pores in the uncured matrix by irradiating the layer with radiation having a first wavelength. After pore forming, a third step comprises cross-linking the dielectric by irradiating it at a second wavelength, the second being less than the first. In an embodiment, the irradiating wavelengths comprise ultra-violet radiation. Embodiments may further include repairing processing damage wherein the damage includes dangling bonds or silanol formation. The repairing includes annealing in a carbon-containing ambient such as C2H4, C3H6, or hexamethyldisilazane (HMDS).

Abstract: Embodiments of an apparatus and methods for heating a substrate and a sacrificial layer are generally described herein. Other embodiments may be described and claimed.

Abstract: A low-k dielectric material with increased cohesive strength for use in electronic structures including interconnect and sensing structures is provided that includes atoms of Si, C, O, and H in which a fraction of the C atoms are bonded as Si—CH3 functional groups, and another fraction of the C atoms are bonded as Si—R—Si, wherein R is phenyl, —[CH2]n— where n is greater than or equal to 1, HC?CH, C?CH2, C?C or a [S]n linkage, where n is a defined above.

Abstract: Methods of preparing a low stress porous low-k dielectric material on a substrate are provided. The methods involve the use of a structure former precursor and/or porogen precursor with one or more organic functional groups. In some cases, the structure former precursor has carbon-carbon double or triple bonds. In other cases, one or both of the structure former precursor and porogen precursor has one or more bulky organic groups. In other cases, the structure former precursor has carbon-carbon double or triple bonds and one or both of the structure former precursor and porogen precursor has one or more bulky organic groups. Once the precursor film is formed, the porogen is removed, leaving a porous low-k dielectric matrix with high mechanical strength. Different types of structure former precursors and porogen precursors are described. The resulting low stress low-k porous film may be used as a low-k dielectric film in integrated circuit manufacturing applications.

Abstract: A polymer-based, self-aligned wafer-level heterogeneous integration system, SA WLIT, for integrating semiconductor integrated circuit (IC) chips to a substrate is presented. The system includes a method including preparing a substrate, flipping the substrate onto a polymer-based flat surface and securing the substrate to the flat surface, mounting semiconductor chips into the prepared substrate, integrating the chips to the substrate with another polymer-based material, and removing the resulting multi-chip module from the flat surface. The chips may then be connected with each other and regions off the multi-chip module with metal interconnect processing technology. A multi-chip module prepared by the polymer-based, self-aligned heterogeneous integration system including semiconductor chips mounted in a prepared substrate. The chips may be connected to the substrate by a polymer-based integrating material.

Abstract: A method of forming a stacking structure by forming an electroconductive layer precursor pattern by an electroconductive paste made of a resin component, electroconductive fine particles, and glass fine particles, forming a dielectric layer precursor pattern by a dielectric paste made of a resin component and glass fine particles, and simultaneously baking both of those patterns, wherein they are held for a predetermined time while keeping a baking temperature which is equal to or higher than a decomposing temperature of the resin component and is equal to or lower than a baking start temperature of the glass fine particles and, thereafter, their baking is completed at the baking temperature which is equal to or higher than the baking start temperature of the glass fine particles and is lower than its softening point. Thus, the occurrence of a void and a pin hole in an insulative layer can be prevented in the stacking structure after the baking.

Abstract: Disclosed herein is a method for forming an interlayer dielectric film for a semiconductor device by using a polyhedral molecular silsesquioxane. According to the method, the polyhedral molecular silsesquioxane is used as a monomer for a siloxane-based resin or as a pore-forming agent (porogen) to prepare a composition for forming a dielectric film, and the composition is coated on a substrate to form an interlayer dielectric film for a semiconductor device. The interlayer dielectric film formed by the method has a low dielectric constant and shows superior mechanical properties.

Abstract: Provided is a method of forming a heterojunction of contiguous layers of organic semiconducting polymers. The method comprises firstly forming a layer of a first organic semiconducting polymer on a substrate. A solution of a film-forming material is then deposited on the layer of the first organic semiconducting polymer. The first organic semiconducting polymer is insoluble in this solution and so is not disturbed by its deposition. The deposited solution is then dried to form a temporary film having a thickness of less then 20 nm formed from the film-forming material. Next a solution of a second organic semiconducting polymer dissolved in an organic solvent is deposited on the temporary film and this solution dried. The solubility of the material forming the temporary film in the organic solvent and the thickness of the temporary film are such that the organic solvent permeates through the thickness of the temporary film during drying of the solution of the second organic semiconducting polymer.