Abstract: A method of forming a semiconductor device that includes forming a high-k gate dielectric layer on a semiconductor substrate, wherein an oxide containing interfacial layer can be present between the high-k gate dielectric layer and the semiconductor substrate. A scavenging metal stack may be formed on the high-k gate dielectric layer. An annealing process may be applied to the scavenging metal stack during which the scavenging metal stack removes oxide material from the oxide containing interfacial layer, wherein the oxide containing interfacial layer is thinned by removing of the oxide material. A gate conductor layer is formed on the high-k gate dielectric layer. The gate conductor layer and the high-k gate dielectric layer are then patterned to provide a gate structure. A source region and a drain region are then formed on opposing sides of the gate structure.

Abstract: A germanium-containing semiconductor surface is prepared for formation of a dielectric overlayer (e.g., a thin layer of high-k gate dielectric) by (1) removal of native oxide, for example by wet cleaning, (2) additional cleaning with hydrogen species, (3) in-situ formation of a controlled monolayer of GeO2, and (4) in-situ deposition of the dielectric overlayer to prevent uncontrolled regrowth of native oxide. The monolayer of GeO2 promotes uniform nucleation of the dielectric overlayer, but it too thin to appreciably impact the effective oxide thickness of the dielectric overlayer.

Abstract: Novel processing methods for production of high-refractive index contrast and low loss optical waveguides are disclosed. In one embodiment, a “channel” waveguide is produced by first depositing a lower cladding material layer with a low refractive index on a base substrate, a refractory metal layer, and a top diffusion barrier layer. Then, a trench is formed with an open surface to the refractory metal layer. The open surface is subsequently oxidized to form an oxidized refractory metal region, and the top diffusion barrier layer and the non-oxidized refractory metal region are removed. Then, a low-refractive-index top cladding layer is deposited on this waveguide structure to encapsulate the oxidized refractory metal region. In another embodiment, a “ridge” waveguide is produced by using similar process steps with an added step of depositing a high-refractive-index material layer and an optional optically-transparent layer.

Abstract: A method is disclosed for fabricating a semiconductor structure. The method includes providing a semiconductor substrate having an oxide layer on a surface of the semiconductor substrate, and removing the oxide layer to expose the surface of the semiconductor substrate. The method also includes performing a thermal annealing process on the semiconductor substrate using an inert gas as a thermal annealing protective gas after removing the oxide layer, and forming an insulating layer on the semiconductor substrate after performing the thermal annealing process. Further, the method includes forming a high-K gate dielectric layer on a surface of the insulating layer, and forming a protective layer on a surface of the high-K gate dielectric layer.

Abstract: Techniques related to nanocomposite dielectric materials are generally described herein. These techniques may be embodied in apparatuses, systems, methods and/or processes for making and using such material. An example process may include: providing a film having a plurality of nanoparticles and an organic medium; comminuting the film to form a particulate; and applying the particulate to a substrate. The example process may also include providing a nanoparticle film having nanoparticles and voids located between the nanoparticles; contacting the film with a vapor containing an organic material; and curing the organic material to form the nanocomposite dielectric film. Various described techniques may provide nanocomposite dielectric materials with superior nanoparticle dispersion which may result in improved dielectric properties.

Abstract: Embodiments of the invention generally relate to nonvolatile memory devices, such as a ReRAM cells, and methods for manufacturing such memory devices, which includes optimized, atomic layer deposition (ALD) processes for forming metal oxide film stacks. The metal oxide film stacks contain a metal oxide coupling layer disposed on a metal oxide host layer, each layer having different grain structures/sizes. The interface disposed between the metal oxide layers facilitates oxygen vacancy movement. In many examples, the interface is a misaligned grain interface containing numerous grain boundaries extending parallel to the electrode interfaces, in contrast to the grains in the bulk film extending perpendicular to the electrode interfaces. As a result, oxygen vacancies are trapped and released during switching without significant loss of vacancies.

Abstract: The present arrangement provides a method of treating an oxidized layer of metal nitride, including oxidizing a layer (2) of metal oxide at the surface of a first layer (1) of nitride of said metal using a plasma of an oxidizing species with an oxidation number that is greater than that of oxygen in order to form a metallic layer (3) of a compound based on said metal; and reducing the metallic layer (3) formed in step i) using a plasma of hydrogen and nitrogen to form a second layer (4) of nitride of said metal.

Abstract: Electronic apparatus and methods of forming the electronic apparatus may include one or more insulator layers having a refractory metal and a non-refractory metal for use in a variety of electronic systems and devices. Embodiments can include electronic apparatus and methods of forming the electronic apparatus having a tantalum aluminum oxynitride film. The tantalum aluminum oxynitride film may be structured as one or more monolayers. The tantalum aluminum oxynitride film may be formed using atomic layer deposition. Metal electrodes may be disposed on a dielectric containing a tantalum aluminum oxynitride film.

Abstract: Disclosed are silicon containing compounds and their use in vapor deposition methods of hafnium silicate films having a desired silicon concentration. More particularly, deposition of hafnium silicate films by atomic layer deposition using moisture and the disclosed silicon containing compounds produce films having a desired silicon concentration.

Abstract: A method of forming a phase change material layer pattern includes forming a phase change material layer partially filling an opening through an insulating interlayer. A plasma treatment process is performed on the phase change material layer to remove an oxide layer on a surface of the phase change material layer. A heat treatment process is performed on the phase change material layer to remove a void or a seam in the phase change material layer, sufficiently filling the opening.

Abstract: The present invention provides a system and method for manufacturing a semiconductor device including a substrate and a high-? dielectric layer on the substrate. The system comprises a modular track; a substrate-forming chamber connected with the modular track for forming the substrate; and an atomic layer deposition (ALD) chamber connected with the modular track for providing the high-? dielectric layer.

Abstract: A spintronic electronic apparatus having a multilayer structure. The apparatus includes a substrate, having disposed in succession upon the substrate; a bottom interface layer; a pinned layer; a tunneling barrier; a free layer; and a top interface layer, wherein the apparatus operates as a non-resonant magnetic tunnel junction in a large amplitude, out-of-plane magnetization precession regime having weakly current dependent, large diode volt-watt sensitivity when external microwave signals that exceed a predetermined threshold current and have a frequency that is lower than a predetermined level excite the magnetization precession.

Abstract: A semiconductor device and a method for manufacturing the same are disclosed, which include a gate electrode material in a recess or a buried gate cell structure, a polysilicon material doped with impurities over a sidewall of a recess located over the gate electrode material, and a junction formed by an annealing or a rapid thermal annealing (RTA) process, thereby establishing a degree overlap between a gate electrode material of a buried gate and a junction.

Abstract: A system and a method for transistor level routing are disclosed. The method comprises forming a high-k dielectric layer over a substrate, forming a metal layer directly over the high-k dielectric layer, and selectively disposing a semiconductive layer over the metal layer. The method further comprises forming a first transistor in a first region and a second transistor in a second region spaced from the first region, the first and second transistor having gate stacks comprising a high-k dielectric layer, a metal layer and a semiconductive layer, and forming an electrical connection between the first transistor and the second transistor comprising the high-k dielectric layer and the metal layer but not the semiconductive layer.

Abstract: Methods of treating metal-containing thin films, such as films comprising titanium carbide, with a silane/borane agent are provided. In some embodiments a film comprising titanium carbide is deposited on a substrate by an atomic layer deposition (ALD) process. The process may include a plurality of deposition cycles involving alternating and sequential pulses of a first source chemical that comprises titanium and at least one halide ligand, a second source chemical comprising metal and carbon, wherein the metal and the carbon from the second source chemical are incorporated into the thin film, and a third source chemical, wherein the third source chemical is a silane or borane that at least partially reduces oxidized portions of the titanium carbide layer formed by the first and second source chemicals. In some embodiments treatment forms a capping layer on the metal carbide film.

Abstract: Metal-oxide films (e.g., aluminum oxide) with low leakage current suitable for high-k gate dielectrics are deposited by atomic layer deposition (ALD). The purge time after the metal-deposition phase is 5-15 seconds, and the purge time after the oxidation phase is prolonged beyond 60 seconds. Prolonging the post-oxidation purge produced an order-of-magnitude reduction of leakage current in 30 ?-thick Al2O3 films.

Abstract: Methods for fabricating conductive metal lines of a semiconductor device are described herein. In one embodiment, such a method may comprise depositing a conductive material over a substrate, and depositing a first barrier layer on the conductive layer. Such a method may also comprise patterning a mask on the first barrier layer, the pattern comprising a layout of the conductive lines. Such an exemplary method may also comprise etching the conductive material and the first barrier layer using the patterned mask to form the conductive lines. In addition, a low temperature post-flow may be performed on the structure. The method may also include depositing a dielectric material over and between the patterned conductive lines.

Abstract: An oxide film is formed, having a specific film thickness on a substrate by alternately repeating: forming a specific element-containing layer on the substrate by supplying a source gas containing a specific element, to the substrate housed in a processing chamber and heated to a first temperature; and changing the specific element-containing layer formed on the substrate, to an oxide layer by supplying a reactive species containing oxygen to the substrate heated to the first temperature in the processing chamber under a pressure of less than atmospheric pressure, the reactive species being generated by causing a reaction between an oxygen-containing gas and a hydrogen-containing gas in a pre-reaction chamber under a pressure of less than atmospheric pressure and heated to a second temperature higher than the first temperature.

Abstract: Metal nitride coatings containing carbon can be either electrically conductive or substantially non-conductive depending on the degree to which they have been exposed to an oxidative environment. Substantially non-conductive metal nitride coatings can be used as protective layers in electrical devices. Particularly in an electrical device containing carbon nanomaterials, the metal nitride coatings can be used to mask the device's operational characteristics. Such devices can contain an electrical interconnect containing a carbon nanomaterial and a substantially non-conductive coating on the carbon nanomaterial. The substantially non-conductive coating can contain at least one substantially non-conductive metal nitride layer and at least some carbon. Methods for making such devices and metal nitride coatings are also described herein.

Abstract: An ALD method includes providing a substrate in an ALD reactor, performing a pre-ALD treatment to the substrate in the ALD reactor, and performing one or more ALD cycles to form a dielectric layer on the substrate in the ALD reactor. The pre-ALD treatment includes providing a hydroxylating agent to the substrate in a first duration, and providing a precursor to the substrate in a second duration. Each of the ALD cycles includes providing the hydroxylating agent to the substrate in a third duration, and providing the precursor to the substrate in a fourth duration. The first duration is longer than the third duration.

Abstract: Method of deposition on a substrate of a dielectric film by introducing into a reaction chamber a vapor of a precursor selected from the group consisting of Zr(MeCp)(NMe2)3, Zr(EtCp)(NMe2)3, ZrCp(NMe2)3, Zr(MeCp)(NEtMe)3, Zr(EtCp)(NEtMe)3, ZrCp(NEtMe)3, Zr(MeCp)(NEt2)3, Zr(EtCp)(NEt2)3, ZrCp(NEt2)3, Zr(iPr2Cp)(NMe2)3, Zr(tBu2Cp)(NMe2)3, Hf(MeCp)(NMe2)3, Hf(EtCp)(NMe2)3, HfCp(NMe2)3, Hf(MeCp)(NEtMe)3, Hf(EtCp)(NEtMe)3, HfCp(NEtMe)3, Hf(MeCp)(NEt2)3, Hf(EtCp)(NEt2)3, HfCp(NEt2)3, Hf(iPr2Cp)(NMe2)3, Hf(tBu2Cp)(NMe2)3, and mixtures thereof; and depositing the dielectric film on the substrate.

Abstract: A semiconductor device includes a dielectric layer in which zirconium, hafnium, and a IV group element are mixed. A method for fabricating a capacitor includes forming a bottom electrode, forming the dielectric layer and forming a top electrode over the dielectric layer.

Abstract: Provided are methods of depositing hafnium or zirconium containing metal alloy films. Certain methods comprise sequentially exposing a substrate surface to alternating flows of an organometallic precursor and a reductant comprising M(BH4)4 to produce a metal alloy film on the substrate surface, wherein M is selected from hafnium and zirconium, and the organometallic precursor contains a metal N. Gate stacks are described comprising a copper barrier layer comprising boron, a first metal M selected from Hf and Zr, and a second metal N selected from tantalum, tungsten, copper, ruthenium, rhodium, cobalt and nickel; and a copper layer overlying the copper barrier seed layer.

Abstract: Provided are methods of forming nonvolatile memory elements using atomic layer deposition techniques, in which at least two different layers of a memory element are deposited sequentially and without breaking vacuum in a deposition chamber. This approach may be used to prevent oxidation of various materials used for electrodes without a need for separate oxygen barrier layers. A combination of signal lines and resistive switching layers may be used to cap the electrodes and to minimize their oxidation. As such, fewer layers are needed in a memory element. Furthermore, atomic layer deposition allows more precise control of electrode thicknesses. In some embodiments, a thickness of an electrode may be less than 50 Angstroms. Overall, atomic layer deposition of electrodes and resistive switching layers lead to smaller thicknesses of entire memory elements making them more suitable for low aspect ratio features of advanced nodes.

Abstract: This disclosure provides a method of fabricating a semiconductor stack and associated device, such as a capacitor or DRAM cell. In such a device, a high-K zirconia-based layer may be used as the primary dielectric together with a relatively inexpensive metal electrode based on titanium nitride. To prevent corruption of the electrode during device formation, a thin barrier layer can be used seal the electrode prior to the use of a high temperature process and a (high-concentration or dosage) ozone reagent (i.e., to create a high-K zirconia-based layer). In some embodiments, the barrier layer can also be zirconia-based, for example, a thin layer of doped or un-doped amorphous zirconia. Fabrication of a device in this manner facilitates formation of a device with dielectric constant of greater than 40 based on zirconia and titanium nitride, and generally helps produce less costly, increasingly dense DRAM cells and other semiconductor structures.

Abstract: Methods for producing RRAM resistive switching elements having reduced forming voltage include doping to create oxygen deficiencies in the dielectric film. Oxygen deficiencies in a dielectric film promote formation of conductive pathways.

Abstract: A semiconductor process includes the following steps. A substrate is provided. A dielectric layer having a high dielectric constant is formed on the substrate, wherein the steps of forming the dielectric layer include: (a) a metallic oxide layer is formed; (b) an annealing process is performed to the metallic oxide layer; and the steps (a) and (b) are performed repeatedly. Otherwise, the present invention further provides a semiconductor structure formed by said semiconductor process.

Abstract: Techniques related to nanocomposite dielectric materials are generally described herein. These techniques may be embodied in apparatuses, systems, methods and/or processes for making and using such material. An example process may include: providing a film having a plurality of nanoparticles and an organic medium; comminuting the film to form a particulate; and applying the particulate to a substrate. The example process may also include providing a nanoparticle film having nanoparticles and voids located between the nanoparticles; contacting the film with a vapor containing an organic material; and curing the organic material to form the nanocomposite dielectric film. Various described techniques may provide nanocomposite dielectric materials with superior nanoparticle dispersion which may result in improved dielectric properties.

Abstract: Methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes providing a semiconductor substrate and forming a gate structure on the semiconductor substrate. The gate includes a high-k dielectric material. In the method, a fluorine-containing liquid is contacted with the high-k dielectric material and fluorine is incorporated into the high-k dielectric material.

Abstract: Electronic apparatus and methods of forming the electronic apparatus include HfSiON for use in a variety of electronic systems. In various embodiments, conductive material is coupled to a dielectric containing HfSiON, where such conductive material may include one or more monolayers of titanium nitride, tantalum, or combinations of titanium nitride and tantalum.

Abstract: Methods for preparing a substrate for a subsequent film formation process are described. Methods for preparing a substrate for a subsequent film formation process, without immersion in an aqueous solution, are also described. A process is described that includes disposing a substrate into a process chamber, the substrate having a thermal oxide surface with substantially no reactive surface terminations. The thermal oxide surface is exposed to a partial pressure of water below the saturated vapor pressure at a temperature of the substrate to convert the dense thermal oxide with substantially no reactive surface terminations to a surface with hydroxyl surface terminations. This can occur in the presence of a Lewis base such as ammonia.

Abstract: Dielectric layers containing a zirconium-doped tantalum oxide layer, where the zirconium-doped tantalum oxide layer can be formed of one or more monolayers of tantalum oxide doped with zirconium, provide an insulating layer in a variety of structures for use in a wide range of electronic devices.

Abstract: A semiconductor processing apparatus includes a reaction chamber, a loading chamber, a movable support, a drive mechanism, and a control system. The reaction chamber includes a baseplate. The baseplate includes an opening. The movable support is configured to hold a workpiece. The drive mechanism is configured to move a workpiece held on the support towards the opening of the baseplate into a processing position. The control system is configured to create a positive pressure gradient between the reaction chamber and the loading chamber while the workpiece support is in motion. Purge gases flow from the reaction chamber into the loading chamber while the workpiece support is in motion. The control system is configured to create a negative pressure gradient between the reaction chamber and the loading chamber while the workpiece is being processed.

Abstract: A system and method for manufacturing a semiconductor device is provided. An embodiment comprises forming a deposited layer using an atomic layer deposition (ALD) process. The ALD process may utilize a first precursor for a first time period, a first purge for a second time period longer than the first time period, a second precursor for a third time period longer than the first time period, and a second purge for a fourth time period longer than the third time period.

Abstract: Disclosed are hafnium-containing and zirconium-containing precursors and methods of synthesizing the same. The compounds may be used to deposit hafnium, zirconium, hafnium oxide, and zirconium oxide containing layers using vapor deposition methods such as chemical vapor deposition or atomic layer deposition.

Abstract: Provided is a method of manufacturing a metal oxide film to be formed through the following processes: a coating process of forming a coating film on a substrate by using a coating liquid for forming metal oxide film containing any of various organometallic compounds; a drying process of making the coating film into a dried coating film; and a heating process of forming an inorganic film from the dried coating film under an oxygen-containing atmosphere having a dew-point temperature equal to or lower than ?10° C.

Abstract: A method for fabricating a semiconductor device includes: forming a GaN-based semiconductor layer on a substrate; forming a gate insulating film of aluminum oxide on the GaN-based semiconductor layer at a temperature equal to or lower than 450° C.; forming a protection film on an upper surface of the gate insulating film; performing a process with an alkaline solution in a state in which the upper surface of the gate insulating film is covered with the protection film; and forming a gate electrode on the gate insulating film.

Abstract: A monolayer or partial monolayer sequencing processing, such as atomic layer deposition (ALD), can be used to form a semiconductor structure of a silicon film on a germanium substrate. Such structures may be useful in high performance electronic devices. A structure may be formed by deposition of a thin silicon layer on a germanium substrate surface, forming a hafnium oxide dielectric layer, and forming a tantalum nitride electrode. The properties of the dielectric may be varied by replacing the hafnium oxide with another dielectric such as zirconium oxide or titanium oxide.

Abstract: A disclosed fabrication method of a semiconductor device includes steps of depositing a dielectric film on a semiconductor substrate; thermally treating the dielectric film; and irradiating an ionized gas cluster onto the thermally treated dielectric film.

Abstract: A method for forming a DRAM MIM capacitor stack having low leakage current involves the use of a first electrode that serves as a template for promoting the high-k phase of a subsequently deposited dielectric layer. The high-k dielectric layer includes a doped material that can be crystallized after a subsequent annealing treatment. An amorphous blocking is formed on the dielectric layer. The thickness of the blocking layer is chosen such that the blocking layer remains amorphous after a subsequent annealing treatment. A second electrode layer compatible with the blocking layer is formed on the blocking layer.

Abstract: In some embodiments, the present invention discloses a gate dielectric deposition process, including depositing a fluorinated hafnium oxide by an ALD process utilizing a fluorinated hafnium precursor and an oxidant. A two-step ALD deposition process can be used, including a fluorinated hafnium oxide layer deposition followed by a hafnium oxide layer deposition. Hafnium oxide can provide high dielectric constant, high density, large bandgap and good thermal stability. Fluorinated hafnium oxide can passivate interface states and bulk traps in the hafnium oxide, for example, by forming Si—F or Hf—F bonds, which can improve the reliability of the hafnium oxide gate dielectrics.

Abstract: A method of forming a dielectric film including a zirconium oxide film includes: forming a zirconium oxide film on a substrate to be processed by supplying a zirconium material and an oxidant, the zirconium material including a Zr compound which includes a cyclopentadienyl ring in a structure, and forming a titanium oxide film on the zirconium oxide film by supplying a titanium material and an oxidant, the titanium material including a Ti compound which includes a cyclopentadienyl ring in a structure.

Abstract: High-k materials and devices, e.g., DRAM capacitors, and methods of making and using the same. Various methods of forming perovskite films are described, including methods in which perovskite material is deposited on the substrate by a pulsed vapor deposition process involving contacting of the substrate with perovskite material-forming metal precursors. In one such method, the process is carried out with doping or alloying of the perovskite material with a higher mobility and/or higher volatility metal species than the metal species in the perovskite material-forming metal precursors. In another method, the perovskite material is exposed to elevated temperature for sufficient time to crystallize or to enhance crystallization of the perovskite material, followed by growth of the perovskite material under pulsed vapor deposition conditions. Various perovskite compositions are described, including: (Sr, Pb)TiO3; SrRuO3 or SrTiO3, doped with Zn, Cd or Hg; Sr(Sn,Ru)O3; and Sr(Sn,Ti)O3.

Abstract: Wafers having a high K dielectric layer and an oxide or nitride containing layer are etched in an inductively coupled plasma processing chamber by applying a source power to generate an inductively coupled plasma, introducing into the chamber a gas including BCl3, setting the temperature of the wafer to be between 100° C. and 350° C., and etching the wafer with a selectivity of high K dielectric to oxide or nitride greater than 10:1. Wafers having an oxide layer and a nitride layer are etched in a reactive ion etch processing chamber by applying a bias power to the wafer, introducing into the chamber a gas including BCl3, setting the temperature of the wafer to be between 20° C. and 200° C., and etching the wafer with an oxide to nitride selectivity greater than 10:1.

Abstract: In one exemplary embodiment, a method includes: forming at least one first monolayer of first material on a surface of a substrate by performing a first plurality of cycles of atomic layer deposition; thereafter, annealing the formed at least one first monolayer of first material under a first inert atmosphere at a first temperature between about 650° C. and about 900° C.; thereafter, forming at least one second monolayer of second material by performing a second plurality of cycles of atomic layer deposition, where the formed at least one second monolayer of second material at least partially overlies the annealed at least one first monolayer of first material; and thereafter, annealing the formed at least one second monolayer of second material under a second inert atmosphere at a second temperature between about 650° C. and about 900° C.

Abstract: Disclosed are titanium-containing precursors and methods of synthesizing the same. The compounds may be used to deposit titanium, titanium oxide, strontium-titanium oxide, and barium strontium titanate containing layers using vapor deposition methods such as chemical vapor deposition or atomic layer deposition.

Abstract: Provided are a nonvolatile memory cell and a method of manufacturing the same. The nonvolatile memory cell includes a memory transistor and a driver transistor. The memory transistor includes a semiconductor layer, a buffer layer, an organic ferroelectric layer, and a gate electrode, which are disposed on a substrate. The driver transistor includes the semiconductor layer, the buffer layer, a gate insulating layer, and the gate electrode, which are disposed on the substrate. The memory transistor and the driver transistor are disposed on the same substrate. The nonvolatile memory cell is transparent in a visible light region.

Abstract: Provided according to embodiments of the present invention are an oxidation-promoting compositions, methods of forming oxide layers, and methods of fabricating semiconductor devices. In some embodiments of the invention, the oxidation-promoting composition includes an oxidation-promoting agent having a structure of A-M-L, wherein L is a functional group that is chemisorbed to a surface of silicon, silicon oxide, silicon nitride, or metal, A is a thermally decomposable oxidizing functional group, and M is a moiety that allows A and L to be covalently bonded to each other.

Abstract: A method of manufacturing a semiconductor device and a substrate processing apparatus capable of providing a TiN film at a higher film-forming rate. The method includes loading a substrate into a processing chamber; simultaneously starting a supply of a first processing gas and a second processing gas to form a film on the substrate, simultaneously stopping the supply of the first and second processing gas; removing the remaining first and second processing gas from the processing chamber; supplying the second processing gas into the processing chamber without supplying the first processing gas; removing the second processing gas starting and then stopping a supply of the first processing gas into the processing chamber without supplying the second processing gas; removing the first processing gas; and unloading the substrate from the processing chamber.

Abstract: Gas sensor materials and methods are disclosed for preparing and using the same to produce gas sensor structures. Also disclosed are gas sensor structures and systems that employ these disclosed materials. A gas sense-enhancing metal such as platinum may be added to a gas sensitive metal oxide material in a manner that more highly disperses the added platinum than conventional methods so as to more effectively utilize the platinum at a lower concentration, thus achieving a more cost effective solution. An ink vehicle may also be used for deposition of a gas sensitive material (e.g. on the surface of integrated circuit) that is formulated to allow “burn-out” of ink vehicle components at relatively low temperatures as compared to conventional ink vehicles.