Organic Reactant Patents (Class 438/790)
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Patent number: 7781351Abstract: Methods of preparing a carbon doped oxide (CDO) layer of low dielectric constant and low residual stress involving, for instance, providing a substrate to a deposition chamber and exposing it to an organosilicon precursor containing unsaturated C—C bonds or to multiple organic precursors including at least one organosilicon and at least one unsaturated C—C bond are provided. The methods may also involve igniting and maintaining a plasma in a deposition chamber using radio frequency power having high and low frequency components with a high percentage of the low frequency component, and depositing the carbon doped dielectric layer under conditions in which the resulting dielectric layer has a residual stress of not greater than, e.g., about 50 MPa, and a dielectric constant not greater than about 3.Type: GrantFiled: April 7, 2004Date of Patent: August 24, 2010Assignee: Novellus Systems, Inc.Inventors: Qingguo Wu, Haiying Fu, Dong Niu, Ananda K. Bandyopadhyay, David Mordo
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Patent number: 7776396Abstract: An improved vapor-phase deposition method and apparatus for the application of multilayered films/coatings on substrates is described. The method is used to deposit multilayered coatings where the thickness of an oxide-based layer in direct contact with a substrate is controlled as a function of the chemical composition of the substrate, whereby a subsequently deposited layer bonds better to the oxide-based layer. The improved method is used to deposit multilayered coatings where an oxide-based layer is deposited directly over a substrate and an organic-based layer is directly deposited over the oxide-based layer. Typically, a series of alternating layers of oxide-based layer and organic-based layer are applied.Type: GrantFiled: April 21, 2005Date of Patent: August 17, 2010Assignee: Applied Microstructures, Inc.Inventors: Boris Kobrin, Jeffrey D. Chinn, Romuald Nowak, Richard C. Yi
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Patent number: 7772133Abstract: An oxide film forming equipment is provided with a reactor 10 in which a heater unit 14 holding a substrate 100 is stored, a piping 11 provided with a material gas introducing valve V1 for introducing a material gas containing organic silicon or organic metal into the reactor, a piping 12 provided with an ozone containing gas introducing valve V2 for introducing an ozone containing gas into the reactor 10, and a piping 13 provided with an exhaustion valve 13 for exhausting a gas in the reactor 10. When the material gas introducing valve V1, the ozone containing gas introducing valve V2, and the exhaustion valve V3 perform open-and-closure operations to alternately supply the material gas and the ozone containing gas into the reactor 10, the ozone containing gas introducing valve V2 operates to fall an ozone concentration of the ozone containing gas in a range from 0.1 vol % to 100 vol % and the heater unit adjusts a temperature of the substrate from a room temperature to 400° C.Type: GrantFiled: August 1, 2005Date of Patent: August 10, 2010Assignee: Meidensha CorporationInventors: Tetsuya Nishiguchi, Shingo Ichimura, Hidehiko Nonaka, Yoshiki Morikawa, Takeshi Noyori, Mitsuru Kekura
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Patent number: 7767579Abstract: A method of making a semiconductor device includes forming a transistor structure having one of an embedded epitaxial stressed material in a source and drain region and a stressed channel and well, subjecting the transistor structure to plasma oxidation, and removing spacer material from the transistor structure.Type: GrantFiled: December 12, 2007Date of Patent: August 3, 2010Assignee: International Business Machines CorporationInventors: Ashima B Chakravarti, Zhijiong Luo, Renee Tong Mo, Shreesh Narasimha, Katsunori Onishi
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Patent number: 7763501Abstract: A method for forming an electronic device, comprising: forming a first conductive or semiconductive layer; forming a sequence of at least on insulating layer and at least one semiconducting layer over the first conductive or semiconductive layer; locally depositing solvents at a localized region of the insulating layer so as to dissolve the sequence of insulating and semiconducting layers in the region to leave a void extending through the sequence of layer; and depositing conductive or semiconductive material in the void.Type: GrantFiled: August 28, 2006Date of Patent: July 27, 2010Assignee: Plastic Logic LimitedInventors: Henning Sirringhaus, Richard Henry Friend, Takeo Kawase
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Patent number: 7745352Abstract: Methods of curing a silicon oxide layer on a substrate are provided. The methods may include the processes of providing a semiconductor processing chamber and a substrate and forming an silicon oxide layer overlying at least a portion of the substrate, the silicon oxide layer including carbon species as a byproduct of formation. The methods may also include introducing an acidic vapor into the semiconductor processing chamber, the acidic vapor reacting with the silicon oxide layer to remove the carbon species from the silicon oxide layer. The methods may also include removing the acidic vapor from the semiconductor processing chamber. Systems to deposit a silicon oxide layer on a substrate are also described.Type: GrantFiled: August 27, 2007Date of Patent: June 29, 2010Assignee: Applied Materials, Inc.Inventors: Abhijit Basu Mallick, Srinivas D. Nemani, Timothy W. Weidman
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Patent number: 7732345Abstract: The present invention provides a method for manufacturing an integrated circuit. In one embodiment, the method includes etching one or more openings within a substrate using an etch tool, and subjecting the one or more openings to a post-etch clean, wherein a delay time exists between removing the substrate from the etch tool and the subjecting the one or more opening to the post-etch clean. This method may further include exposing the substrate having been subjected to the post-etch clean to a rinsing agent, wherein a resistivity of the rinsing agent is selected based upon the delay time.Type: GrantFiled: August 31, 2006Date of Patent: June 8, 2010Assignee: Texas Instruments IncorporatedInventors: Phillip Daniel Matz, Trace Hurd
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Patent number: 7713885Abstract: The invention includes methods in which one or more components of a carboxylic acid having an aqueous acidic dissociation constant of at least 1×10?6 are utilized during the etch of oxide (such as silicon dioxide or doped silicon dioxide). Two or more carboxylic acids can be utilized. Exemplary carboxylic acids include trichloroacetic acid, maleic acid, and citric acid.Type: GrantFiled: May 11, 2005Date of Patent: May 11, 2010Assignee: Micron Technology, Inc.Inventors: Niraj B. Rana, Kevin R. Shea, Janos Fucsko
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Patent number: 7695765Abstract: Methods of preparing a carbon doped oxide (CDO) layer with a low dielectric constant (<3.2) and low residual stress without sacrificing important integration properties such as refractive index and etch rate are provided. The methods involve, for instance, providing a substrate to a deposition chamber and exposing it to TMSA, followed by igniting and maintaining a plasma in a deposition chamber using radio frequency power having high and low frequency components or one frequency component only, and depositing the carbon doped oxide film under conditions in which the resulting dielectric layer has a net tensile stress of less than about 40 MPa, a hardness of at least about 1 GPa, and a SiC:SiOx bond ratio of not greater than about 0.75.Type: GrantFiled: November 12, 2004Date of Patent: April 13, 2010Assignee: Novellus Systems, Inc.Inventors: Keith Fox, Carole Mars, Willis Kirkpatrick, Easwar Srinivasan
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Patent number: 7695981Abstract: A seed layer is formed on a substrate using a first biological agent. The seed layer may comprise densified nanoparticles which are bound to the biological agent. The seed layer is then used for a deposition of a metal layer, such as a barrier layer, an interconnect layer, a cap layer and/or a bus line for a solid state device.Type: GrantFiled: May 15, 2006Date of Patent: April 13, 2010Assignee: Siluria Technologies, Inc.Inventors: Haixia Dai, Khashayar Pakbaz, Michael Spaid, Theo Nikiforov
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Patent number: 7691756Abstract: A passivating coupling material for, on the one hand, passivating a dielectric layer in a semiconductor device, and on the other hand, for permitting or at least promoting liquid phase metal deposition thereon in a subsequent process step. In a particular example, the dielectric layer may be a porous material having a desirably decreased dielectric constant k, and the passivating coupling material provides steric shielding groups that substantially block the adsorption and uptake of ambient moisture into the porous dielectric layer. The passivating coupling materials also provides metal nucleation sides for promoting the deposition of a metal thereon in liquid phase, in comparison with metal deposition without the presence of the passivating coupling material. The use of a liquid phase metal deposition process facilitates the subsequent manufacture of the semiconductor device.Type: GrantFiled: September 1, 2006Date of Patent: April 6, 2010Assignee: NXP B.V.Inventors: Janos Farkas, Srdjan Kordic, Cindy Goldberg
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Publication number: 20100072581Abstract: According to one aspect of the present invention, there is provided a composition for film formation, comprising a compound represented by general formula (I) or a hydrolyzed-dehydrocondensation product thereof: X13-mR1mSiR2SiR3nX23-n??(I) wherein R1 and R3 represent a hydrogen atom or a monovalent substituent; R2 represents a divalent group having an alicyclic structure with four carbon atoms or a derivative of the divalent group; X1 and X2 represent a hydrolysable group; and m and n are an integer of from 0 to 2.Type: ApplicationFiled: August 27, 2009Publication date: March 25, 2010Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yasushi Nakasaki, Nobuhide Yamada, Miyoko Shimada, Hideshi Miyajima, Kei Watanabe
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Patent number: 7682977Abstract: This invention includes methods of forming trench isolation. In one implementation, isolation trenches are provided within a semiconductor substrate. A liquid is deposited and solidified within the isolation trenches to form a solidified dielectric within the isolation trenches. The dielectric comprises carbon and silicon, and can be considered as having an elevationally outer portion and an elevationally inner portion within the isolation trenches. At least one of carbon removal from and/or oxidation of the outer portion of the solidified dielectric occurs. After such, the dielectric outer portion is etched selective to and effective to expose the dielectric inner portion. After the etching, dielectric material is deposited over the dielectric inner portion to within the isolation trenches.Type: GrantFiled: May 11, 2006Date of Patent: March 23, 2010Assignee: Micron Technology, Inc.Inventor: Li Li
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Patent number: 7678713Abstract: The present invention provides a process for improving the hardness and/or modulus of elasticity of a dielectric layer and a method for manufacturing an integrated circuit. The process for improving the hardness and/or modulus of elasticity of a dielectric layer, among other steps, includes providing a dielectric layer having a hardness and a modulus of elasticity, and subjecting the dielectric layer to an energy beam, thereby causing the hardness or modulus of elasticity to increase in value.Type: GrantFiled: August 4, 2005Date of Patent: March 16, 2010Assignee: Texas Instruments IncorporatedInventors: Ting Y. Tsui, Andrew McKerrow, Satyavolu Srinivas Papa Rao, Robert Kraft
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Patent number: 7678712Abstract: The invention concerns a method for applying a surface modification agent composition for organosilicate glass dielectric films. More particularly, the invention pertains to a method for treating a silicate or organosilicate dielectric film on a substrate, which film either comprises silanol moieties or has had at least some previously present carbon containing moieties removed therefrom. The treatment adds carbon containing moieties to the film and/or seals surface pores of the film, when the film is porous.Type: GrantFiled: March 22, 2005Date of Patent: March 16, 2010Assignee: Honeywell International, Inc.Inventors: Anil S. Bhanap, Robert R. Roth, Kikue S. Burnham, Brian J. Daniels, Denis H. Endisch, Ilan Golecki
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Patent number: 7674721Abstract: A method of forming a multi-layered insulation film includes forming a first insulation layer using a first feed gas, the first insulation layer including methyl silsesquioxane (MSQ), forming a second insulation layer using a second feed gas, the second insulation layer including a polysiloxane compound having an Si—H group such that the second insulation layer is in contact with a top of the first insulation layer, and forming a third insulation layer including an inorganic material such that the third insulation layer is in contact with a top of the second insulation layer.Type: GrantFiled: May 2, 2007Date of Patent: March 9, 2010Assignee: NEC Electronics CorporationInventor: Tatsuya Usami
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Patent number: 7662728Abstract: A method of forming a low-K dielectric film, comprises the steps of placing a substrate carrying thereon a low-K dielectric film on a stage, heating the low-K dielectric film on the stage, processing the low-K dielectric film by plasma of a processing gas containing a hydrogen gas, the plasma being excited while supplying the processing gas over the low-K dielectric film, wherein the plasma is excited within 90 seconds after placing the substrate upon the stage.Type: GrantFiled: May 11, 2006Date of Patent: February 16, 2010Assignee: Tokyo Electron LimitedInventors: Yusaku Kashiwagi, Yasuhiro Oshima, Yoshihisa Kagawa, Gishi Chung
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Patent number: 7651924Abstract: A method of fabricating a semiconductor device includes applying a coating oxide film to a surface of a substrate including a semiconductor substrate so that a recess formed in the surface is filled with the coating oxide film, applying a steam oxidation treatment to the substrate at a first temperature, soaking the substrate in heated water while applying a megasonic wave to the substrate in the heated water, and applying a steam oxidation treatment to the substrate at a second temperature higher than the first temperature.Type: GrantFiled: September 18, 2008Date of Patent: January 26, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Kawamoto, Naoki Kai, Koichi Matsuno, Minori Kajimoto
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Patent number: 7642204Abstract: In one aspect, the invention includes a method of forming an insulating material comprising: a) providing a substrate within a reaction chamber; b) providing reactants comprising a Si, F and ozone within the reaction chamber; and c) depositing an insulating material comprising fluorine, silicon and oxygen onto the substrate from the reactants. In another aspect, the invention includes a method of forming a boron-doped silicon oxide having Si—F bonds, comprising: a) providing a substrate within a reaction chamber; b) providing reactants comprising Triethoxy fluorosilane, a boron-containing precursor, and ozone within the reaction chamber; and c) depositing a boron-doped silicon oxide having Si—F bonds onto the substrate from the reactants.Type: GrantFiled: January 30, 2004Date of Patent: January 5, 2010Assignee: Micron Technology, Inc.Inventors: Anand Srinivasan, Gurtej Sandhu, Ravi Iyer
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Patent number: 7622399Abstract: A method of forming a low dielectric constant structure. The method comprises providing at a first temperature a dielectric material having a first dielectric constant and a first elastic modulus, and curing the dielectric material by a thermal curing process, in which the material is heated to a second temperature by increasing the temperature at an average rate of at least 1° C. per second. As a result a densified, dielectric material is obtained which has a low dielectric constant.Type: GrantFiled: March 10, 2004Date of Patent: November 24, 2009Assignee: Silecs OyInventors: Jason Reid, Nigel Hackera, Nina Pirilä, Juha Rantala, William McLaughlin
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Patent number: 7601651Abstract: A method of forming a layer on a substrate in a chamber, wherein the substrate has at least one formed feature across its surface, is provided. The method includes exposing the substrate to a silicon-containing precursor in the presence of a plasma to deposit a layer, treating the deposited layer with a plasma, and repeating the exposing and treating until a desired thickness of the layer is obtained. The plasma may be generated from an oxygen-containing gas.Type: GrantFiled: January 30, 2007Date of Patent: October 13, 2009Assignee: Applied Materials, Inc.Inventors: Mihaela Balseanu, Meiyee Shek, Li-Qun Xia, Hichem M'Saad
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Patent number: 7601567Abstract: A method of forming an organic thin film transistor is disclosed. The method includes forming source and drain electrodes on a substrate; forming an insulating layer covering the source and drain electrodes; first surface-treating the insulating layer so that the insulating layer has a hydrophobic surface; forming an opening that exposes facing portions of the source and drain electrodes in the first surface-treated insulating layer; forming an organic semiconductor layer and a gate insulating layer in the opening; second surface-treating the first surface-treated insulating layer so that the insulating layer has a hydrophilic surface; and forming a gate electrode overlapping at least a portion of the source and drain electrodes, an organic thin film transistor, and a flat panel display device including the organic thin film transistor.Type: GrantFiled: December 12, 2006Date of Patent: October 13, 2009Assignee: Samsung Mobile Display Co., Ltd.Inventors: Min-Chul Suh, Taek Ahn, Jin-Seong Park
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Patent number: 7602048Abstract: The object of the present invention is to improve the interfacial adhesion between the film with low dielectric constant and protective film, without damaging the excellent dielectric, flatness and gap-filling characteristics of the organic material of low dielectric constant, and for that purpose there is provided a wiring structure with the copper film embedded in the insulation film of the wiring layer, wherein the insulation film of the wiring layer is of a multi-layered structure with the laminated methyl silsesquioxane (MSQ) film, methylated hydrogen silsesquioxane (MHSQ) film and silicon oxide film.Type: GrantFiled: May 9, 2001Date of Patent: October 13, 2009Assignee: NEC Electronics CorporationInventor: Tatsuya Usami
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Patent number: 7585788Abstract: A method is provided for forming a rare earth element-doped silicon oxide (SiO2) precursor with nanocrystalline (nc) Si particles. In one aspect the method comprises: mixing Si particles into a first organic solvent, forming a first solution with a first boiling point; filtering the first solution to remove large Si particles; mixing a second organic solvent having a second boiling point, higher than the first boiling point, to the filtered first solution; and, fractionally distilling, forming a second solution of nc Si particles. The Si particles are formed by immersing a Si wafer into a third solution including hydrofluoric (HF) acid and alcohol, applying an electric bias, and forming a porous Si layer overlying the Si wafer. Then, the Si particles are mixed into the organic solvent by depositing the Si wafer into the first organic solvent, and ultrasonically removing the porous Si layer from the Si wafer.Type: GrantFiled: September 12, 2005Date of Patent: September 8, 2009Assignee: Sharp Laboratories of America, Inc.Inventors: Wei-Wei Zhuang, Yoshi Ono, Sheng Teng Hsu, Tingkai Li
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Patent number: 7582572Abstract: A method of manufacturing an insulating film includes coating a first liquid material in which polysilazane is dissolved on a substrate; decreasing dangling bonds of silicon (Si) in the first liquid material; after decreasing the dangling bonds, coating a second liquid material which is similar to the first liquid material on the first liquid material; and converting the first liquid material and the second liquid material into a silicon (Si) insulating film.Type: GrantFiled: December 14, 2006Date of Patent: September 1, 2009Assignee: Kabushiki Kaisha ToshibaInventor: Kazuaki Iwasawa
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Patent number: 7582575Abstract: A method for forming an insulation film on a semiconductor substrate by plasma reaction includes: vaporizing a silicon-containing hydrocarbon having a Si—O bond compound to provide a source gas; introducing the source gas and a carrier gas without an oxidizing gas into a reaction space for plasma CVD processing; and forming an insulation film constituted by Si, C, O, and H on a substrate by plasma reaction using a combination of low-frequency RF power and high-frequency RF power in the reaction space. The plasma reaction is activated while controlling the flow of the reaction gas to lengthen a residence time, Rt, of the reaction gas in the reaction space.Type: GrantFiled: December 5, 2005Date of Patent: September 1, 2009Assignee: ASM Japan K.K.Inventors: Atsuki Fukazawa, Kenichi Kagami
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Patent number: 7569497Abstract: In a method for forming an insulating film, a film containing an organic curable material and provided on a substrate for an electronic device is irradiated with an energy plasma produced by a microwave irradiation through a planar antenna member having a plurality of slits to thereby cure the film containing the organic curable material and form the insulating film having a dielectric constant of 3 or less.Type: GrantFiled: January 25, 2005Date of Patent: August 4, 2009Assignee: Tokyo Electron LimitedInventors: Toshiaki Hongoh, Satohiko Hoshino
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Patent number: 7553769Abstract: A method and system for treating a dielectric film includes exposing at least one surface of the dielectric film to a CxHy containing material, wherein x and y are each integers greater than or equal to a value of unity. The dielectric film can include a low dielectric constant film with or without pores having an etch feature formed therein following dry etch processing. As a result of the etch processing or ashing, exposed surfaces in the feature formed in the dielectric film can become damaged, or activated, leading to retention of contaminants, absorption of moisture, increase in dielectric constant, etc. Damaged surfaces, such as these, are treated by performing at least one of healing these surfaces to, for example, restore the dielectric constant (i.e., decrease the dielectric constant) and cleaning these surfaces to remove contaminants, moisture, or residue.Type: GrantFiled: October 10, 2003Date of Patent: June 30, 2009Assignee: Tokyo Electron LimitedInventors: Dorel Ioan Toma, Jianhong Zhu, Kazuhiro Hamamoto
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Patent number: 7544614Abstract: A slit forming process with respect to a coated film, includes: forming a step pattern having an end part on a substrate; coating a liquid material for forming a coated film on the substrate in the manner of covering at least the end part of the step pattern; and forming the coated film by drying the coated liquid material, together with forming a slit at a position corresponding to the end part of the step pattern.Type: GrantFiled: January 3, 2006Date of Patent: June 9, 2009Assignee: Seiko Epson CorporationInventor: Ichio Yudasaka
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Patent number: 7544069Abstract: A method for fabricating a thin film pattern and a method for fabricating a flat panel display device using the same to form an organic material pattern by not using a photo process are disclosed. The method for fabricating the thin film pattern includes forming a first conductive thin film pattern on a substrate; forming a master mold provided with a second thin film pattern; coating an organic material on the master mold provided with the second thin film pattern; joining the substrate and the master mold to contact the first thin film pattern and a surface of the substrate with the organic material; hardening the organic material; separating the substrate and the master mold from each other to provide an organic thin film pattern having step coverage formed by the second thin film pattern on a substrate provided with the first thin film pattern.Type: GrantFiled: July 28, 2006Date of Patent: June 9, 2009Assignee: LG Display Co., Ltd.Inventor: Jin Wuk Kim
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Patent number: 7538019Abstract: In one embodiment, the present invention includes a semiconductor package having a substrate with a first surface to support a semiconductor die. A second surface of the substrate includes compliant conductive pads to provide electrical connections to the semiconductor die. In this way, improved connection between the semiconductor package and a socket is provided. Other embodiments are described and claimed.Type: GrantFiled: December 12, 2005Date of Patent: May 26, 2009Assignee: Intel CorporationInventors: Qing Zhou, Wei Shi, Daoqiang Lu, Jiangqi He
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Patent number: 7524735Abstract: Methods of this invention relate to filling gaps on substrates with a solid dielectric material by forming a flowable film in the gap. The flowable film provides consistent, void-free gap fill. The film is then converted to a solid dielectric material. In this manner gaps on the substrate are filled with a solid dielectric material. According to various embodiments, the methods involve reacting a dielectric precursor with an oxidant to form the dielectric material. In certain embodiments, the dielectric precursor condenses and subsequently reacts with the oxidant to form dielectric material. In certain embodiments, vapor phase reactants react to form a condensed flowable film.Type: GrantFiled: June 5, 2006Date of Patent: April 28, 2009Assignee: Novellus Systems, IncInventors: Vishal Gauri, Raashina Humayun, Chi-I Lang, Judy H. Huang, Michael Barnes, Sunil Shanker
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Patent number: 7521377Abstract: A method of fabricating a dielectric material that has an ultra low dielectric constant (or ultra low k) using at least one organosilicon precursor is described. The organosilicon precursor employed in the present invention includes a molecule containing both an Si—O structure and a sacrificial organic group, as a leaving group. The use of an organosilicon precursor containing a molecular scale sacrificial leaving group enables control of the pore size at the nanometer scale, control of the compositional and structural uniformity and simplifies the manufacturing process. Moreover, fabrication of a dielectric film from a single precursor enables better control of the final porosity in the film and a narrower pore size distribution resulting in better mechanical properties at the same value of dielectric constant.Type: GrantFiled: January 11, 2006Date of Patent: April 21, 2009Assignee: International Business Machines CorporationInventors: Stephen M. Gates, Alfred Grill, Robert D. Miller, Deborah A. Neumayer, Son Nguyen
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Patent number: 7514338Abstract: A method of manufacturing a semiconductor device, includes preparing a work piece having a trench on its main surface side, forming a polymer film containing a polymer containing silicon, hydrogen and nitrogen on the main surface of the work piece, holding the work piece with the polymer film in a first atmosphere, which contains oxygen, and whose oxygen partial pressure is set in a range of 16 to 48 Torr, oxidizing the polymer film in a second atmosphere containing water vapor to form an oxide film containing a silicon oxide as a main component, after holding the work piece in the first atmosphere, and removing an upper portion of the oxide film to remain a lower portion of the oxide film in the trench.Type: GrantFiled: October 10, 2006Date of Patent: April 7, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Osamu Arisumi, Masahiro Kiyotoshi
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Patent number: 7510942Abstract: A method of increasing the work function of micro-electrodes includes providing a metal or silica surface functionalized with reactive groups and contacting the functionalized surface with a solution of at least one biochemical, having a permanent dipole moment and being capable of self assembly, for a sufficient time for the biochemical to self assemble molecularly (SAM) on the functionalized surface. The biochemical can be aminopropyl triethoxy silane, fatty acids, organosilicon derivatives, organosulfur compounds, alkyl chains, or diphosphates. Use in a wide variety of metals and metallic compounds is disclosed.Type: GrantFiled: November 24, 2004Date of Patent: March 31, 2009Assignee: Arizona Board of Regents, Acting for and on behalf of Arizona State UniversityInventors: Sandwip K. Dey, Diefeng Gu, Rizaldi Sistiabudi, Jaydeb Goswami
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Publication number: 20090081886Abstract: A process for depositing a thin film material on a substrate is disclosed, comprising simultaneously directing a series of gas flows from the output face of a delivery head of a thin film deposition system toward the surface of a substrate, and wherein the series of gas flows comprises at least a first reactive gaseous material, an inert purge gas, and a second reactive gaseous material, wherein the first reactive gaseous material is capable of reacting with a substrate surface treated with the second reactive gaseous material. A system capable of carrying out such a process is also disclosed.Type: ApplicationFiled: September 26, 2007Publication date: March 26, 2009Inventors: David H. Levy, Roger S. Kerr, Jeffrey T. Carey
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Patent number: 7504343Abstract: An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.Type: GrantFiled: May 5, 2006Date of Patent: March 17, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiko Hayakawa, Mitsunori Sakama, Satoshi Toriumi
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Patent number: 7501350Abstract: Disclosed is a plasma processing method for processing a target object by using a plasma of a process gas containing a fluorocarbon compound. Used is a fluorocarbon compound having at least one triple bond within the molecule and at least one CF3 group bonded by a single bond to the carbon atom forming the triple bond with the adjacent carbon atom such as 1,1,1,4,4,4-hexafluoro-2-butyne or 1,1,1,4,4,5,5,5-octafluoro-2-pentyne.Type: GrantFiled: November 4, 2005Date of Patent: March 10, 2009Assignee: Tokyo Electron LimitedInventor: Masanobu Honda
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Publication number: 20090053906Abstract: Disclosed is a producing method of a semiconductor device including: loading at least one substrate into a processing chamber; forming a metal oxide film or a silicon oxide film on a surface of the substrate by repeatedly supplying a metal compound or a silicon compound, each of which is a first material, an oxide material which is a second material including an oxygen atom, and a hydride material which is a third material, into the processing chamber predetermined times; and unloading the substrate from the processing chamber.Type: ApplicationFiled: July 19, 2007Publication date: February 26, 2009Inventors: Hironobu Miya, Kazuhiro Hirahara, Yoshitaka Hamada, Atsuhiko Suda
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Patent number: 7491659Abstract: In forming various types of insulating films in manufacture of a semiconductor device, carbon is gasified into CHx, COH etc. during film formation by adding active hydrogen and nitrogen oxide to reduce the carbon content during the film formation, and the effect of blocking impurities such as alkali metals is improved.Type: GrantFiled: December 18, 2003Date of Patent: February 17, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Mitsunori Sakama, Takeshi Fukada
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Patent number: 7491658Abstract: A method for fabricating a SiCOH dielectric material comprising Si, C, O and H atoms from a single organosilicon precursor with a built-in organic porogen is provided. The single organosilicon precursor with a built-in organic porogen is selected from silane (SiH4) derivatives having the molecular formula SiRR1R2R3, disiloxane derivatives having the molecular formula R4R5R6—Si—O—Si—R7R8R9, and trisiloxane derivatives having the molecular formula R10R11R12—Si—O—Si—R13R14—O—Si—R15R16R17 where R and R1-17 may or may not be identical and are selected from H, alkyl, alkoxy, epoxy, phenyl, vinyl, allyl, alkenyl or alkynyl groups that may be linear, branched, cyclic, polycyclic and may be functionalized with oxygen, nitrogen or fluorine containing substituents. In addition to the method, the present application also provides SiCOH dielectrics made from the inventive method as well as electronic structures that contain the same.Type: GrantFiled: October 13, 2004Date of Patent: February 17, 2009Assignee: International Business Machines CorporationInventors: Son Van Nguyen, Stephen McConnell Gates, Deborah A. Neumayer, Alfred Grill
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Patent number: 7488693Abstract: [Problems] It is to provide a method for producing a silicon oxide film having better quality than a TEOS at low temperature. And it is to provide a method for manufacturing a semiconductor device wherein an insulating film composed of a silicon oxide is formed. [Means for solving problems] A film composed of a silicon oxide is produced by CVD method where a silane compound represented by the following general formula is reacted. An insulating film is deposited by CVD method where a silane compound represented by the following general formula is reacted. HnSi2(OR)6?n (In the above formula, R is an alkyl group of carbon number from 1 to 5, and n is an integer from 0 to 2.Type: GrantFiled: February 17, 2005Date of Patent: February 10, 2009Assignee: Toagosei Co., Ltd.Inventors: Hiroaki Takeuchi, Satoshi Hattori, Hiroshi Suzuki, Katsuyoshi Harada
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Patent number: 7482265Abstract: A method of manufacturing a semiconductor device having a low-k dielectric layer is provided. An embodiment comprises forming a dielectric layer on a substrate, wherein the layer comprises a pore generating material dispersed in an uncured matrix. A second step comprises forming pores in the uncured matrix by irradiating the layer with radiation having a first wavelength. After pore forming, a third step comprises cross-linking the dielectric by irradiating it at a second wavelength, the second being less than the first. In an embodiment, the irradiating wavelengths comprise ultra-violet radiation. Embodiments may further include repairing processing damage wherein the damage includes dangling bonds or silanol formation. The repairing includes annealing in a carbon-containing ambient such as C2H4, C3H6, or hexamethyldisilazane (HMDS).Type: GrantFiled: January 10, 2006Date of Patent: January 27, 2009Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: I-I Chen, Tien-I Bao, Shwang-Ming Cheug, Chen-Hua Yu
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Publication number: 20090014730Abstract: An exemplary method for forming an insulator layer over a silicon carbide substrate includes providing a silicon carbide substrate and anodizing the silicon carbide substrate in a liquid ambient at a temperature of not more than 200° C. to form a silicon dioxide layer thereon. Also provided are silicon carbide transistors and methods for fabricating the same.Type: ApplicationFiled: July 3, 2008Publication date: January 15, 2009Applicant: NATIONAL TAIWAN UNIVERSITYInventors: Jenn-Gwo Hwu, Kai-Chieh Chuang
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Patent number: 7473653Abstract: Methods of preparing a low stress porous low-k dielectric material on a substrate are provided. The methods involve the use of a structure former precursor and/or porogen precursor with one or more organic functional groups. In some cases, the structure former precursor has carbon-carbon double or triple bonds. In other cases, one or both of the structure former precursor and porogen precursor has one or more bulky organic groups. In other cases, the structure former precursor has carbon-carbon double or triple bonds and one or both of the structure former precursor and porogen precursor has one or more bulky organic groups. Once the precursor film is formed, the porogen is removed, leaving a porous low-k dielectric matrix with high mechanical strength. Different types of structure former precursors and porogen precursors are described. The resulting low stress low-k porous film may be used as a low-k dielectric film in integrated circuit manufacturing applications.Type: GrantFiled: June 18, 2007Date of Patent: January 6, 2009Assignee: Novellus Systems, Inc.Inventors: Qingguo Wu, Haiying Fu, David C. Smith, David Mordo
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Patent number: 7470636Abstract: The present invention relates to low a dielectric material essential for a next generation semiconductor with high density and high performance, and more particularly to a low dielectric material that is thermally stable and has good film-forming properties and excellent mechanical properties, a dielectric film comprising the low dielectric material, and a semiconductor device manufactured using the dielectric film.Type: GrantFiled: December 15, 2006Date of Patent: December 30, 2008Assignee: LG Chem, Ltd.Inventors: Min-Jin Ko, Hye-Yeong Nam, Jung-Won Kang, Myung-Sun Moon, Dong-Seok Shin
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Patent number: 7470454Abstract: Low dielectric materials and films comprising same have been identified for improved performance when used as interlevel dielectrics in integrated circuits as well as methods for making same. In certain embodiments of the invention, there is provided a low-temperature process to remove at least a portion of at least one pore-forming material within a composite film thereby forming a porous film. The pore-forming material may be removed via exposure to at least one energy source, preferably an ultraviolet light source, in a non-oxidizing atmosphere.Type: GrantFiled: July 21, 2003Date of Patent: December 30, 2008Assignee: Air Products and Chemicals, Inc.Inventors: Aaron Scott Lukas, Mark Leonard O'Neill, Mark Daniel Bitner, Jean Louise Vincent, Raymond Nicholas Vrtis, Eugene Joseph Karwacki, Jr.
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Patent number: 7470584Abstract: A TEOS deposition method. A mixture of gases is introduced into a process chamber, in which the mixture of gases comprises tetra-ethyl-ortho-silicate (TEOS) and N2. Compressive stress of a TEOS oxide film is increased by activating the mixture of gases.Type: GrantFiled: January 21, 2005Date of Patent: December 30, 2008Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yi-Lung Cheng, Hong-Jui Chang, Ying-Lang Wang
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Patent number: 7465682Abstract: A method for processing an organosiloxane film includes loading a target substrate (W) with a coating film formed thereon into a reaction chamber (2), and performing a heat process on the target substrate (W) within the reaction chamber (2) to bake the coating film. The coating film contains a polysiloxane base solution having an organic functional group. The heat process includes a temperature setting step of setting an interior of the reaction chamber (2) at a process temperature by heating, and a supplying step of supplying a baking gas into the reaction chamber (2) set at the process temperature, while activating the baking gas by a gas activation section (14) disposed outside the reaction chamber (2).Type: GrantFiled: April 20, 2004Date of Patent: December 16, 2008Assignee: Tokyo Electron LimitedInventor: Shingo Hishiya
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Patent number: 7459405Abstract: Embodiments of the present invention provide methods, apparatuses, and devices related to chemical vapor deposition of silicon oxide. In one embodiment, a single-step deposition process is used to efficiently form a silicon oxide layer exhibiting high conformality and favorable gap-filling properties. During a pre-deposition gas flow stabilization phase and an initial deposition stage, a relatively low ratio of silicon-containing gas:oxidant deposition gas is flowed, resulting in formation of highly conformal silicon oxide at relatively slow rates. Over the course of the deposition process step, the ratio of silicon-containing gas:oxidant gas is increased, resulting in formation of less-conformal oxide material at relatively rapid rates during later stages of the deposition process step.Type: GrantFiled: July 25, 2006Date of Patent: December 2, 2008Assignee: Applied Materials, Inc.Inventors: Nitin K. Ingle, Xinyua Xia, Zheng Yuan