Optical Characteristic Sensed Patents (Class 438/7)
  • Publication number: 20130161534
    Abstract: A method of manufacturing a white light emitting device includes dividing a phosphor sheet into phosphor film units to be applied to individual light emitting diode (LED) devices, measuring light conversion characteristics of the respective phosphor film units, classifying the phosphor film units of the phosphor sheet into a plurality of groups according to measurement results of the light conversion characteristics and combining the phosphor film units classified into the plurality of groups and an LED device having predetermined light characteristics so as to obtain target color characteristics.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 27, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: SAMSUNG ELECTRONICS CO., LTD.
  • Patent number: 8460945
    Abstract: A method and system are provided for monitoring status of a system component in a process chamber of a batch type processing system. The method includes exposing a system component to light from a light source and monitoring interaction of the light with the system component to determine status of the system component. The method can detect light transmission and/or light reflection from a system component during a process that can include a chamber cleaning process, a chamber conditioning process, a substrate etching process, and a substrate film formation process. The system component can be a consumable system part such as a process tube, a shield, a ring, a baffle, and a liner, and can further contain a protective coating.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: June 11, 2013
    Assignee: Tokyo Electron Limited
    Inventors: David L. O'Meara, Daniel Craig Burdett, Stephen H. Cabral, Gert Leusink, John William Kostenko, Cory Wajda
  • Publication number: 20130137194
    Abstract: A method of manufacturing a light emitting device is provided in which satisfactory image display can be performed by the investigation and repair of short circuits in defect portions of light emitting elements. A backward direction electric current flows in the defect portions if a reverse bias voltage is applied to the light emitting elements having the defect portions. Emission of light which occurred from the backward direction electric current flow is measured by using an emission microscope, specifying the position of the defect portions, and short circuit locations can be repaired by irradiating a laser to the defect portions, turning them into insulators.
    Type: Application
    Filed: January 24, 2013
    Publication date: May 30, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: SEMICONDUCTOR ENERGY LABORATORY Co., Ltd.
  • Patent number: 8445906
    Abstract: A method for sorting and acquiring a semiconductor element, including: disposing a plurality of semiconductor elements in an effective section in a semiconductor substrate; disposing a standard semiconductor element outside of the effective section in the semiconductor substrate; forming a bump in each of the plurality of the semiconductor elements and in the standard semiconductor element; performing a test on the plurality of the semiconductor elements in the effective section; forming a location map using the standard semiconductor element as a base point; and picking up the semiconductor elements determined as non-defective in the test from the plurality of the semiconductor elements based on the location map.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: May 21, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Yoshito Konno, Yutaka Yamada
  • Publication number: 20130122612
    Abstract: A time-resolved photoluminescence-based system providing quality control during manufacture of thin film absorber layers for photovoltaic devices. The system includes a laser generating excitation beams and an optical fiber with an end used both for directing each excitation beam onto a thin film absorber layer and for collecting photoluminescence from the absorber layer. The system includes a processor determining a quality control parameter such as minority carrier lifetime of the thin film absorber layer based on the collected photoluminescence. In some implementations, the laser is a low power, pulsed diode laser having photon energy at least great enough to excite electron hole pairs in the thin film absorber layer. The scattered light may be filterable from the collected photoluminescence, and the system may include a dichroic beam splitter and a filter that transmit the photoluminescence and remove scattered laser light prior to delivery to a photodetector and a digital oscilloscope.
    Type: Application
    Filed: November 9, 2012
    Publication date: May 16, 2013
    Applicant: ALLIANCE FOR SUSTAINABLE ENERGY, LLC
    Inventor: Alliance for Sustainable Energy, LLC
  • Publication number: 20130122610
    Abstract: A die bonding apparatus and a die bonding method are provided, which are capable of simultaneously bonding a plurality of dies from a first placement area onto a substrate disposed on a second placement area. The die bonding apparatus includes a die sucking device which is movably located above the first placement area and a second placement area. The die sucking device includes a plurality of nozzles. The nozzles can suck the dies disposed on the first placement area, and then simultaneously bond the dies onto the substrate.
    Type: Application
    Filed: May 1, 2012
    Publication date: May 16, 2013
    Applicant: WALSIN LIHWA CORPORATION
    Inventors: Jun-Wei Chung, Wei-Cheng Lou, Jung-Kun Wu, Chung-I Chiang
  • Publication number: 20130119419
    Abstract: Magnetically adjusting color-converting particles within a matrix and associated devices, systems, and methods are disclosed herein. A magnetic-adjustment process can include applying a magnetic field to a mixture including a non-solid matrix and a plurality of color-converting particles (e.g. magnetically anisotropic color-converting particles). The magnetic field can cause the plurality of color-converting particles to move into a generally non-random alignment (e.g., a generally non-random magnetic alignment and/or a generally non-random shape alignment) within the non-solid matrix. The non-solid matrix then can be solidified to form a solid matrix. A magnetic-adjustment process can be performed in conjunction with testing and/or product binning of solid-state radiation transducer devices.
    Type: Application
    Filed: November 11, 2011
    Publication date: May 16, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Sameer S. Vadhavkar, Tim J. Corbett, Xiao Li
  • Publication number: 20130122611
    Abstract: The present invention generally relates to methods of controlling UV lamp output to increase irradiance uniformity. The methods generally include determining a baseline irradiance within a chamber, determining the relative irradiance on a substrate corresponding to a first lamp and a second lamp, and determining correction or compensation factors based on the relative irradiances and the baseline irradiance. The lamps are then adjusted via closed loop control using the correction or compensation factors to individually adjust the lamps to the desired output. The lamps may optionally be adjusted to equal irradiances prior to adjusting the lamps to the desired output. The closed loop control ensures process uniformity from substrate to substrate. The irradiance measurement and the correction or compensation factors allow for adjustment of lamp set points due to chamber component degradation, chamber component replacement, or chamber cleaning.
    Type: Application
    Filed: November 5, 2012
    Publication date: May 16, 2013
    Inventors: YAO-HUNG YANG, Abhijit Kangude, Sanjeev Baluja, Michael Martinelli, Liliya Krivulina, Thomas Nowak, Juan Carlos Rocha-Alvarez, Scott A. Hendrickson
  • Patent number: 8440473
    Abstract: A method for etching features into an etch layer in a plasma processing chamber is provided. An optically timed deposition phase is provided comprising providing a flow of deposition phase gas, detecting the presence of deposition gas within the plasma processing chamber, providing RF energy for forming a plasma from the deposition phase gas in the plasma processing chamber, and stopping the flow of the deposition gas into the plasma processing chamber. An optically timed etching phase is provided, comprising providing a flow of an etch gas, detecting the presence of the etch gas within the plasma processing chamber, providing RF energy for forming a plasma from the etch gas in the plasma processing chamber, and stopping the flow of the etch gas into the plasma processing chamber.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: May 14, 2013
    Assignee: Lam Research Corporation
    Inventors: Qing Xu, Camelia Rusu, Brian K. McMillin, Alexander M. Paterson
  • Publication number: 20130115720
    Abstract: A method and apparatus for determining grain size of a surface. A light source is directed at the surface. Reflected light from the surface is detected. A peak surface grain wavelength is determined from the reflected light. The peak surface grain wavelength is converted to a grain size. Grain size of a semiconductor surface is used as a feedback input to control a manufacturing process.
    Type: Application
    Filed: November 7, 2011
    Publication date: May 9, 2013
    Inventors: Arnold Allenic, Oleh Petro Karpenko, Erel Milshtein, Ming L. Yu
  • Patent number: 8435803
    Abstract: A method for depositing a microcrystalline silicon film is disclosed, including performing an open loop and close loop plasma enhanced deposition process without and with modulating process parameters, respectively. A film is deposited by the open loop plasma enhanced deposition process till a required film crystallinity and then performing a closed loop plasma enhanced deposition process which monitors species plasma spectrum intensities SiH* and H? and modulates process parameters of the plasma enhanced deposition process resulting in the species concentration stabilization which controls the intensities variation of SiH* and H? within an allowed range of a target value for improving film depositing rate.
    Type: Grant
    Filed: April 12, 2010
    Date of Patent: May 7, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Chen-Chung Du, Sheng-Lang Lee, Muh-Wang Liang, Jen-Rong Huang, Chia-Hao Chang
  • Patent number: 8426223
    Abstract: Wafer edge inspection approaches are disclosed wherein an imaging device captures at least one image of an edge of a wafer. The at least one image can be analyzed in order to identify an edge bead removal line. An illumination system having a diffuser can further be used in capturing images.
    Type: Grant
    Filed: September 8, 2009
    Date of Patent: April 23, 2013
    Assignee: Rudolph Technologies, Inc.
    Inventors: Christopher Voges, Ajay Pai, Antony Ravi Philip, Tuan D. Le
  • Publication number: 20130095577
    Abstract: Described herein is a method and apparatus for measuring the thickness of a deposited semiconductor material. A colorimeter has an optical source that illuminates a portion of a deposited semiconductor material with optical radiation, a sensor that collects and measures color information related to reflected radiation from the deposited semiconductor material, and a processor that receives the color information related to the reflected radiation from the sensor and calculates a thickness of the semiconductor material. The processor may control a semiconductor material deposition apparatus.
    Type: Application
    Filed: October 4, 2012
    Publication date: April 18, 2013
    Applicant: FIRST SOLAR, INC.
    Inventor: FIRST SOLAR, INC.
  • Patent number: 8420498
    Abstract: An alignment method of chips that are formed on a surface of a semiconductor wafer with alignment marks corresponding to the chips includes the steps of irradiating an alignment mark corresponding to a predetermined alignment chip in a predetermined area including the chips with a laser light; detecting reflected waves from the alignment mark of the predetermined alignment chip to obtain a position of the alignment mark of the predetermined alignment chip; irradiating an alignment mark of an alternative chip different from the predetermined alignment chip with the laser light in case of not being able to obtain the position of the alignment mark of the predetermined alignment chip; obtaining a position of the alignment mark of the alternative chip by detecting the reflected waves from the alignment mark of the alternative chip; and aligning the chips in the predetermined area based on positions of alignment marks including the position of the alignment mark of the alternative chip.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: April 16, 2013
    Assignee: Mitsumi Electric Co., Ltd.
    Inventor: Yukihiro Tanemura
  • Patent number: 8420410
    Abstract: A semiconductor die includes a group of spacer cells within the semiconductor die. The spacer cells include fiducial markings therein. The fiducial markings can be located within a metal layer, a diffusion layer, a polysilicon layer, and/or a Shallow Trench Isolation (STI) structure.
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: April 16, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Michael Laisne, Xiangdong Pan, Foua Vang, Prayag B. Patel, Donald D. Lyons, Martin Villafana
  • Publication number: 20130084655
    Abstract: A multi-patterning method of manufacturing a patterned wafer provides test structures designed to enhance overlay error measurement sensitivity for monitoring and process control. One or more patterns are overlaid on a first pattern, each of a given pitch, with the elements interleaved. Test structure is formed with elements of the overlaid patterns spaced away from respective mid-positions more closely toward elements of the first pattern. In some embodiments, test structure elements of the second pattern are overlaid midway between mid-positions of elements of the first pattern and measured by scatterometry. In other embodiments, test structure elements of the second pattern are overlaid at a slightly different pitch than the elements of the first pattern and measured by reflectivity. Measurements are compared with library measurements to identify the error, which may be fed back to control the patterning process. The multi-patterning may be formed by LELE, LLE, LFLE, or other methods.
    Type: Application
    Filed: September 30, 2011
    Publication date: April 4, 2013
    Inventors: Hongyu Henry Yue, Shifang Li
  • Patent number: 8399264
    Abstract: The present disclosure relates to the field of microelectronic substrate fabrication and, more particularly, to alignment inspection for vias formed in the microelectronic substrates. The alignment inspection may be achieved by determining the relative positions of fluorescing and non-fluorescing elements in a microelectronic substrate.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: March 19, 2013
    Assignee: Intel Corporation
    Inventors: Zhihua Zou, Liang Zhang, Sheng Li, Tamil Selvamuniandy
  • Patent number: 8398725
    Abstract: When annealing of a semiconductor film is conducted using a plurality of lasers, each of the distances between laser irradiation regions is different. When a lithography step is conducted in accordance with a marker which is formed over a substrate in advance after the step, light-exposure is not correctly conducted to a portion crystallized by laser. By using a laser irradiation region obtained on a laser irradiation step as a marker, light-exposure is conducted by making a light-exposure position of a stepper coincide with a large grain size region in the laser irradiation region. A large grain size region and a poorly crystalline region are detected by utilizing a thing that scattering intensity of light is different between the large grain size region and the poorly crystalline region, thereby determining a light-exposure position.
    Type: Grant
    Filed: April 9, 2010
    Date of Patent: March 19, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koichiro Tanaka, Yoshiaki Yamamoto
  • Patent number: 8399808
    Abstract: Systems and methods for forming a time-average line image are disclosed. The method includes forming a line image with a first amount of intensity non-uniformity. The method also includes forming and scanning a secondary image over at least a portion of the line image to form a time-averaged modified line image having a second amount of intensity non-uniformity that is less than the first amount. Wafer emissivity is measured in real time to control the intensity of the secondary image. Temperature is also measured in real time based on the wafer emissivity and reflectivity of the secondary image, and can be used to control the intensity of the secondary image.
    Type: Grant
    Filed: August 10, 2011
    Date of Patent: March 19, 2013
    Assignee: Ultratech, Inc.
    Inventors: Serguei Anikitchev, James T. McWhirter, Joseph E. Gortych
  • Patent number: 8399263
    Abstract: An expansion/contraction measuring apparatus includes a transport section which transports a flexible substrate along a surface of the substrate; a detecting section detecting first and second marks which are formed on the substrate while being separated from each other by a predetermined spacing distance in a transport direction of the substrate and which are moved, in accordance with the transport of the substrate, to first and second detection areas disposed on a transport route for the substrate respectively; a substrate length setting section which sets a length of the substrate along the transport route between the first and second detection areas to a reference length; and a deriving section which derives information about expansion/contraction of the substrate in relation to the transport direction based on a detection result of the first and second marks. Accordingly, the expansion/contraction state of an expandable/contractible substrate is measured highly accurately.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: March 19, 2013
    Assignee: Nikon Corporation
    Inventors: Tohru Kiuchi, Hideo Mizutani
  • Publication number: 20130062639
    Abstract: A method for fabricating a light emitting diode (LED) device includes the steps of forming (or providing) a plurality of LED dice, forming a plurality of wavelength conversions layers, and then evaluating at least one electromagnetic radiation emission characteristic of each LED die and at least one color characteristic of each wavelength conversion layer. The method also includes the steps of comparing the evaluated characteristic of each LED die and the evaluated characteristic of each wavelength conversion layer to a database, selecting a selected LED die and a selected wavelength conversion layer based on the evaluating and comparing steps, and then attaching the selected wavelength conversion layer to the selected LED die.
    Type: Application
    Filed: September 12, 2011
    Publication date: March 14, 2013
    Applicant: SEMILEDS OPTOELECTRONICS CO., LTD.
    Inventors: TRUNG TRI DOAN, JUI-KANG YEN
  • Publication number: 20130062603
    Abstract: A test structure for measuring a Micro-Electro-Mechanical System (MEMS) cavity height structure and calibration method. The method includes forming a sacrificial cavity material over a plurality of electrodes and forming an opening into the sacrificial cavity material. The method further includes forming a transparent or substantially transparent material in the opening to form a transparent or substantially transparent window. The method further includes tuning a thickness of the sacrificial cavity material based on measurements obtained through the transparent or substantially transparent window.
    Type: Application
    Filed: September 13, 2011
    Publication date: March 14, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeffrey C. Maling, Anthony K. Stamper, Eric J. White
  • Publication number: 20130065327
    Abstract: A method for fabricating light emitting diode (LED) dice includes the steps of coating a transparent substrate with a wavelength conversion material, continuously evaluating a correlated color temperature (CCT) of the output electromagnetic radiation produced by the wavelength conversion material and comparing the correlated color temperature (CCT) to a target correlated color temperature (CCT), and controlling the coating step responsive to feedback from the evaluating and comparing step to adjust the correlated color temperature (CCT) to achieve the target correlated color temperature (CCT). A system for fabricating light emitting diode (LED) dice includes a coating system, a monitoring system, and a control system configured to control the coating system to adjust the correlated color temperature (CCT) of the wavelength conversion material on the transparent substrate to achieve the target correlated color temperature (CCT).
    Type: Application
    Filed: July 31, 2012
    Publication date: March 14, 2013
    Applicant: SEMILEDS OPTOELECTRONICS CO., LTD.
    Inventors: Jui-Kang Yen, Georg Soerensen, Mark Ewing Tuttle
  • Patent number: 8394708
    Abstract: A method and system for assembling a quasicrystalline heterostructure. A plurality of particles is provided with desirable predetermined character. The particles are suspended in a medium, and holographic optical traps are used to position the particles in a way to achieve an arrangement which provides a desired property.
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: March 12, 2013
    Assignees: New York University, The Trustees of Princeton University
    Inventors: David G. Grier, Yael Roichman, Weining Man, Paul Michael Chaikin, Paul Joseph Steinhardt
  • Publication number: 20130056791
    Abstract: A semiconductor device manufacturing apparatus is provided with a drawing pattern printing part having a print head which injects a conductive solvent, an insulative solvent and an interface treatment solution. The print head is formed in such a way that desired circuit drawing pattern can be printed on a wafer based on information on the drawing pattern from a wafer testing part, information on the wafer from a storage part and coordinate information from a chip coordinate recognition part. In a semiconductor device manufacturing method according to the present invention, a semiconductor device is manufactured by using the semiconductor device manufacturing apparatus in such a manner that desired circuits are formed through printing process. In the semiconductor device, pad electrodes and so on are formed in such a way that trimming process can be conducted by printing circuit drawing patterns.
    Type: Application
    Filed: November 1, 2012
    Publication date: March 7, 2013
    Inventors: Kazuhiro SHIMIZU, Hajime Akiyama, Naoki Yasuda
  • Publication number: 20130052755
    Abstract: A method includes etching a low-k dielectric layer on a wafer to form an opening in the low-k dielectric layer. An amount of a detrimental substance in the wafer is measured to obtain a measurement result. Process conditions for baking the wafer are determined in response to the measurement result. The wafer is baked using the determined process conditions.
    Type: Application
    Filed: August 26, 2011
    Publication date: February 28, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Cheng Chou, Chung-Chi Ko, Keng-Chu Lin, Shwang-Ming Jeng
  • Publication number: 20130052756
    Abstract: A heating device is provided according to an embodiment. The heating device comprises a heater, a temperature detecting part, a wafer warpage detecting part and a controlling part. The heater heats a wafer. The temperature detecting part detects a temperature of the wafer. The wafer warpage detecting part detects warpage of the wafer. The controlling part controls the heater based on a detection result of the wafer warpage detecting part before controlling the heater based on a detection result of the temperature detecting part.
    Type: Application
    Filed: August 9, 2012
    Publication date: February 28, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shintaro Okujo, Masato Fukumoto
  • Publication number: 20130052757
    Abstract: Methods for optimizing a plasma process are provided. The method may include obtaining a measurement spectrum from a plasma reaction in a chamber, calculating a normalized measurement standard and a normalized measurement spectrum of the measurement spectrum, comparing the normalized measurement spectrum with a normalized reference spectrum, and comparing the normalized measurement standard with a normalized reference standard to determine whether to change a process parameter of the plasma process or clean the chamber when the normalized measurement spectrum and the normalized reference spectrum are mismatched.
    Type: Application
    Filed: August 30, 2012
    Publication date: February 28, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sangwuk Park, Kye Hyun Baek, Kyoungsub Shin, Brad H. Lee
  • Publication number: 20130045546
    Abstract: An efficient method of detecting defects in metal patterns on the surface of wafers. Embodiments include forming a metal pattern on each of a plurality of wafers, polishing each wafer, and analyzing the surface of the metal pattern on each polished wafer for the presence of defects in the metal pattern by analyzing an optical across-wafer endpoint signal, generated at the endpoint of polishing. Embodiments include determining the location of defects in the metal pattern by determining the position of non-uniformities in the optical-across-wafer endpoint signal.
    Type: Application
    Filed: August 16, 2011
    Publication date: February 21, 2013
    Applicant: GLOBALFOUNDRIES INC.
    Inventor: Mike Schlicker
  • Patent number: 8377721
    Abstract: A substrate processing system includes a resist pattern forming apparatus including modules each configured to perform a predetermined process on a substrate with an underlying film formed thereon, an etched pattern forming apparatus including chambers each configured to perform patterning of the underlying film by use of a resist pattern as a mask, and examination devices configured to perform measurement and examination of a pattern attribute rendered on a substrate after a process in the resist pattern forming apparatus and after a process in the etched pattern forming apparatus. A controller is preset to utilize measurement results and transfer data to calculate correction value ranges respectively settable in the modules and the chambers and to determine combinations of the modules and the chambers such that corrections made within the correction value ranges cause a pattern attribute to approximate a predetermined value for each of the substrates.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: February 19, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Tsuyoshi Shibata, Eiichi Nishimura
  • Patent number: 8372296
    Abstract: Provided is a manufacturing method for a thermal head, including: bonding a flat upper substrate in a stacked state onto a flat supporting substrate including a heat-insulating concave portion open to one surface thereof so that the heat-insulating concave portion is closed (bonding step (SA2)); thinning the upper substrate bonded onto the supporting substrate by the bonding step (SA2) (plate thinning step (SA3)); measuring a thickness of the upper substrate thinned by the plate thinning step (SA3) (measurement step (SA4)); deciding a target resistance value of heating resistors based on the thickness of the upper substrate, which is measured by the measurement step (SA4) (decision step (SA5)); and forming, at positions of a surface of the upper substrate thinned by the plate thinning step (SA3), the heating resistors having the target resistance value determined by the decision step (SA5), the positions being opposed to the heat-insulating concave portion (resistor forming step (SA6)).
    Type: Grant
    Filed: August 3, 2010
    Date of Patent: February 12, 2013
    Assignee: Seiko Instruments Inc.
    Inventors: Noriyoshi Shoji, Norimitsu Sanbongi, Toshimitsu Morooka, Keitaro Koroishi
  • Patent number: 8367433
    Abstract: A technique is provided which can exactly recognize a chip to be picked up when picking up the chip from a wafer sheet in a process of die bonding a thin chip. A camera is coupled to one end of a lens barrel, an objective lens is attached to an opposite end of the lens barrel, and an image of a main surface of a chip is photographed through the objective lens. A surface-emitting lighting unit, a diffusing plate and a half mirror are internally provided between the lens barrel and the chip. Further, another lens barrel having a coaxial drop lighting function of radiating light to the main surface of the chip along the same optical axis as that of the camera is disposed.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: February 5, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Hideharu Kobashi, Hiroshi Maki, Masayuki Mochizuki, Yoshiaki Makita
  • Publication number: 20130029435
    Abstract: A laser resonator and method for forming the laser resonator are provided. The method comprises placing a housing for the laser resonator in an alignment fixture, attaching a bond plate to an optical component of the laser resonator, attaching a first end of an alignment arm to the bond plate attached to the optical component, attaching a second end of the alignment arm to the alignment fixture such that the optical component is disposed over the housing, aligning, via the alignment fixture and the alignment arm, the optical component relative to the housing, and bonding the aligned optical component to the housing. The first end of the alignment arm may removed once the aligned optical component is bonded to the housing.
    Type: Application
    Filed: October 1, 2012
    Publication date: January 31, 2013
    Applicant: DRS RSTA, INC.
    Inventor: DRS RSTA, INC.
  • Publication number: 20130029434
    Abstract: A method of fabricating a semiconductor device includes performing a first period of operation and a second period of operation at first equipment and second equipment. The first period of operation includes performing a first patterning process at each of the first equipment and the second equipment, generating first inspection data of the first equipment and first inspection data of the second equipment, generating first differential data of the second equipment including differentials of the first inspection data of the first equipment and the first inspection data of the second equipment, and calibrating a configuration of the second equipment with reference to the first differential data of the second equipment.
    Type: Application
    Filed: July 23, 2012
    Publication date: January 31, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Jang-Sun KIM
  • Patent number: 8361819
    Abstract: Methods of fabricating of a light-emitting device are provided, the methods include forming a plurality of light-emitting units on a substrate, measuring light characteristics of the plurality of light-emitting units, respectively, depositing a phosphor layer on the plurality of light-emitting units using a printing method, and cutting the substrate to separate the plurality of light-emitting units into unit by unit. The phosphor layer is adjustably deposited according to the measured light characteristics of the plurality of light-emitting units.
    Type: Grant
    Filed: October 13, 2011
    Date of Patent: January 29, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yu-Sik Kim
  • Patent number: 8361818
    Abstract: A method of forming an optical sensor includes the following steps. A substrate is provided, and a read-out device is formed on the substrate. a first electrode electrically connected to the read-out device is formed on the substrate. a photosensitive silicon-rich dielectric layer is formed on the first electrode, wherein the photosensitive silicon-rich dielectric layer comprises a plurality of nanocrystalline silicon crystals. A second electrode is formed on the photosensitive silicon-rich dielectric layer.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: January 29, 2013
    Assignee: AU Optronics Corp.
    Inventors: An-Thung Cho, Chia-Tien Peng, Kun-Chih Lin
  • Patent number: 8357558
    Abstract: A method of making a semiconductor light-emitting device involves the steps of selecting at least one tilt angle for a primary surface of a substrate to evaluate the direction of piezoelectric polarization in a light-emitting layer, the substrate comprising a group III nitride semiconductor; preparing a substrate having the primary surface, the primary surface having the selected tilt angle, and the primary surface comprising the group III nitride semiconductor; forming a quantum well structure and p- and n-type gallium nitride semiconductor layers for the light-emitting layer at the selected tilt angle to prepare a substrate product; measuring photoluminescence of the substrate product while applying a bias to the substrate product, to determine bias dependence of the photoluminescence; evaluating the direction of the piezoelectric polarization in the light-emitting layer at the selected tilt angle on the primary surface of the substrate by the determined bias dependence; determining which of the primary sur
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: January 22, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Kyono, Yohei Enya, Yusuke Yoshizumi, Katsushi Akita, Masaki Ueno, Takamichi Sumitomo, Masahiro Adachi, Shinji Tokuyama
  • Patent number: 8350305
    Abstract: A solid-state imaging device is provided. The solid-state imaging device includes: pixels arrayed; a photoelectric conversion element in each of the pixels; a read transistor for reading electric charges photoelectrically-converted in the photoelectric conversion elements to a floating diffusion portion; a shallow trench element isolation region bordering the floating diffusion portion; and an impurity diffusion isolation region for element isolation regions other than the shallow trench element isolation region.
    Type: Grant
    Filed: January 4, 2008
    Date of Patent: January 8, 2013
    Assignee: Sony Corporation
    Inventors: Kazuichiro Itonaga, Yu Oya
  • Publication number: 20120322169
    Abstract: A focus through a projection lens is corrected to prevent the occurrence of a dimensional error in a pattern due to defocusing. At least one automatic focus correction mark is formed over each of chip patterns formed in a reticle used for exposure. Using one of the automatic focus correction marks located in the center portion of an actual device region, automatic correction of the focus of exposure light is performed. In this manner, a variation in the focus of the exposure light through the center portion of the projection lens, which is more likely to reach a high temperature than an end portion of the projection lens, is detected and corrected.
    Type: Application
    Filed: June 15, 2012
    Publication date: December 20, 2012
    Inventors: Naoyuki TERAMOTO, Megumu FUKAZAWA, Masayuki KUMASHIRO, Kiyoshi KAWAGASHIRA
  • Publication number: 20120301976
    Abstract: A method for manufacturing an SOI wafer that has an SOI layer formed on a buried insulator layer and that is to be used in a device fabrication process or an inspection process including a process of controlling a position of the SOI wafer on the basis of intensity of reflected light from the SOI wafer when the SOI wafer is irradiated with light having a wavelength ?. The method includes the steps of: designing a thickness of the buried insulator layer of the SOI wafer on the basis of the wavelength ? of the light for use in the process of controlling the position that is to be implemented on the SOI wafer after manufacturing; and fabricating the SOI wafer having the SOI layer formed on the buried insulator layer having the designed thickness.
    Type: Application
    Filed: February 3, 2011
    Publication date: November 29, 2012
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventor: Susumu Kuwabara
  • Patent number: 8319301
    Abstract: An image sensor includes at least one photosensitive element disposed in a semiconductor substrate. Metal conductors may be disposed on the semiconductor substrate. A filter may be disposed between at least two individual metal conductors and a micro-lens may be disposed on the filter. There may be insulator material disposed between the metal conductors and the semiconductor substrate and/or between individual metal conductors. The insulator material may be removed so that the filter may be disposed on the semiconductor substrate.
    Type: Grant
    Filed: February 11, 2008
    Date of Patent: November 27, 2012
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hsin-Chih Tai, Duli Mao, Vincent Venezia, WeiDong Qian, Ashish Shah, Howard E. Rhodes
  • Patent number: 8309371
    Abstract: A system and method include forming an optical cavity by positioning a photonic crystal a predetermined distance from a substrate, and creating, within the cavity, a standing wave having a substantially flat wavefront. The standing wave may be created by applying an input wave to a first surface of the photonic crystal. The predetermined distance may be such that a peak intensity of the standing wave is proximate to or a calculated distance from the substrate surface. The peak intensity may vary in relation to the substrate surface. The method may include tuning the peak intensity location within the cavity by shifting the wavelength of the input wave or altering the characteristics of the photonic crystal by an external field. A second photonic crystal may be used on the other side of the substrate to replace the reflecting properties of the substrate, allowing for further smoothing of the wavefront.
    Type: Grant
    Filed: July 21, 2009
    Date of Patent: November 13, 2012
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Paul R. De La Houssaye, J. Scott Rodgers
  • Patent number: 8304261
    Abstract: A thermal treatment apparatus having a first light source emitting a first light having light diffusion property, a reflectance measuring unit irradiating a treatment target with the light from plural directions by the first light source and determining a light reflectance of the treatment target, a light irradiation controller adjusting an intensity of a second light of a second light source on the basis of the light reflectance, the second light has diffusion property, and a thermal treatment unit irradiating the treatment target with the second light having adjusted the intensity of the second light by the light irradiation controller.
    Type: Grant
    Filed: March 15, 2011
    Date of Patent: November 6, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Tomohiro Kubo
  • Patent number: 8298837
    Abstract: A system and method of increasing productivity of OLED material screening includes providing a substrate that includes an organic semiconductor, processing regions on the substrate by combinatorially varying parameters associated with the OLED device production on the substrate, performing a first characterization test on the processed regions on the substrate to generate first results, processing regions on the substrate in a combinatorial manner by varying parameters associated with the OLED device production on the substrate based on the first results of the first characterization test, performing a second characterization test on the processed regions on the substrate to generate second results, and determining whether the substrate meets a predetermined quality threshold based on the second results.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: October 30, 2012
    Assignee: Intermolecular, Inc.
    Inventors: Yun Wang, Tony P. Chiang, Chi-I Lang
  • Publication number: 20120268722
    Abstract: In one an embodiment, there is provided an assembly comprising at least one detector. Each of the at least one detector includes a substrate having a doped region of a first conduction type, a layer of dopant material of a second conduction type located on the substrate, a diffusion layer formed within the substrate and in contact with the layer of dopant material and the doped region of the substrate, wherein a doping profile, which is representative of a doping material concentration of the diffusion layer, increases from the doped region of the substrate to the layer of dopant material, a first electrode connected to the layer of dopant material, and a second electrode connected to the substrate. The diffusion layer is arranged to form a radiation sensitive surface.
    Type: Application
    Filed: February 17, 2012
    Publication date: October 25, 2012
    Applicant: ASML Netherlands B.V.
    Inventors: Stoyan NIHTIANOV, Arie Johan Van Der Sijs, Bearrach Moest, Petrus Wilhelmus Josephus Maria Kemper, Marc Antonius Maria Haast, Gerardus Wilhelmus Petrus Baas, Lis Karen Nanver, Francesco Sarubbi, Antonius Andreas Johannes Schuwer, Gregory Micha Gommeren, Martijn Pot, Thomas Ludovicus Maria Sholtes
  • Patent number: 8293547
    Abstract: An embodiment of a method to form a hybrid integrated circuit device is described. This embodiment of the method comprises: forming a first die using a first lithography, where the first die is on a substrate; and forming a second die using a second lithography, where the second die is on the first die. The first lithography used to form the first die is a larger lithography than the second lithography used to form the second die. The first die is an IO die.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: October 23, 2012
    Assignee: Xilinx, Inc.
    Inventors: James Karp, Steven P. Young, Bernard J. New, Scott S. Nance, Patrick J. Crotty
  • Publication number: 20120264236
    Abstract: A fluorescence powder spraying device capable of detecting instantly color temperature of white light in a manufacturing process, comprising: a spraying region, provided with a movable nozzle and an LED component-to-be-sprayed; a measuring region, provided with a light source and a light detector; and a monitor plate, which can be moved in said spraying region and said measuring region. Said monitor plate undergoes at least a fluorescence powder spraying process with said LED components-to-be-sprayed in said spraying region, to form at least a fluorescence powder layer, and in said measuring region, use said light source to agitate said fluorescence powder layer on said monitor plate, and use said light detector to measure color temperature of white light, to detect speedily color temperature of said fluorescence powder layer, hereby raising. yield of LED component reaching the target color temperature.
    Type: Application
    Filed: April 13, 2012
    Publication date: October 18, 2012
    Applicant: CHANG GUNG UNIVERSITY
    Inventors: LIANN-BE CHANG, CHIA-YI YEN, YUAN-HSIAO CHANG
  • Publication number: 20120238041
    Abstract: A light emitting device is produced by depositing a layer of wavelength converting material over the light emitting device, testing the device to determine the wavelength spectrum produced and correcting the wavelength converting member to produce the desired wavelength spectrum. The wavelength converting member may be corrected by reducing or increasing the amount of wavelength converting material. In one embodiment, the amount of wavelength converting material in the wavelength converting member is reduced, e.g., through laser ablation or etching, to produce the desired wavelength spectrum.
    Type: Application
    Filed: June 4, 2012
    Publication date: September 20, 2012
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: STEVEN PAOLINI, MICHAEL D. CAMRAS, OSCAR ARTURO CHAO PUJOL, FRANK M. STERANKA, JOHN E. EPLER
  • Publication number: 20120231558
    Abstract: A method and system are disclosed for determining at least one optical characteristic of a substrate, such as a semiconductor wafer. Once the optical characteristic is determined, at least one parameter in a processing chamber may be controlled for improving the process. For example, in one embodiment, the reflectivity of one surface of the substrate may first be determined at or near ambient temperature. From this information, the reflectance and/or emittance of the wafer during high temperature processing may be accurately estimated. The emittance can be used to correct temperature measurements using a pyrometer during wafer processing. In addition to making more accurate temperature measurements, the optical characteristics of the substrate can also be used to better optimize the heating cycle.
    Type: Application
    Filed: March 9, 2012
    Publication date: September 13, 2012
    Applicant: Mattson Technology, Inc
    Inventor: Paul Janis Timans
  • Publication number: 20120231560
    Abstract: A semiconductor light-emitting device having a thinned structure comprises a thinned structure formed between a semiconductor light-emitting structure and a carrier. The manufacturing method comprises the steps of forming a semiconductor light-emitting structure above a substrate; attaching the semiconductor light-emitting structure to a support; thinning the substrate to form a thinned structure; forming or attaching a carrier to the thinned substrate; and removing the support.
    Type: Application
    Filed: May 23, 2012
    Publication date: September 13, 2012
    Inventors: Min-Hsun Hsieh, Chih-Chiang Lu, Chien-Yuan Wang, Yen-Wen Chen, Jui-Hung Yeh, Shih-Chin Hung, Yu-Wei Tu, Chun-Yi Wu, Wei-Chih Peng