Particular Function Performed Patents (Class 708/3)
  • Patent number: 6073149
    Abstract: A computational circuit for a multi-value addition comprising a parallel adder, an output adder, a quantizing portion and a logic conversion portion. Addition circuits in the above adders and thresholding circuits in the above quantizing portion consist of voltage-driven circuits including capacitive couplings.
    Type: Grant
    Filed: April 15, 1998
    Date of Patent: June 6, 2000
    Assignee: Yozan, Inc.
    Inventors: Guoliang Shou, Kazunori Motohashi, Ying Chen, Takashi Tomatsu, Changming Zhou, Jie Chen
  • Patent number: 6070178
    Abstract: A random number generator for generating random numbers. The generator may include two similarly implemented random signal sources, with each source generating a random signal. A difference signal of the two random signals is generated with the result that any common interference signal components are eliminated.
    Type: Grant
    Filed: February 17, 1999
    Date of Patent: May 30, 2000
    Assignee: Starium LTD
    Inventors: Thomas Harris Anderson, Eric Arden Blossom
  • Patent number: 6035314
    Abstract: The reliability of solutions of simultaneous algebraic equations with integral coefficients is improved and high-speed information processing is realized. A method processes information wherein, in a model in which restrictions among parameters are given by simultaneous algebraic equations with integral coefficients, when the simultaneous equations have only a finite number of solutions, zero points of a polynomial set F with integral coefficients, which represents the simultaneous equations and is described in a memory, are represented by rational expressions based on zero points of a one-variable polynomial regarding one variable so that the information is represented using the representation of rational expression. The method processes information by choosing a term order, calculates a Grobner basis, calculates a minimum polynomial f1, and controls a digital processor to find solutions represented by rational expressions.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: March 7, 2000
    Assignee: Fujitsu Limited
    Inventor: Masayuki Noro
  • Patent number: 6032166
    Abstract: A desired programmable complex analog bandpass filter is replaced by a "black box" that receives an analog continuous-time signal and delivers an analog continuous-time signal, just as the analog filter would, but internally realizes the programmability with a programmable discrete-time system. The transfer function of the "black box" is the same as the transfer function of the analog filter. The "black box" includes an anti-aliasing filter, an A/D-converter, a complex digital bandpass filter (16), a D/A-converter (18) and an anti-imaging filter (20).
    Type: Grant
    Filed: February 10, 1998
    Date of Patent: February 29, 2000
    Assignee: Telefonaktiebolaget LM Ericsson
    Inventors: Svante Signell, Thorsten Schier
  • Patent number: 6003051
    Abstract: The cut-off frequency and boost value of an analog filter on a read channel is set to initial values When the data is read from a disk, the read data is subjected to PR equalization at an FIR filter. At that time, a learning function provided on the FIR filter adjusts the tap coefficient so that an equalization error may be minimized. The cut-off frequency and boost value of the analog filter are modified until the adjusted tap coefficient has gone in a permitted range. After the tap coefficient of the FIR filter has gone in the permitted range, the cut-off frequency and boost value are stored in an EEPROM so that they can be used in a normal mode.
    Type: Grant
    Filed: March 9, 1998
    Date of Patent: December 14, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Akifumi Okazaki
  • Patent number: 5931898
    Abstract: A finite impulse response filter uses rotating tap weights that are connected in turn to a succession of sample/hold (S/H) cells in each of which is held a separate successive sample of an analog balanced signal being filtered for an interval long enough to tap to each tap weight in one rotation. Each of the S/H cells is a switched-current memory cell and includes a primary negative feedback transconductance differential amplifier and a primary pair of storage capacitors and a secondary positive feedback transconductance differential amplifier and a secondary pair of storage capacitors. Charge injection errors created in each primary amplifier are replicated in an associated secondary amplifier and used to cancel these errors to provide higher fidelity samples for summing for forming the output of the filter.The tap weights are provided by binary-ratioed resistors provided by transistors of binary-ratioed transconductances.
    Type: Grant
    Filed: February 25, 1997
    Date of Patent: August 3, 1999
    Inventor: John M. Khoury