Abstract: Disclosed are computers and methods employing a mechanism for eliminating a race condition between a hypervisor-performed emulation process and a concurrent translation table entry invalidation. Specifically, on a host machine, a hypervisor controls any guest operating systems. In doing so, the hypervisor emulates an instruction by performing a translation operation to acquire a physical address from a virtual address and, if applicable, further from an effective address using translation table(s) (e.g., page tables and, if applicable, segment tables); accesses the physical address; and completes the instruction. During emulation, flagged address table(s) are used to eliminate the race condition. For example, upon receiving an invalidate translation instruction associated with a virtual address, a determination is made as to whether or not the virtual address appears in a flagged virtual address table and, if so, additional action is taken to prevent an error in the translation.

Abstract: Technologies involving portable devices, such as smartphones and tablet computers, are disclosed. One arrangement enables a creator of content to select software with which that creator's content should be rendered—assuring Continuity between artistic intention and delivery. Another uses the camera of a smartphone to identify nearby subjects, and take actions based thereon. Others rely on near field chip (RFID) identification of objects, or on identification of audio streams (e.g., music, voice). Some technologies concern improvements to the user interfaces associated with such devices. Others involve use of these devices in shopping, text entry, sign language interpretation, and vision-based discovery. Still other improvements are architectural in nature, e.g., relating to evidence-based state machines, and blackboard systems. Yet other technologies concern use of linked data in portable devices—some of which exploit GPU capabilities. Still other technologies concern computational photography.

Abstract: A memory controller includes logical-physical address conversion table, an access number storing section configured to store the number of accesses to read out data from a memory cell in association with a logical address, a storage state checking section configured to check a storage state of data stored in the memory cell at every predetermined number of accesses, and a refresh processing section configured to perform refresh processing to restore the data stored in the memory cell if the storage state of the data is in a predetermined degraded state.

Abstract: A method and device for processing files of distributed file system are disclosed, in which the method involves dividing the file into at least one data group according to the size of the file, and determining first mapping information from the file to the at least one data group, in which each of the at least one data group includes content blocks and verification block of file, and determining second mapping information from each of the at least one data group to data storage servers storing the each of the at least one data group (102), and providing the first mapping information and the second mapping information to a client for executing a writing operation of files (103). The technical solution can improve availability of memory space and decrease costs of constructing a distributed file system.

Abstract: A method of extending a virtual address space of a process executed in an operating system includes selecting a virtual address range included in a virtual address space corresponding to the process and the number of a plurality of extended virtual address ranges, extending and thereby setting the virtual address space to a multi-virtual address space based on the selected virtual address range and the selected number of the plurality of extended virtual address ranges, and providing the multi-virtual address space to the process.

Abstract: A computer executed method is disclosed for sorting a plurality of internet protocol (IP) addresses. The method includes dividing the range of IP addresses into a plurality of clusters representing a plurality of contiguous sub-ranges, assigning each IP address to the cluster associated with the sub-range that includes that IP address, and assigning the IP addresses in each cluster to one of a plurality of pages. If one of the pages has a size less than a page size limit, the method includes duplicating on that page at least one of the IP addresses assigned to that page. For each page, the IP addresses assigned to that page are ordered by numeric value. A network appliance incorporating aspects of the method is also disclosed.

Abstract: A non-volatile memory (NVM) apparatus and an operation method thereof are provided. A mapping table in a main memory is divided into a plurality of sub-mapping tables according to logical address groups. When an access command of a host is processed by the NVM apparatus, at least one corresponding sub-mapping table is selected from the sub-mapping tables according to a logical address of the access command. If the at least one corresponding sub-mapping table is required to be rebuilt, then the at least one corresponding sub-mapping table is rebuilt, and the logical address of the access command is converter for accessing the NVM apparatus according to the at least one corresponding sub-mapping table which has been rebuilt.

Abstract: A memory system is constituted of a file storage flash memory storing a control program required for a control portion and a large amount of data, and a random access memory storing a program used by the control portion and functioning as a buffer memory for received data. Thus, a memory system for a portable telephone capable of storing a large amount of received data at high-speed and allowing reading of the stored data at high-speed is provided.

Abstract: An access instruction which includes a logical block address (LBA) is received. A first-level table is accessed to obtain a first-level table entry associated with the LBA. From the first-level table entry, a location associated with a second-level table on solid state storage media is determined. The second-level table is accessed at the determined location to obtain a second-level table entry associated with the LBA. From the second-level table entry, a physical block address corresponding to the logical block address is determined.

Abstract: Methods and apparatus for supporting dual casting of inbound system memory writes from PCIe devices to memory and a peer PCIe device. An inbound system memory write request from a first PCIe device is received at a PCIe root complex and the memory address is inspected to determine whether it falls within an address window defined for dual casting operations. If it does, an IO write request is generated from the inbound system memory write request and sent to a second PCIe device associated with the address window. During a parallel operation, the original inbound system memory write request is forwarded to a system agent configured to receive such write requests.

Abstract: Methods, systems, and computer readable media for updating sequence and acknowledgment numbers associated with replay packets are disclosed. In one example, a method includes generating, at a sending peer node, a replay packet that includes a payload associated with a capture file packet and accessing, in the sending peer node, a sequence-differential (SEQ-DIFF) list using an original sequence number associated with the replay packet. The method further includes traversing entries in the SEQ-DIFF list, wherein each of the entries includes a sequence number and a payload length differential value, applying, for each traversed entry in the SEQ-DIFF list, the payload length differential value to the original sequence number to determine an updated sequence number for the replay packet, and transmitting, from the sending peer node to a receiving peer node, the replay packet that includes the updated sequence number.

Abstract: A wireless mobile device includes a configurable co-processor core(s). The wireless mobile device also includes a multi-core central processing unit coupled to a memory and the configurable co-processor core(s). The multi-core central processing unit may select from a set of hardware accelerators according to a user's use pattern. The wireless mobile device also includes a hardware controller that reconfigures the configurable co-processor core(s) according to a selected hardware accelerator.

Abstract: A method and system for managing network addresses of a guest during live migration in a virtual machine system. A computer system hosts a guest that is to migrate from a source hypervisor in the computer system to a target hypervisor during operation of the computer system. In response to the indication, the source hypervisor retrieves an address list of the guest from a network device, where the address list identifies one or more network addresses of the guest in one or more networks. The source hypervisor then forwards the address list to the target hypervisor, which notifies the one or more networks of the migration of the guest.

Abstract: Embodiments of the present invention provide methods, systems, and apparatuses configured to receive or retrieve markup data associated with a message formatted for two-dimensional (2D) rendering, virtually render, by a first rendering module, the message in a non-displayed image in accordance with the markup data, and render, by a second rendering module, a three-dimensional (3D) object in a 2D display environment including texturing the non-displayed image on a surface of the 3D object in order to render the message. Other embodiments are also described.

Abstract: Aspects of bandwidth conservation include accumulating, in a memory device, inputs received over time and identifying a historical pattern from the inputs. The historical pattern includes a channel change operation when data streamed over a network and received is a commercial. Aspects also include determining whether a next input is expected for currently streamed data. The determining is in response to the historical pattern and whether the currently streamed data is commercial-free content. Aspects further include predicting that the user is not present at an electronic device if the next input to the user interface is expected and is not received, predicting that the user is present and the next input is not expected if the currently streamed data is the commercial-free content, and conserving bandwidth, with respect to the currently streamed data, in response to predicting that the user is not present at the electronic device.

Abstract: According to an embodiment, a semiconductor storage device includes a first storage unit, a read control unit, a second storage unit, and a write control unit. The first storage unit is configured to store data supplied from a host device. The read control unit is configured to perform control of reading the data in accordance with a read request. The second storage unit is configured to store a logical address used for reading the data from the first storage unit by the read control unit. The write control unit is configured to perform control of adding the stored logical address to the data and write the resulting data into the first storage unit in a case where a size of the data requested to be written into the first storage unit by the host device is smaller than a threshold.

Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.

Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.

Abstract: Systems and techniques relating to storage technologies include, according to an aspect, a data processing apparatus including: a processor; a controller coupled with the processor; a solid state drive coupled with the controller; and a mass storage drive coupled with the controller; wherein at least a portion of the solid state drive and the mass storage drive are virtualized as a single physical storage drive; wherein multiple applications stored in the virtualized single physical storage drive are configured to run on the processor; wherein one or more applications in a hot application group are stored in the solid state drive, and one or more applications in a cold application group are stored in the mass storage drive; and wherein each of the multiple applications is actively monitored and placed in either the hot application group or the cold application group.

Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.

Abstract: One method includes assigning a pointer from multiple logical blocks to the same original physical block if the multiple logical blocks include the same data. The method further includes receiving a command to write data to the first logical block and determining if the first logical block is a frequently accessed logical block. If the first logical block is a frequently accessed logical block, ownership of the original physical block is assigned to the first logical block. If ownership is established, the method includes copying any data stored in the original physical block to a new physical block, assigning a pointer from a second logical block to the new physical block, and performing the write command on the original physical block. A system includes a processor for performing the above method. One computer program product includes computer code for performing the method described above.

Abstract: An apparatus for controlling a storage system having a data replication function, comprises: a storage array component being operable to send notification to a replication engine that a write of data to a primary storage location by a host is subject to data replication; the replication engine being operable to receive the notification and in response to instruct the storage array to copy the data to a secondary storage location; wherein the data is copied to the secondary storage location unmediated by the replication engine.

Abstract: A method for tracking resizing and recreation of volumes in a block-based snapshot backup program. In an embodiment, a record ID is associated with a major and minor number assigned to each volume to be backed up. The record ID maintains a unique reference to the bitmap corresponding to a backed up volume in case the minor number is reused by the volume manager driver during a recreate operation. The length of the volume to be maintained is maintained and compared to the length of the to track any resizing of the volume by the volume manager. In the event of any resizing or recreation, the original bitmap can be replaced with an updated bitmap to ensure proper backup of the resized or recreated volumes.

Abstract: Various embodiments of the present invention are generally directed to an apparatus and associated method for updating data in a non-volatile memory array. In accordance with some embodiments, a memory block is formed with a plurality of types of memory cell sectors arranged in data pages of a first type and log pages of a second type that can be updated in-place. A first updated sector is written to a first log page while maintaining an outdated sector in an original data page, and overwritten with a second updated sector.

Abstract: Tracking storage resources includes providing a table containing storage resources along with capabilities and statuses thereof, updating the table in response to a change of status of a storage resource, updating the table in response to a change in capabilities of a storage resource and, in response to an inquiry for a storage resource having a particular capability, searching the table for a storage resource having the particular capability. Tracking storage resources may also include adding an element to the table in response to a new resource being added to the system. The capabilities may include RAID striping, data deduplication, and green operation. The status may be one of: on-line, off-line, and full.

Abstract: An apparatus includes a storage device and a host device. The storage device may be configured to encrypt and decrypt user data during write and read operations, respectively. The host device is communicatively coupled to the storage device. The host device may be configured to execute the write and read operations by concentrating a first number of virtual bands into a second number of real bands, wherein said second number is smaller than said first number.

Abstract: Virtualization technologies can be adapted to allow a single physical computing machine to be shared among multiple virtual networks by providing one or more virtual machines simulated in software by the single physical computing machine, with each virtual machine acting as a distinct logical computing system. Virtual network instances with overlapping network addresses can be supported on the same computing system, allowing users to specify the virtual network in greater detail. Techniques are described for programmatically provisioning virtual networks. Each virtual network can have its own virtual address space, allowing multiple networks to have overlapping address spaces. The virtual IP addresses or other addresses for one or more components of a virtual network could share the same address but still operate without interfering with each other.

Abstract: A mechanism for memory change tracking during migration of a virtual machine (VM) with VM-controlled assigned peripherals is disclosed. A method of the invention includes informing a write tracking module of an interest by a hypervisor of a host machine in a specific memory location associated with a peripheral device that is controlled by a VM managed by the hypervisor, receiving notification from the write tracking module that the identified specific memory location has been modified by the peripheral device, and marking a memory page of the specific identified memory location as dirty in order for the migration of the memory page to be repeated as part of a migration process of the VM to a destination host machine.

Abstract: Various embodiments of methods and systems for hardware (“HW”) based dynamic memory management in a portable computing device (“PCD”) are disclosed. One exemplary method includes generating a lookup table (“LUT”) to track each memory page located across multiple portions of a volatile memory. The records in the LUT are updated to keep track of data locations. When the PCD enters a sleep state to conserve energy, the LUT may be queried to determine which specific memory pages in a first portion of volatile memory (e.g., an upper bank) contain data content and which pages in a second portion of volatile memory (e.g., a lower bank) are available for receipt of content. Based on the query, the location of the data in the memory pages of the upper bank is known and can be quickly migrated to memory pages in the lower bank which are identified for receipt of the data.

Abstract: A server constituted by a plurality of processors which process page description language data receives a print instruction from a client, and decides the number of layers into which a page is to be segmented based on render instructions included in the page description language data. The server decides the number of processors which perform parallel processing of the generation of print data from the page description language data based on the decided number of layers. The server generates print data equal in number to the number of layers based on which the number of processors is decided. An output device requests the server to transmit print data. The server transmits print data in accordance with the request from the output device. Upon receiving the print data from the server, the output device processes the print data and outputs it onto a sheet.

Abstract: System and method for conversion of virtual machine files without requiring copying of the virtual machine payload (data) from one location to another location. By eliminating this step, applicant's invention significantly enhances the efficiency of the conversion process. In one embodiment, a file system or storage system provides indirections to locations of data elements stored on a persistent storage media. A source virtual machine file includes hypervisor metadata (HM) data elements in one hypervisor file format, and virtual machine payload (VMP) data elements.

Abstract: A dispersed storage (DS) unit for use within a dispersed storage network is capable of self-configuring using registry information provided to the DS unit. The registry information includes a slice name assignment indicating a range of slice names corresponding to a plurality of potential data slices of potential data objects to be stored in the DS unit. Based on the registry information, the DS unit allocates a portion of physical memory to store the potential data slices.

Abstract: A mass storage system employs a paging table for memory page redirection and maintains the paging table for power loss recovery (PLR) using a FIFO queue of paging table (L2P) segments to be written to non-volatile memory. The FIFO queue identifies a sequence of the L2P segments in conjunction with sequence number and marking data of the affected segments for recreating the paging table. Upon power failure, a power loss recovery (PLR) mechanism scans for the last segment written based on the FIFO queue. The PLR process recovers unwritten paging table entries by replaying the corresponding changes in the order defined by the sequence numbers. The recovery process continues for each sequence number in the current context, until the L2P information in the paging table is recreated to the point just prior to power loss.

Abstract: A method for managing a memory apparatus including at least one non-volatile (NV) memory element includes: providing at least one block of the memory apparatus with at least one local page address linking table within the memory apparatus, wherein the at least one local page address linking table includes linking relationships between at least one physical page address of the at least one block and at least one logical page address; and building a global page address linking table of the memory apparatus according to the at least one local page address linking table.

Abstract: Functionality is described herein for memory-mapping an information unit (such as a file) into virtual memory by associating shared virtual memory resources with the information unit. The functionality then allows processes (or other entities) to interact with the information unit via the shared virtual memory resources, as opposed to duplicating separate private instances of the virtual memory resources for each process that requests access to the information unit. The functionality also uses a single level of address translation to convert virtual addresses to corresponding physical addresses. In one implementation, the information unit is stored on a bulk-erase type block storage device, such as a flash storage device; here, the single level of address translation incorporates any address mappings identified by wear-leveling and/or garbage collection processing, eliminating the need for the storage device to perform separate and independent address mappings.

Abstract: A diagnostic tool sends a request format designating a virtual address, which is different from a real address for an EEPROM. When a microcomputer determines that an address designated by the received request format is a virtual address assigned to the EEPROM, the microcomputer executes a process, which is designated by the received request format, with respect to the virtual address assigned to the EEPROM.

Abstract: Read requests to a commonly accessed storage volume are conditionally issued, depending on whether or not a requested data block is already stored in memory from a prior access or to be stored in memory upon completion of a pending request. A data structure is maintained in memory to track physical memory pages and to indicate for each physical memory page the corresponding location in the storage volume from which the contents of the physical memory were read and the number of virtual memory pages that are mapped thereto.

Abstract: Techniques are described herein that are capable of optimizing (i.e., deduplicating) data in a virtualization environment. For example, optimization designations (a.k.a. deduplication designations) may be assigned to respective regions of a virtualized storage file. A virtualized storage file is a file that is configured to be mounted as a disk or a volume to provide a file system interface for accessing hosted files. In accordance with this example, each optimization designation indicates an extent to which the respective region is to be optimized (i.e., deduplicated). In another example, a virtualized storage file is mounted to provide a virtual disk that includes hosted files. In accordance with this example, optimization designations are assigned to the respective hosted files. In further accordance with this example, each optimization designation indicates an extent to which the respective hosted file is to be optimized.

Abstract: What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated is first obtained and an initial origin address of a translation table of the hierarchy of translation tables is obtained. Based on the obtained initial origin, a segment table entry is obtained. The segment table entry is configured to contain a format control and access validity fields. If the format control and access validity fields are enabled, the segment table entry further contains an access control field, a fetch protection field, and a segment-frame absolute address. Store operations are permitted only if the access control field matches a program access key provided by any one of a Program Status Word or an operand of a program instruction being emulated. Fetch operations are permitted if the program access key associated with the virtual address is equal to the segment access control field or the fetch protection field is not enabled.

Abstract: A storage system is configured to manage a pool to which multiple virtual volumes (VVOLs) are associated, assign a real area (RA) from any tier in an available tier pattern associated with a write-destination VVOL to a write-destination virtual area (VA), and carry out a reassignment process for migrating data inside the RA to an RA of a different tier, based on an access status of the RA. A management system is configured to assume a specified tier has been removed from the available tier pattern of a target VVOL, predict performance of all VVOLs associated with the pool to which the target VVOL is associated, determine whether there is a VVOL for which predicted performance is lower than a required performance, and when such a VVOL does not exist, instruct the storage system to remove the specified tier from the available tier pattern of the target VVOL.

Abstract: A computer system and a method are provided that reduce the amount of time and computing resources that are required to perform a hardware table walk (HWTW) in the event that a translation lookaside buffer (TLB) miss occurs. If a TLB miss occurs when performing a stage 2 (S2) HWTW to find the PA at which a stage 1 (S1) page table is stored, the MMU uses the IPA to predict the corresponding PA, thereby avoiding the need to perform any of the S2 table lookups. This greatly reduces the number of lookups that need to be performed when performing these types of HWTW read transactions, which greatly reduces processing overhead and performance penalties associated with performing these types of transactions.

Abstract: A system and method for providing high-speed memory operations is disclosed. The technique uses virtualization of memory space to map a virtual address space to a larger physical address space wherein no memory bank conflicts will occur. The larger physical address space is used to prevent memory bank conflicts from occurring by moving the virtualized memory addresses of data being written to memory to a different location in physical memory that will eliminate a memory bank conflict. This allows the memory system to both store and read data in the same cycle with no conflicts.

Abstract: A data processing apparatus is provided comprising processing circuitry and an instruction decoder responsive to program instructions to control processing circuitry to perform the data processing. The instruction decoder is responsive to an address calculating instruction to perform an address calculating operation for calculating a partial address result from a non-fixed reference address and a partial offset value such that a full address specifying a memory location of an information entity is calculable from said partial address result using at least one supplementary program instruction. The partial offset value has a bit-width greater than or equal to said instruction size and is encoded within at least one partial offset field of said address calculating instruction. A corresponding data processing method, virtual machine and computer program product are also provided.

Abstract: A method, computer program product, and computing system for receiving a reservation for a LUN from Host A, wherein the LUN is defined within a data array. A lock for the LUN is defined as Host A. A write request is received for the LUN from Host B. The lock for the LUN is defined as Transitioning A to B. The write request is delayed for a defined period of time.

Abstract: A system is described herein that includes a predictor component that predicts accesses to portions of asymmetric memory pools in a computing system by a virtual machine, wherein the asymmetric memory pools comprise a first memory and a second memory, and wherein performance characteristics of the first memory are non-identical to performance of the second memory. The system also includes a memory management system that allocates portions of the first memory to the virtual machine based at least in part upon the accesses to the asymmetric memory pools predicted by the predictor component.

Abstract: An approach to efficient space reclamation in multi-layered thinly provisioned systems. A parent storage volume is thinly provisioned, and uses one or more child storage volumes that are also thinly provisioned for storage. A reclamation command sent to the device providing the parent thinly provisioned storage volume identifies that data has been released, and that the physical storage storing that data can be placed in a free pool and used to satisfy future write requests in the parent storage volume. An identify module identifies which child storage volumes supporting the parent storage volume are thinly provisioned. The data is released at the level of the parent storage volume, and the reclamation command is sent to the child storage volumes supporting the parent storage volume and that are themselves thinly provisioned. The storage is thus released by all affected thinly provisioned storage volumes, and not just the parent storage volume that received the reclamation command.

Abstract: The disclosed embodiments provide a system that uses broadcast-based TLB-sharing techniques to reduce address-translation latency in a shared-memory multiprocessor system with two or more nodes that are connected by an electrical interconnect. During operation, a first node receives a memory operation that includes a virtual address. Upon determining that one or more TLB levels of the first node will miss for the virtual address, the first node uses the electrical interconnect to broadcast a TLB request to one or more additional nodes of the shared-memory multiprocessor in parallel with scheduling a speculative page-table walk for the virtual address. If the first node receives a TLB entry from another node of the shared-memory multiprocessor via the electrical interconnect in response to the TLB request, the first node cancels the speculative page-table walk. Otherwise, if no response is received, the first node instead waits for the completion of the page-table walk.

Abstract: A system includes a memory device including a real memory and a tracking mechanism configured to track relationships between multiple virtual memory addresses and real memory. The system further includes a processor configured to perform the below method and/or execute the below computer program product. One method includes mapping a first virtual memory address to a real memory in a memory device and mapping a second virtual memory address to the real memory. Here, the first virtual memory address is authorized to modify data in the real memory and the second virtual memory address is not authorized to modify the data in the real memory. One computer storage medium includes a computer program product for performing the above method.

Abstract: A data writing method and a memory controller and a memory storage apparatus using the same are provided. The method includes selecting physical units as a global random area and building a global random searching table for recording update information corresponding to updated logical pages that data stored in the global random area belongs to. The method also includes receiving updated data belonging to a logical page of a logical unit, assigning an index number for the logical unit, writing the updated data into the global random area, and using the index number to record update information corresponding the logical page in the global random searching table. Accordingly, a global random searching table having smaller size can be used for recording update information corresponding to updated logical pages that data stored in the global random area belongs to.

Abstract: A storage management application determines that a source virtual tape requires reclamation, identifies all block addresses for active data of a source virtual tape and sorts the block addresses in an ascending order, identifies a target virtual tape which has sufficient free capacity to store the active data of said source virtual tape and the last written block address on said target virtual tape, and sends a command to the VTL-system instructing it to perform reclamation including information about said source and said target virtual tape, the sorted list of block addresses denoting active data on the source virtual tape and the starting block address on the target virtual tape. The reclamation logic references the active data host blocks of said source volume to said target virtual tape starting at said starting block address by just updating the host block to disk block mapping table.