Timing Error (e.g., Watchdog Timer Time-out) Patents (Class 714/55)
  • Patent number: 8564466
    Abstract: To increase the number of analog inputs at low cost, an analog input system includes: one or more analog slave units each connected to a bus to which a CPU unit is connected, and each including an A/D-conversion device converting an analog value outputted by an external device into a first digital value, a buffer memory buffering a second digital value to be transferred to the CPU unit, and a nonvolatile storage device containing specific information of its own unit; and an analog master unit connected to the bus and including an operation section performing operation processing based on the specific information stored in the storage device with the first digital value being used as an input, to calculate the second digital value, the master unit performing on each of the slave input units the operation processing and processing of transferring the calculated second digital value to the buffer memory.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: October 22, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Masaru Hoshikawa, Shigeaki Takase
  • Patent number: 8555118
    Abstract: In a system and method for processing network data of a server, the server includes a timer, a switch and a storage system. The server determines whether the storage system includes overtime information of the timer when server is powered on. If the storage system includes the overtime information, the overtime information is deleted. If an operating system is started, a predetermined initial value is written into the timer to start timing, and a first network port and a second network port are disconnected through the switch. If the server works normally, a predetermined reset command is sent to the timer to reset the timer at regular intervals. If the server does not work normally, the first network port and the second network port are connected through the switch. If the timer times out, the overtime information is written into the storage system.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: October 8, 2013
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventor: Yu-Gang Zhang
  • Publication number: 20130262918
    Abstract: An apparatus for handling anomalies in a hardware system including a master device and at least one slave device coupled with the master device through an interconnect device is provided. The apparatus includes at least one controller operative to receive status information relating to the slave device. The status information is indicative of whether an anomaly is present in the slave device and/or the interconnect device. The controller is operative to generate output response information as a function of the status information relating to the slave device for detecting and/or responding to hardware system anomalies in a manner which reduces a need for resetting the hardware system to return to normal operation.
    Type: Application
    Filed: March 30, 2012
    Publication date: October 3, 2013
    Applicant: LSI CORPORATION
    Inventors: George Wayne Nation, Gary M. Lippert, Srinivasa Rao Kothamasu
  • Publication number: 20130254598
    Abstract: An access method is executed by a multi-core processor system. The access method includes activating a driver that corresponds to a first CPU, based on a start of execution of a first application; starting measurement of an access time period, based on access of a peripheral device; outputting, when the access time period exceeds a predetermined time period, a detection signal to reset the driver; and prohibiting, when the access time period exceeds a predetermined time period, writing into a register retaining data to be written into the peripheral device from the first CPU.
    Type: Application
    Filed: May 14, 2013
    Publication date: September 26, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Koichiro YAMASHITA, Hiromasa Yamauchi, Takahisa Suzuki, Koji Kurihara, Fumihiko Hayakawa
  • Publication number: 20130246866
    Abstract: A control system according to the principles of the present disclosure includes an operation control module, a fault detection module, a remedial action module, and a reset module. The operation control module controls operation of a vehicle system. The fault detection module detects a fault in the operation control module when the operation control module fails an integrity test. The remedial action module takes a remedial action when the fault is detected. The reset module resets the operation control module when the fault is detected and the remedial action is not taken.
    Type: Application
    Filed: May 1, 2012
    Publication date: September 19, 2013
    Applicant: GM Global Technology Operations LLC
    Inventors: Mark H. Costin, Ming Zhao, Paul A. Bauerle, Mahesh Balike, James T. Kurnik
  • Patent number: 8510606
    Abstract: A method for maintaining reliable communication between a command initiator and a target device is provided. After the command initiator detects an error corresponding to the target device and a path between the command initiator and the target device, the command initiator performs a downshift evaluation. The initiator maintains a transmission speed if the downshift evaluation determines that forgoing a transmission speed downshift is required, and reduces the transmission speed if the downshift evaluation determines that transmission speed downshift is required. The command initiator then logs the downshift evaluation result and reports any transmission speed change to a user.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: August 13, 2013
    Inventors: Randolph Eric Wight, Ruiling Luo, Clive Scott Oldfield
  • Patent number: 8504889
    Abstract: A wireless device includes a functional unit, a wireless transceiver, an antenna and a clock. The wireless transceiver and antenna are coupled to the functional unit. The clock is coupled to the functional unit and the wireless transceiver. The clock is generates a clock signal. The wireless device is coupled wirelessly to a wireless slave device. The functional unit is configured to determine an amount of time since a last keep alive transmission with the slave device has occurred based on the clock. The functional unit determines a number of keep alive transmissions to transmit to the slave device, and appropriate transmission times for the keep alive transmissions relative to a next scheduled keep alive transmission time, based on the determined amount of time since the last keep alive transmission. The functional unit begins successive transmission of the keep alive transmissions to the slave device per the transmission times.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: August 6, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Paul J. Husted, William J. McFarland, David K. Su
  • Patent number: 8479048
    Abstract: In the system management server, an information processing apparatus that is an event-information acquisition target is registered as a monitored apparatus in configuration information; event information that complies with a rule stored in advance is identified from among a plurality of pieces of event information stored in the system management server; a server apparatus for a network service related to the event information is identified; and a message is displayed which indicates that the cause of the event that occurred in a client information processing apparatus which has generated event information is an event related to the network service, which occurred in the server apparatus.
    Type: Grant
    Filed: August 17, 2011
    Date of Patent: July 2, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Tomohiro Morimura, Takayuki Nagai, Kiminori Sugauchi, Takaki Kuroda, Yoshihiro Arato
  • Patent number: 8473799
    Abstract: Certain aspects of the present disclosure propose techniques for avoiding a disruption in synchronous hybrid automatic repeat request operation at system time rollover. The techniques define the behavior of a system before and after the system frame number (SFN) rollover point to ensure a known relationship between a hybrid automatic repeat request (HARQ) process identification number and system time.
    Type: Grant
    Filed: August 20, 2009
    Date of Patent: June 25, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Xiaoxia Zhang, Zhengwei Liu, Hao Xu, Arnaud Meylan
  • Patent number: 8468395
    Abstract: Various exemplary embodiments relate to a method and related network node including one or more of the following: receiving, at a policy and charging rules node (PCRN), a request from a requesting node for an establishment of a first service data flow (SDF); generating a first rule set for implementing the first SDF in response to the request; transmitting a first rule of the rule set to a first node for installation of the first rule; waiting for a period of time for a response from the first node; determining from the response whether installation of the first rule at the first node failed or succeeded; and if installation of the first rule succeeded, transmitting a second rule of the first rule set to a second node for installation of the second rule.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: June 18, 2013
    Assignee: Alcatel Lucent
    Inventors: Ajay Kirit Pandya, Robert Alexander Mann, Mike Vihtari
  • Patent number: 8458527
    Abstract: A method for maintaining reliable communication on a bidirectional communication link is provided. A receiver on the bidirectional communication link detects an error and maintains a count of detected errors. The transmitter on the bidirectional communication link polls the receiver in order to determine the count of detected errors, and performs a downshift evaluation for the bidirectional communication link. In response to performing the downshift evaluation for the bidirectional communication link, the transmitter maintains a transmission speed of the bidirectional communication link if the downshift evaluation determines that forgoing transmission speed downshift is required for the bidirectional communication link, and reduces the transmission speed of the path if the downshift evaluation determines that transmission speed downshift is required for the bidirectional communication link.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: June 4, 2013
    Assignee: Dot Hill Systems Corporation
    Inventors: Clive Scott Oldfield, Tony Richard Kilwein, Mark Aaron VonLintel
  • Patent number: 8458533
    Abstract: A time-out period is established for a watchdog timer. The time-out period is restarted each time a designated key value is received when each key value is received in a proper sequence. An error is indicated if set of key values is received in an incorrect sequence. A time-out is indicated if a correct sequence of key values is not received within the time-out period.
    Type: Grant
    Filed: November 3, 2010
    Date of Patent: June 4, 2013
    Assignee: Texas Instruments Incorporated
    Inventor: Kevin Patrick Lavery
  • Patent number: 8458534
    Abstract: A system and method for distributed fault detection. In an exemplary method, unplanned application exits and crashes may be detected at a node local level. Further, application hangs may be detected using at least one of a script and a binary at the node local level. Also, node crashes and operating system crashes may be detected using node to node heart-beating.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: June 4, 2013
    Assignee: Red Hat, Inc.
    Inventor: Allan Havemose
  • Patent number: 8458506
    Abstract: A real time clock for outputting data indicating a time of day includes: an event detection circuit for detecting that an event detection signal has been inputted from outside; a timing circuit for generating the time-of-day data according to a signal outputted from an oscillator circuit; a memory; and a control circuit for, if the event detection circuit detects input of the event detection signal, recording event data in the memory, the event data including additional data indicating an operating state of the real time clock and the time-of-day data generated by the timing circuit.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: June 4, 2013
    Assignee: Seiko Epson Corporation
    Inventors: Toru Shirotori, Toshiya Usuda
  • Patent number: 8453016
    Abstract: Methods for managing response data within an information handling system (IHS), where the method includes the step of obtaining response data from at least one component in the IHS, the response data generated in response to receiving a command. The method also includes accumulating the response data from the at least one component to compute a total response time.
    Type: Grant
    Filed: September 23, 2007
    Date of Patent: May 28, 2013
    Assignee: Dell Products L.P.
    Inventor: William F. Sauber
  • Patent number: 8448029
    Abstract: A multiprocessor system with multiple watchdog timers, the timers causing all the processors in the system to concurrently process a common interrupt signal asserted by any of the watchdog timers timing out. The processors, in response to the common interrupt signal, store data residing in their local memories into a memory common to all the processors. The stored data is then stored in a permanent storage device for later analysis. Thereafter, all of the processors are reset.
    Type: Grant
    Filed: March 11, 2009
    Date of Patent: May 21, 2013
    Assignee: LSI Corporation
    Inventor: James N. Snead
  • Patent number: 8446618
    Abstract: An information management device that manages the processing result of a print job processed by a print device through a network includes an information acquisition unit, an information output unit, a time setting unit, and a polling unit that performs an acquisition polling process in which the information acquisition unit acquires information on the print job that has been completed from the print device at a time when the information acquisition unit acquires the information on the print completion from the print device before the set waiting time elapses after the information output unit outputs the print job to the print device, and performs a checking polling process in which the information acquisition unit checks the print device for completion information at a time when the set waiting time elapses in a state that the information acquisition unit does not acquire the completion information from the print device.
    Type: Grant
    Filed: April 8, 2008
    Date of Patent: May 21, 2013
    Assignee: Seiko Epson Corporation
    Inventors: Masanori Mukaiyama, Masashi Asakawa
  • Patent number: 8412996
    Abstract: A device and a method detect an acceleration of a logic signal expressed by a closeness, beyond a closeness threshold, of at least two variation edges of the logic signal. A first control bit and a second control bit are provided. At each edge of the logic signal, the value of the first control bit is inverted after a first delay and the value of the second control bit is inverted after a second delay. An acceleration is detected when the two control bits have at the same time their respective initial values or their respective inverted initial values. Application is in particular but not exclusively to the detection of error injections in a secured integrated circuit.
    Type: Grant
    Filed: January 28, 2008
    Date of Patent: April 2, 2013
    Assignee: STMicroelectronics SA
    Inventors: Frederic Bancel, Nicolas Berard, Philippe Roquelaure
  • Patent number: 8407530
    Abstract: An application attempts to use a first protocol stack to send a first message to a server. After attempting to send the first message to the server, the application attempts to use a second protocol stack to send a second message to the server. After attempting to send the second message to the server, the application performs a timeout activity before a timeout period for the second message expires when the first message timed out. Alternatively, when the timeout period for the second message expires and the first message did not time out, the application performs the timeout activity. When the client device received a response to the second message from the server before the timeout period for the second message expires, the application performs a different activity.
    Type: Grant
    Filed: June 24, 2010
    Date of Patent: March 26, 2013
    Assignee: Microsoft Corporation
    Inventors: Balaji Balasubramanyan, Miko Arnab Sakhya Singha Bose
  • Patent number: 8402311
    Abstract: Techniques are described herein that are capable of monitoring activity with respect to a distributed application. A server system includes logical tiers, each including processing system(s) configured to process messages in accordance with a respective protocol (e.g., an ASP.net® protocol, WCF protocol, SQL protocol, etc.). When a user initiates an activity with respect to a distributed application, hops are performed between the logical tiers and/or between components of the distributed application to complete the requested activity. A hop is a transfer of a message or a procedure call from one processing system to another processing system. A common identifier may be assigned to each of the hops that are performed with regard to the activity. If a failure occurs with respect to the activity, the common identifier may be used to gather information regarding the hops. For instance, the information may be used to determine a source of the failure.
    Type: Grant
    Filed: July 19, 2010
    Date of Patent: March 19, 2013
    Assignee: Microsoft Corporation
    Inventors: Venkata Seshu Kumar Kurapati, Ilarie G. Letca, Ashvinkumar J. Sanghvi, Dhananjay Madhusudan Mahajan, Alexandre A. Coelho, Rajeev Sudhakar, Anandha Ganesan
  • Patent number: 8381031
    Abstract: On a typical motherboard the processor and memory are separated by a printed circuit data bus that traverses the motherboard. Throughput, or data transfer rate, on the data bus is much lower than the rate at which a modern processor can operate. The difference between the data bus throughput and the processor speed significantly limits the effective processing speed of the computer when the processor is required to process large amounts of data stored in the memory. The processor is forced to wait for data to be transferred to or from the memory, leaving the processor under-utilized. The delays are compounded in a distributed computing system including a number of computers operating in parallel. The present disclosure describes systems, method and apparatus that tend to alleviate delays so that memory access bottlenecks are not compounded within distributed computing systems.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: February 19, 2013
    Assignee: Advanced Processor Architectures, LLC
    Inventors: Louis Edmund Chall, John Bradley Serson, Philip Arnold Roberts, Cecil Eugene Hutchins
  • Patent number: 8375245
    Abstract: A method, performed by a first mobility management entity (MME) device in a network, includes receiving, from a second MME device, standby database information associated with user equipment (UE) registered with the second MME device; detecting that the second MME device has failed or lost connectivity; designating that the UEs registered with the second MME device will be registered with the first MME device, in response to detecting that the second MME device has failed or lost connectivity; detecting a request to activate a particular UE registered with the second MME device; and paging the particular UE to register with the first MME device, using the standby database information and in response to detecting the request to activate the particular UE.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: February 12, 2013
    Assignees: Verizon Patent and Licensing Inc., Cellco Partnership
    Inventors: Patricia Ruey-Jane Chang, Vikram Rawat, Maria G. Lam, Sagiv Draznin, Steven R. Rados, Scott Anthony Townley
  • Patent number: 8375258
    Abstract: A method and apparatus to operate a watchdog timer having a first time out period in a processing system. The watchdog timer receives an indication of a change in a mode of operation in the processing system. In response to the change in the mode of operation of the processing system, the watchdog timer changes the time out period to a second time out period corresponding to the new mode of operation.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: February 12, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Michael Sheets, David G. Wright
  • Patent number: 8369966
    Abstract: A network having a plurality of subscribers has at least one message transmitter and at least one message receiver. The at least one message transmitter sends messages at predefined time intervals. The message receiver receives the messages at the predefined time intervals. A delay time of the messages is monitored on the basis of time outs. In addition, at least one of the subscribers repeatedly estimates a current delay time using a time measurement between sending out a request message and receiving a response message. The estimated delay time is compared with a predefined threshold value. If the estimated delay time exceeds the defined threshold value, an error signal is generated.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: February 5, 2013
    Assignee: Pilz GmbH & Co. KG
    Inventors: Matthias Holzaepfel, Reinhard Sperrer, Stefan Woehrle, Klaus Wohnhaas
  • Publication number: 20130024734
    Abstract: [This invention] inhibits the response time of the storage control apparatus from being longer even if the response time of the storage apparatus is long. The disk adapter (DKA), receiving a read message from the channel adapter (CHA), sets the timeout time in accordance with specified conditions, and tries to read data from the storage apparatus 4. As the timeout time, either the normal value or the shortened value is selected. If a timeout error occurs, the read job is reset, and correction read is started.
    Type: Application
    Filed: April 14, 2010
    Publication date: January 24, 2013
    Applicant: HITACHI, LTD.
    Inventor: Eiju Katsuragi
  • Patent number: 8352803
    Abstract: Various exemplary embodiments relate to a method and related network node including one or more of the following: receiving, at a policy and charging rules node (PCRN), a request from a requesting node for an establishment of a first service data flow (SDF); generating a first rule set for implementing the first SDF in response to the request; transmitting a first rule of the rule set to a first node for installation of the first rule; waiting for a period of time for a response from the first node; determining from the response whether installation of the first rule at the first node failed or succeeded; and if installation of the first rule succeeded, transmitting a second rule of the first rule set to a second node for installation of the second rule.
    Type: Grant
    Filed: June 7, 2010
    Date of Patent: January 8, 2013
    Assignee: Alcatel Lucent
    Inventors: Ajay Kirit Pandya, Robert Alexander Mann, Mike Vihtari
  • Patent number: 8352786
    Abstract: A compressed replay buffer in a first electronic unit of an electronic system holds commands in a table. As commands are transmitted from the first electronic unit to a second electronic unit, the command, along with associated data, command type, and the like are stored in a row in the table. No rows in the table contain “dead cycles” to indicate that no command was sent on a particular cycle on a bus over which the commands were transmitted. The second electronic unit may request that the first electronic unit replay some number of commands. In response, the first electronic unit uses commands in the compressed replay buffer, along with required timings stored on the first electronic unit, to replay the number of commands requested.
    Type: Grant
    Filed: July 20, 2010
    Date of Patent: January 8, 2013
    Assignee: International Business Machines Corporation
    Inventors: Herman L. Blackmon, Ryan S. Haraden, Joseph A. Kirscht, Elizabeth A. McGlone
  • Patent number: 8335942
    Abstract: Various embodiments provide a guard mechanism that is configured to prevent transmission of synchronous function calls to hung application components. In at least some embodiments, a hang resistance application layer intercepts a synchronous function call that is intended for an application component. Before permitting the synchronous function call to be transmitted to the application component, the hang resistance application layer determines whether the application component is hung by transmitting a message other than the synchronous function call to the application component that requests that a response be received before transmission of the synchronous function call to the application component is permitted. Responsive to determining that the component is hung, a hung component recovery process is initiated.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: December 18, 2012
    Assignee: Microsoft Corporation
    Inventors: Andrew Zeigler, Shawn M. Woods, David M. Ruzyski, John H. Lueders, Jon R. Berry, Daniel James Plaster
  • Patent number: 8327187
    Abstract: Managing processes in a computing system comprising one or more cores includes receiving a request for a first process on a first core to execute with at least one predetermined task of an operating system disabled on the first core. In response to the request, the operating system determines whether one or more potential errors in execution of one or more processes other than the first process executing on the first core would be caused by disabling the predetermined task on the first core. The operating system grants the request or rejects the request in response to determining whether one or more potential errors in execution of one or more processes other than the first process executing on the first core would be caused by disabling the predetermined task on the first core.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: December 4, 2012
    Assignee: Tilera Corporation
    Inventor: Christopher D. Metcalf
  • Patent number: 8301937
    Abstract: A method of generating a heartbeat signal for an application comprising one or more objects that may enter a halt state is described. The method comprises: sending a status request to a defined interface on each object; and monitoring responses to the status requests to ascertain if each object is operating normally or in a halt state. The method further comprises: generating an application valid signal in the event that each object is operating normally; transmitting the application valid signal, if generated, to a monitoring component independent of the application; and generating at the monitoring component a heartbeat valid signal in response to receipt of the application valid signal.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: October 30, 2012
    Assignee: NCR Corporation
    Inventors: Ian M. Joy, Gordon D. Patton
  • Patent number: 8301940
    Abstract: A method, system, and product for monitoring the availability of a data processing system are proposed. The system runs a management application involving the periodic transmission of blocks of data from multiple local computers to a central computer. Whenever a block of data must be transmitted by a generic local computer, an expected transmission delay of a next block of data (with respect to the current one) is estimated and attached to the block of data. The central computer receiving the updated block of data can calculate an expected receiving time of the next block of data accordingly. If the next block of data is not received in due time, the central computer determines a failure of the local computer. The central computer also scans a subset of ports of the local computer, to ascertain whether the problem is due to a temporary unavailability of the application.
    Type: Grant
    Filed: December 4, 2008
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventors: Salvatore D'Alo, Arcangelo Di Balsamo, Alessandro Donatelli
  • Publication number: 20120254674
    Abstract: In an embodiment, provided is a communication device connected to time servers via a network with transfer devices. In the communication device: a network controller receives a message containing time information counted by the time server and containing a network identifier, and obtains a receiving timing of the message; a network processing unit, when the network identifier in the message does not match with any network identifier, destroys the message; a protocol processing unit, when the network identifier has a match, calculates a time error by the time information in the message and the receiving timing, detects whether a first time server is malfunctioning, and when detected the first time server malfunctioning, outputs the time error calculated by a network identifier assigned to a second time server; a servo calculates an operation amount by the time error; and a clock varies a clock rate according to the operation amount.
    Type: Application
    Filed: March 28, 2012
    Publication date: October 4, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuyuki KOZAKAI, Mitsuru KANDA
  • Publication number: 20120246524
    Abstract: In an encrypted wireless system, when a wireless node detects that it is having problems, it may be programmed to transmit one or more diagnostic messages without encryption, or with reduced encryption. The transmitted diagnostic messages may be received and interpreted by a technician troubleshooting the system. Once the technician troubleshoots and repairs the system, the affected wireless node may detect that it is operating normally, and may cease transmitting the unencrypted, or reduced-encryption, diagnostic messages. In most cases, the wireless system does not need any particular input to initiate the unencrypted, or reduced-encryption, diagnostic message transmissions.
    Type: Application
    Filed: March 25, 2011
    Publication date: September 27, 2012
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventors: Robert J. Thomas, Patrick Gonia
  • Publication number: 20120239989
    Abstract: A mechanism is provided for monitoring and verifying a clock state of a chip that does not write out clock state information. Responsive to identifying an access to the chip, the access is scanned to identify a chip register and a clock domain that will be accessed. A determination is made as to whether a bit of a clock trust unit associated with the chip register and the clock domain indicates whether to trust a clock state associated with the bit in a logical clock state unit. Responsive to the bit of the clock trust unit indicating that the clock state associated with the bit in the logical clock state unit is trusted, the clock state from the logical clock state unit is identified. Responsive to the clock state matching the clock state required by the access, the access is forwarded to the chip for execution.
    Type: Application
    Filed: March 14, 2011
    Publication date: September 20, 2012
    Applicant: International Business Machines Corporation
    Inventors: Daniel M. Crowell, David D. Sanner, Thi N. Tran
  • Patent number: 8271845
    Abstract: Evaluating the operating safety of a complex software and or hardware system such as a system for displaying flight information on an instrument panel of an aircraft. The evaluation method includes construction of a first architecture of the system, divided into several blocks each comprising data inputs/outputs, the inputs of a block being connected to the outputs of other blocks in the first architecture; identification of failures of the outputs of the blocks of the architecture; construction of first boolean expressions expressing the states of the outputs of the blocks of the first architecture as a function of the states of the identified failures, of the states of the inputs of the blocks; definition of a first feared event to be examined by a second boolean expression constructed based on the first boolean expressions; and reduction of the second boolean expression in a sum of monomials.
    Type: Grant
    Filed: November 17, 2008
    Date of Patent: September 18, 2012
    Assignee: Thales
    Inventor: Andre Leblond
  • Patent number: 8261134
    Abstract: A multiprocessor computer system comprises one or more watchdog timers operable to detect failure of a memory operation based on passage of a certain timing period from a memory operation being issued without a valid response. An error handler is operable to take corrective action regarding the failed memory operation, such as to provide at least one of hardware state management and application state management.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: September 4, 2012
    Assignee: Cray Inc.
    Inventors: Dennis C. Abts, Steven L. Scott, Aaron F. Godfrey
  • Patent number: 8255086
    Abstract: The disclosure provides various embodiments of systems and methods of generating a heartbeat in an HVAC system and networks. In an embodiment, a method includes a heartbeat message being sent by a first subnet controller upon the first subnet controller taking active control of a subnet of the HVAC network. The active heartbeat message timer is reset. Another heartbeat message is sent if a specified amount of time has elapsed since a previous heartbeat message was sent by said heartbeat generator.
    Type: Grant
    Filed: October 21, 2009
    Date of Patent: August 28, 2012
    Assignee: Lennox Industries Inc.
    Inventor: Wojciech Grohman
  • Patent number: 8209561
    Abstract: A real time clock for outputting data indicating a time of day includes: an event detection circuit for detecting that an event detection signal has been inputted from outside; a timing circuit for generating the time-of-day data according to a signal outputted from an oscillator circuit; a memory; and a control circuit for, if the event detection circuit detects input of the event detection signal, recording event data in the memory, the event data including additional data indicating an operating state of the real time clock and the time-of-day data generated by the timing circuit.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: June 26, 2012
    Assignee: Seiko Epson Corporation
    Inventors: Toru Shirotori, Toshiya Usuda
  • Publication number: 20120159267
    Abstract: A client device in a distributed system may include a timer for timing a request time duration substantially including a period of time that the client device is waiting for results to be received via a network from a server in response to a request sent by the client device. A network interface may receive a value of a service time duration from the server. The service time duration may correspond to time that the server spent servicing the request. A processor may subtract the service time duration from the request time duration to thereby calculate a difference time duration, and automatically control the network interface to issue one or more alert messages to a network operation center (NOC) via the network when the difference time duration is greater than a difference time threshold. The difference time threshold may be determined according to a type of the request.
    Type: Application
    Filed: December 21, 2010
    Publication date: June 21, 2012
    Inventor: John Gyorffy
  • Publication number: 20120144250
    Abstract: Described herein are systems related to a visual tool for providing a dynamic and accessible collaborative environment during a production outage or network downtime.
    Type: Application
    Filed: December 7, 2010
    Publication date: June 7, 2012
    Inventor: Brian Lee
  • Patent number: 8195988
    Abstract: The present invention relates to a method and apparatus in a Media Gateway (MG) for handling disconnection between the MG and a Media Gateway Controller (MGC). Multilevel requirements are fulfilled by setting different timeout periods for a disconnection timer. On the one hand, if the timeout period of the disconnection timer is not equal to zero, new events that occur during the disconnection are stored. Then, after the connection is recovered, the stored new events are reported to the MGC, so that the data and states in the MG can match those in the MGC after the connection recovery. On the other hand, if the timeout period of the disconnection timer is equal to zero, all active calls are immediately released.
    Type: Grant
    Filed: November 12, 2007
    Date of Patent: June 5, 2012
    Assignee: Alcatel Lucent
    Inventors: Yu Xiao, Yangming Li, Jing Liu
  • Patent number: 8195987
    Abstract: Various embodiments provide a guard mechanism that is configured to prevent transmission of synchronous function calls to hung application components. In at least some embodiments, the guard mechanism receives a synchronous function call that is intended for an application component. Before permitting the synchronous function call to be transmitted to the application component, the guard mechanism determines whether the component is hung. Responsive to determining that the component is not hung, the guard mechanism permits the synchronous function call to be transmitted to the component. If, however, the guard mechanism determines that the application component is hung, a hung component recovery process is initiated.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: June 5, 2012
    Assignee: Microsoft Corporation
    Inventors: Andrew Zeigler, Shawn M. Woods, David M. Ruzyski, John H. Lueders, Jon R. Berry, Daniel James Plaster
  • Patent number: 8195989
    Abstract: A device may detect and report failure in point-to-point Ethernet links. In one implementation, the device may determine, based on a periodic timing signal, whether at least one packet was received on an incoming Ethernet link during a previous period of the periodic timing signal. The device may update an entry in a circular buffer to indicate whether the at least one packet was received during the previous period of the periodic timing signal and analyze the circular buffer to determine whether there is a signal failure on the incoming Ethernet link.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: June 5, 2012
    Assignee: Juniper Networks, Inc.
    Inventors: CunZhi Lu, Ramanarayanan Ramakrishnan
  • Patent number: 8191033
    Abstract: Embodiments of the present invention provide a method/apparatus to measure the jitter of a timing signal used in an integrated circuit chip. The method/apparatus is used to send data from a launch element using a synchronous data path of the timing signal, receive the data at a capture element using the synchronous data path, wherein the launch element and the capture element are disposed on the same integrated circuit chip upon which the timing signal is generated and/or used, and gather statistics about whether a timing violation has occurred by comparing the sent data with the received data over the course of multiple launch/capture events as the timing is adjusted. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: November 6, 2009
    Date of Patent: May 29, 2012
    Assignee: Marvell International Ltd.
    Inventor: Thomas Page Bruch
  • Publication number: 20120124431
    Abstract: A method and system for client recovery strategy to maximize service availability for redundant configurations is provided. The technique includes adaptively adjusting timing parameter(s), detecting failures based on adaptively-adjusted timing parameter(s), and switching over to a redundant server. The timing parameter(s) include a maximum number of retries, response timers, and keepalive messages. Switching over to alternate servers engaged in warm sessions with the client may also be implemented to improve performance. The method and system allow for improved recovery time and suitable shaping of traffic to redundant servers.
    Type: Application
    Filed: November 17, 2010
    Publication date: May 17, 2012
    Inventors: Eric Bauer, Daniel W. Eustace, Randee Susan Adams
  • Patent number: 8176357
    Abstract: A file storage system that uses a server to communicate between a client and a storage system. The server receives a file storage request pertaining to a file, generates and stores a file record for the request and forwards the request to a file storage system. The server performs either an internal retry or forwards a no-file response from the storage system to the client computer in response to receiving a no-file file status from the storage system depending on an amount of elapsed time from the time the server initially receives the file storage request.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: May 8, 2012
    Assignee: Eastman Kodak Company
    Inventors: Felix S. Hsu, Ron Barzel
  • Patent number: 8171352
    Abstract: An HVAC controller, a method for determining the source of a reset of a HVAC unit and a HVAC system are disclosed herein. In one embodiment, the HVAC controller includes: (1) a power on reset (POR) register configured to indicate if a POR has occurred for said controller, (2) a non-volatile memory having a first reset code section and a second reset code section, wherein said first and second reset code sections are each configured to store a reset code and (3) a processor configured to deduce when a source of a reset for said controller is a watchdog reset based on content of said POR register, said first reset code section and said second reset code section.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: May 1, 2012
    Assignee: Lennox Industries Inc.
    Inventor: John P. Stachler
  • Patent number: 8165743
    Abstract: A high-reliability controller for inverter is provided with a simple configuration. The controller for inverter includes a CPU 14 controlling energy of a vehicle, a CPU 15 controlling a power generation amount or an assist amount of a first motor 26, a CPU 16 controlling a power generation amount or an assist amount of a second motor 27, a regulator 8 generating power supplied to the CPUs 14, 15 and 16, a first inverter 23 controlled by the CPU 15, a second inverter 24 controlled by the CPU 16, and a communication line 17 that connects the CPUs 14 to 16. The first inverter 23 and the second inverter 24 are controlled in a cooperative or an independent manner.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: April 24, 2012
    Assignee: Hitachi, Ltd.
    Inventor: Katsuya Oyama
  • Patent number: 8156386
    Abstract: An information processing apparatus having a first subsystem and a second subsystem, is provided. The first subsystem includes a first updating unit configured to update a first counter at a priority higher than that of a processing task executed by the first subsystem, and a second updating unit configured to update a second counter at a priority lower than that of the processing task. The second subsystem includes a check unit configured to check whether the first and second counters have been updated, and a determination unit configured to determine that failure has occurred in the first subsystem if at least one of the first and second counters has not been updated.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: April 10, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takumi Miyakawa
  • Patent number: 8140918
    Abstract: A clock supply method for supplying a clock to a plurality of processing units includes supplying a clock from a first clock supply unit to processing units forming a first group as a primary clock and to processing units forming a second group as a standby clock; supplying a clock from a second clock supply unit including a clock source different from that of the first clock supply unit to the processing units forming the second group as a primary clock and to the processing units forming the first group as a standby clock; and when a processing unit in the first or second group detects an abnormality of the primary clock, switching the standby clock into use in place of the primary clock being supplied to the processing units that has detected the abnormality belongs; wherein the first and second clock supply units supply clocks with the same frequency.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: March 20, 2012
    Assignee: Fujitsu Limited
    Inventors: Hideharu Kanaya, Akiko Ootoshi, Takashi Koguchi, Kensuke Ishida