Reliability Or Availability Analysis (epo) Patents (Class 714/E11.02)
  • Publication number: 20110066889
    Abstract: A test file generation method for generating a test file for testing a consistency of a work process includes receiving various types of definition information relating to various types of procedures included in the work process, execution sequence of the various types of procedures, a final goal that is a goal that is finally achieved in the work process, sub-goals that are goals that are achieved in the various types of procedures, a constrained condition that is observed when the various types of procedures are executed, an executioner who executes the various types of procedures, and an authority for determining a procedure that can be executed by the executioner, generating a definition file on the basis of the various types of definition information received, and generating a test file that indicates a behavioral model when the work process is executed on the basis of the definition file generated.
    Type: Application
    Filed: November 24, 2010
    Publication date: March 17, 2011
    Applicant: FUJITSU LIMITED
    Inventor: Shinji Kikuchi
  • Publication number: 20110066899
    Abstract: A memory system comprises a flash memory and a memory controller. The flash memory comprises a plurality of memory blocks. The memory controller performs a read retry operation on a memory block containing an uncorrectable read error until an accurate data value is read from the memory block. The memory controller then controls the flash memory to perform an erase refresh operation on the memory block.
    Type: Application
    Filed: July 23, 2010
    Publication date: March 17, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang chul KANG, Seung hyun HAN
  • Publication number: 20110060961
    Abstract: A computer system includes a memory controller coupled to a memory module containing several DRAMs. The memory module also includes a non-volatile memory storing row addresses identifying rows containing DRAM memory cells that are likely to lose data during normal refresh of the memory cells. Upon power-up, the data from the non-volatile memory are transferred to a comparator in the memory controller. The comparator compares the row addresses to row addresses from a refresh shadow counter that identify the rows in the DRAMs being refreshed. When a row of memory cells is being refreshed that is located one-half of the rows away from a row that is likely to loose data, the memory controller causes the row that is likely to loose data to be refreshed. The memory controller also includes error checking circuitry for identifying the rows of memory cells that are likely to lose data during refresh.
    Type: Application
    Filed: November 10, 2010
    Publication date: March 10, 2011
    Applicant: Micro Technology, Inc.
    Inventor: Dean A. Klein
  • Publication number: 20110055632
    Abstract: Results of field testing of portions of a distributed system such as a Broadband Communications System from a testing device to a controller which downloads programmed test protocols and sequences thereof to the separate testing device over a wired or wireless link and thereafter can be used to control the testing device as well as display test results and provide analysis of the test results and suggest procedures to technical personnel. The controller then can transmit the test data to a central facility or distribution hub in substantially real-time together with work performance data where full technical analysis can be performed. The test data and results of analysis can then be distributed as desired such as to a management analysis facility to support improvement of efficiency of the system and the operation thereof.
    Type: Application
    Filed: August 31, 2009
    Publication date: March 3, 2011
    Inventor: Dennis A. Zimmerman
  • Publication number: 20110055134
    Abstract: Systems and other embodiments associated with a resource-based web service are described. One example system comprises exploration logic configured to dynamically determine a configuration for a resource-based web service. The example system also comprises evaluation logic configured to test the configuration according to a testing policy. A result is acquired by testing the configuration according to the testing policy. Additionally, the system comprises control logic configured to control a user interface to report the result.
    Type: Application
    Filed: August 25, 2009
    Publication date: March 3, 2011
    Inventors: Martin DVORAK, Ulrich Feyer, Jan Odstrcil
  • Publication number: 20110055621
    Abstract: A system and associated method for replicating data based on capacity optimization. A local node receives the data associated with a key. The local node within a local domain communicates with nodes of remote domains in a system through a communication network. Each domain has its own distributed hash table that partitions key space and assigns a certain key range to an owner node within the domain. For new data, the local node queries owner nodes of domains in the system progressively from the local domain to remote domains for a duplicate of the new data. Depending on a result returned by owner nodes and factors for replication strategies, the local node determines a replication strategy and records the new data in the local node pursuant to the replication strategy.
    Type: Application
    Filed: August 28, 2009
    Publication date: March 3, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: NAGAPRAMOD S. MANDAGERE, SESHASHAYEE S. MURTHY, MARK A. SMITH, SANDEEP M. UTTAMCHANDANI, PIN ZHOU
  • Publication number: 20110041019
    Abstract: Test circuits located on semiconductor die enable a tester to test a plurality of die/ICs in parallel by inputting both stimulus and response patterns to the plurality of die/ICs. The response patterns from the tester are input to the test circuits along with the output response of the die/IC to be compared. Also disclosed is the use of a response signal encoding scheme whereby the tester transmits response test commands to the test circuits, using a single signal per test circuit, to perform: (1) a compare die/IC output against an expected logic high, (2) a compare die/IC output against an expected logic low, and (3) a mask compare operation. The use of the signal encoding scheme allows functional testing of die and ICs since all response test commands (i.e. 1-3 above) required at each die/IC output can be transmitted to each die/IC output using only a single tester signal connection per die/IC output. In addition to functional testing, scan testing of die and ICs is also possible.
    Type: Application
    Filed: October 25, 2010
    Publication date: February 17, 2011
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Lee D. Whetsel, Alan Hales
  • Publication number: 20110029813
    Abstract: An interface processes memory redundancy data on an application specific integrated circuit (ASIC) with self-repairing random access memory (RAM) devices. The interface includes a state machine, a counter, and an array of registers. The state machine is coupled to a redundancy chain. The redundancy chain includes coupled redundant elements of respective memory elements on the ASIC. In a shift-in mode, the interface shifts data from each of the elements in the redundancy chain and compresses the data in the array of registers. The interface communicates with a test access port coupled to one or more eFuse devices to store and retrieve the compressed data. In a shift-out mode, the interface decompresses the data stored in the array of registers and shifts the decompressed data to each unit in the redundancy chain. The interface functions absent knowledge of the number, bit size and type of self-repairing RAM devices in the redundancy chain.
    Type: Application
    Filed: August 2, 2009
    Publication date: February 3, 2011
    Applicant: Avago Technologies Enterprise IP (Singapore) Pte. Ltd.
    Inventors: Rosalee Gunderson, Dale Beucler, Louise A. Koss
  • Publication number: 20110029814
    Abstract: A test system and a test method thereof. The test system includes an electronic device and a test device. The electronic device includes a plurality of output interfaces and provides a corresponding test signal via the output interfaces according to a group of operation commands. The test device includes a transforming unit, a multiplexer unit, a processor unit and a plurality of test interfaces which are respectively coupled to the output interfaces. The transforming unit transforms the test signals received via the test interfaces. The multiplexer unit selects the transformed test signals. The processor unit controls the multiplexer unit to select one of the transformed test signals, and determines whether the transformed test signal being selected conforms a predetermine condition for generating a test result signal. The processor unit controls the communication unit to transmit the test result signal to the electronic device according to the test result signal.
    Type: Application
    Filed: January 8, 2010
    Publication date: February 3, 2011
    Applicant: Quanta Computer Inc.
    Inventor: Chun-Chen CHEN
  • Publication number: 20110022884
    Abstract: An appliance communicates via a communication network via various communication services available for transmitting data via said communication network, said appliance comprising means of: detecting an anomaly in a communication that is established with said appliance via one of said communication services, implementing a defense communication mode, wherein the communications to be established with said appliance via a communication service for which a detection has occurred are inhibited, the communications to be established via another communication service being allowed.
    Type: Application
    Filed: March 30, 2009
    Publication date: January 27, 2011
    Applicant: France Telecom
    Inventors: Lars Kiessling, Franck Weens, Jocelyn Barranco
  • Publication number: 20110022899
    Abstract: A method of or system for producing or executing a script for a load test of a terminal server. During execution of a high-level application by the terminal server controlled by a user of a terminal client in which the terminal client and terminal server communicate according to remote-desktop protocol, a terminal-services agent on the terminal server may monitor a change in at least one window of the high-level application within a terminal-client desktop of the terminal client. Window-related information corresponding to the monitored change from the terminal-services agent may be sent to an operation-test tool resident on the terminal client. The operation-test tool may log the received window-related information.
    Type: Application
    Filed: July 27, 2009
    Publication date: January 27, 2011
    Inventors: Vitali Greenberg, Reuven Siman Tov, Michael Guzman, Moshe E. Kraus, Dorit Naparstek, Einat V. Zilber, Sergey Kutsos
  • Publication number: 20110010593
    Abstract: A output storage latch within a combinational logic circuit may be adapted to form a scan flip-flop latch that supports both functional operation and scan chain testing of a combinational logic matrix included in the combinational logic circuit. A described master/slave clock approach allows the scan flip-flop latch to support receiving into a scan chain a sequence of test input data, execution of combinational logic matrix testing based on the test input data, and sequentially outputting test results to a test result register for comparison with expected results. The described scan flip-flop latch may be used along side unaltered output storage latches thereby allowing flexibility with respect to the number and placement scan chain test points within an integrated circuit. Use of the described dual-use scan flip-flop latch results in a less complex circuit design, reduced circuit area requirements and improved reliability.
    Type: Application
    Filed: August 3, 2010
    Publication date: January 13, 2011
    Applicant: Marvell International Ltd.
    Inventor: Manish SHRIVASTAVA
  • Publication number: 20100313091
    Abstract: A plurality of tester channels is provided. The tester channels are capable of outputting double speed test patterns when a pin-multiplex-mode is designated. Each of the tester channels is provided with a level determination unit to output a level determination signal, a signal multiplexing unit, and an expected value comparison unit to receive an output from the signal multiplexing unit. The signal multiplexing unit multiplexes an outputted level determination signal obtained in one of the tester channels and a level determination signal obtained from a level determination unit of another one of the tester channels when a double speed test mode is designated. The signal multiplexing unit outputs a signal corresponding to the level determination signal of the one of the tester channels when the double speed test mode is canceled. A strobe time can be set individually for each of the tester channels to obtain a comparison result.
    Type: Application
    Filed: June 4, 2010
    Publication date: December 9, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Yoshiaki Kodashiro
  • Publication number: 20100313073
    Abstract: The embodiments disclosed herein extend to methods, systems, and computer program products for error resolution in a computing system that includes a health module. The health module monitors components of the system for runtime errors and provides error resolution templates. The error resolution templates include metadata that specifies actions that may resolve the error and error handlers corresponding to the actions that may correct the error. The system may be extended by the addition and/or modification of the error resolution templates. The error resolution templates may also be used to facilitate the correction of runtime errors in the system.
    Type: Application
    Filed: June 3, 2009
    Publication date: December 9, 2010
    Applicant: Microsoft Coporation
    Inventors: Gunter Leeb, Yitzchak Naveh-Benjamin, Scott M. Roberts, Samar Abbas, Shung Lai Franky Lam, Noaa Avital
  • Publication number: 20100306592
    Abstract: A computer system on/off test apparatus includes a time control unit receiving a time interval value and a repetition value, a detecting unit detecting signal parameters of the computer system, and a test control unit receiving an external power supply and switching the power connection between the external power supply and the computer system. The test control unit saves a number of acceptable ranges. The test control unit receives a power-on status signal returned from the computer system in response to the computer system is powered. The test control unit determines whether the power-on status signal is correct and the detected signal parameters of the computer system are within the acceptable ranges correspondingly. The test control unit turns off the computer system after the interval time, and then turns on the computer system to repeat the above process until the test number of tests reaches the repetition value.
    Type: Application
    Filed: July 6, 2009
    Publication date: December 2, 2010
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Ting-Chung Wang
  • Publication number: 20100293014
    Abstract: An ad test tool allows rich media developers to test ads in both a stand-alone environment and within live web pages. The ad test tool includes a stand-alone ad test tool, a live site ad test tool, and a rules and compliancy engine. The stand-alone ad test tool tests ads in a stand-alone environment by providing the ad rendering framework necessary to render ads on the user's local device. The live site ad test tool tests ads on live web pages. The live site ad test tool includes a proxy that intercepts ad requests from web pages and replaces the ads on the web pages with test ads. The rules and compliancy engine checks test ads for compliancy for security and privacy purposes and also verifies that click tracking and/or impression tracking operate properly.
    Type: Application
    Filed: May 13, 2009
    Publication date: November 18, 2010
    Applicant: MICROSOFT CORPORATION
    Inventors: KALPIT JAIN, VENKATESH MANIAN, MATTHEW DAVID BARBOUR
  • Publication number: 20100286797
    Abstract: A method for testing the safety automation logic used in a manufacturing cell includes recording control signals of a safety-related component such as an E-Stop, light curtain, gate lock, or a safety mat using a host machine, and then disconnecting the component from the host machine. The recorded test signals are transmitted to an automation controller in accordance with a test scenario from a test scenario generator module (TSGM) to emulate operation of the component. The automation logic may be certified using the playback of the recorded test signals. A system for testing the safety automation logic includes the controller, host machine, and TSGM. The host machine records the control signals and plays back the test signals on the controller to emulate operation of the component. The automation control logic may be certified using the test signals, e.g., by comparing these to the test specification or standard.
    Type: Application
    Filed: May 11, 2009
    Publication date: November 11, 2010
    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS, INC.
    Inventors: Jing Liu, Chengyin Yuan, Fangming Gu, Stephan R. Biller, Demet C. Wood, Daniel B. Aufderheide
  • Publication number: 20100287403
    Abstract: Fault management and providing resilience against failures is an useful for many networks. Protection techniques are used to ensure that networks can continue to provide reliable service and to provide redundant capacity within a network to reroute traffic in presence of a failure. A method or corresponding apparatus according to an example embodiment of the present invention relates to determining availability in a network. The example embodiment calculates availability on a per demand basis for working, protection, and restoration paths among all demands in the network and reports the availability. The reported availability may be used to plan and suggest changes to the network or to recommend addition of equipment to improve the availability of the network while ensuring that service level agreements are satisfied.
    Type: Application
    Filed: May 6, 2009
    Publication date: November 11, 2010
    Applicant: Tellabs Operations, Inc.
    Inventors: David W. Jenkins, Ramasubramanian Anand, Hector Ayala, Abhishek J. Desai, Kenneth M. Fisher
  • Publication number: 20100287413
    Abstract: Techniques are generally described for addressing computation errors via coordinated computation on two computing platforms are disclosed. In some embodiments, one or more cuts may be taken of a computation to observe variables, and the observations may be analyzed to detect errors. Corrections may be created for the detected errors. The disclosed techniques may be employed in power and/or energy minimization/reduction, and debugging, among other goals. Other embodiments may be disclosed and/or claimed.
    Type: Application
    Filed: May 11, 2009
    Publication date: November 11, 2010
    Inventor: Miodrag Potkonjak
  • Publication number: 20100281299
    Abstract: A set of file system data structure and file system recognition APIs are disclosed that may allow an operating system to identify a partition of a storage device as having a valid file system, even if the operating system does not know how to access the file system a priori. File systems implement these data structures in a standardized, known location within a partition on the storage device such that an operating system may use APIs or other functions to examine that known location for the presence of these data structures. Information on how to interpret the data structure may be obtained using a network or other source.
    Type: Application
    Filed: May 4, 2009
    Publication date: November 4, 2010
    Applicant: MICROSOFT CORPORATION
    Inventors: Matthew S. Garson, Ravinder S. Thind, Darwin Ou-Yang, Karan Mehra, Neal R. Christiansen
  • Publication number: 20100271557
    Abstract: A digital television (DTV) transmitter and a method of processing data in the DTV transmitter/receiver are disclosed. In the DTV transmitter, a pre-processor pre-processes the enhanced data by coding the enhanced data for forward error correction (FEC) and expanding the FEC-coded data. A packet formatter generates one or more groups of enhanced data packets, each enhanced data packet including the pre-processed enhanced data and known data, wherein the data formatter adds burst time information into each group of enhanced data packets. And, a packet multiplexer generates at least one burst of enhanced data by multiplexing the one or more groups of enhanced data packets with at least one main data packet including the main data, each burst of enhanced data including at least one group of enhanced data packets.
    Type: Application
    Filed: June 3, 2010
    Publication date: October 28, 2010
    Inventors: Kyung Won Kang, Kook Yeon Kwak, Ja Hyuk Koo, Kyung Wook Shin, Yong Hak Suh, Young Jin Hong, Sung Ryong Hong
  • Publication number: 20100269026
    Abstract: The disclosed technology provides systems and methods for identifying potential error locations, patterns, and likelihood metrics in connection with trellis-based detection/decoding. In one aspect of the invention, the disclosed technology detects information that was previously encoded based on a trellis, and decodes the detected information based on the trellis to provide decoded information. The decoded information corresponds to a winning path through the trellis that ends at a winning state. The disclosed technology can identify one or more alternate paths through the trellis that also end at the winning state, and can generate a potential error pattern for each of the alternate paths.
    Type: Application
    Filed: June 28, 2010
    Publication date: October 21, 2010
    Inventors: Shaohua Yang, Seo-How Low, Zining Wu, Gregory Burd
  • Publication number: 20100268997
    Abstract: In order to monitor and control the operational performance of a computer system or processor system (1), operational parameters of individual components as well as environmental parameters of the computer system or processor system (1) are detected. Said parameters are compared with predetermined limit values. If it is determined that one or more of the detected operational parameters and environmental parameters have exceeded or fallen below of the predetermined limit values, an operational event is determined based on the limit values that have been exceeded or fallen bellow of. A reaction is selected from a number of predetermined reaction patters according to the determined operational event, and a control command which corresponds to this reaction and which is provided for altering the operational performance is transmitted to the computer to be monitored. This enables an early detection of the occurrence of faults as well as the initiation of an appropriate measure.
    Type: Application
    Filed: April 20, 2010
    Publication date: October 21, 2010
    Inventors: Peter Planki, Karl-Heinz Lettmair
  • Publication number: 20100262871
    Abstract: The present invention describes a new method for implementing highly available data-parallel-operations on a computational grid. This new method provides high availability after a server fails or the grid experiences a partial network failure. The present invention invokes the data parallel operation's method on selected objects stored in partitions within a highly available distributed cache. It thereby takes advantage of the use of highly available data partitions implemented by the distributed cache as a means for reliably tracking the progress of method invocations within a data parallel operation even after a server or network failure occurs. Using the cache's partitions as the basis for tracking enables the present invention's method to restart method invocations and thereby ensure completion of the data-parallel operation. It also uses a completion object within the cache to ensure that completion of the data parallel operation is detected and reported in a highly available manner.
    Type: Application
    Filed: October 3, 2008
    Publication date: October 14, 2010
    Inventor: Bain L. William
  • Publication number: 20100262859
    Abstract: Systems and methods that provide fault tolerant transmission control protocol (TCP) offloading are provided. In one example, a method that provides fault tolerant TCP offloading is provided. The method may include one or more of the following steps: receiving TCP segment via a TCP offload engine (TOE); calculating a TCP sequence number; writing a receive sequence record based upon at least the calculated TCP sequence number to a TCP sequence update queue in a host; and updating a first host variable with a value from the written receive sequence record.
    Type: Application
    Filed: June 23, 2010
    Publication date: October 14, 2010
    Applicant: BROADCOM CORPORATION
    Inventor: Kan Frankie Fan
  • Publication number: 20100262888
    Abstract: Provided is a decoding apparatus and method based on a variable error correction value. The decoding method includes setting an initial normalized factor and a normalized factor correction value, initially updating a check node based on the initial normalized factor, and updating the check node based on a variable error correction value acquired by adding the initial normalized factor and the normalized factor correction value.
    Type: Application
    Filed: December 15, 2008
    Publication date: October 14, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Euna Choi, Dae-Ig Chang, Kijoon Lee, Habong Jung
  • Publication number: 20100257431
    Abstract: A prediction signal calculator with a limit function is provided with a multiplier calculating a partial prediction signal composed of the product of a polar prediction coefficient for generating a regenerative signal and a quantized regenerative signal, a display conversion section for converting the partial prediction signal from floating point representation to an absolute value display, and a limiter executing processing for substituting limit values in the partial prediction signal satisfying overflow conditions during conversion of the partial prediction signal from floating point representation to an absolute value display in the event that the error detector determines that there are code errors in the audio data for a predetermined number of frames of the audio data.
    Type: Application
    Filed: June 10, 2010
    Publication date: October 7, 2010
    Applicant: UNIDEN CORPORATION
    Inventors: Eiji Shinsho, Shigeo Sato
  • Publication number: 20100257437
    Abstract: An apparatus for managing a data backup is disclosed. In accordance with the apparatus of the present invention, an integrity verification data randomly extracted according to a predetermined condition is used to facilitate a checking of an error that may exist in a backup data, and extracting and locating the integrity verification data are facilitated by using an index data, thereby minimizing a work time for verifying an integrity of the backup data.
    Type: Application
    Filed: June 30, 2009
    Publication date: October 7, 2010
    Applicant: KOREA I.O. TECH
    Inventors: Juncheol Hwang, Seunghoon Shin
  • Publication number: 20100251048
    Abstract: A method implemented in a test system comprises a test debug system and a target system, said target system comprising a test access port that functions according to a plurality of states and also comprising an adapter. The method comprises the adapter transferring data to the test debug system while the test access port remains in a predefined state. The predefined state comprises a state in which no scans occur.
    Type: Application
    Filed: June 14, 2010
    Publication date: September 30, 2010
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Gary L. Swoboda
  • Publication number: 20100242025
    Abstract: A processing apparatus, which contains a processor that executes a program includes a series of instructions, includes a log recording unit configured to record an operation log of the processing apparatus; a managing unit configured to control a recording operation performed by the log recording unit and read the operation log recorded in the log recording unit; an input unit configured to detect, from among the series of instructions of the executed program; a start instruction that starts a process for delivering a control instruction destined for the managing unit to the managing unit and deliver the control instruction to the managing unit in response to the start instruction; and an output unit configured to receive the operation log read by the managing unit.
    Type: Application
    Filed: March 17, 2010
    Publication date: September 23, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Iwao Yamazaki, Michiharu Hara, Eiji Yamanaka
  • Publication number: 20100228940
    Abstract: Various embodiments include one or more memory devices having at least two planes of physical blocks organized into super blocks, with each super block including a physical block from each of the at least two planes. Embodiments include determining defective blocks within the planes. If none of the blocks at a particular block position are determined to be defective, embodiments include assigning the blocks at the particular block position to a super block, and if one or more of the blocks at a particular block position are determined to be defective, embodiments include: assigning the blocks at the particular block position determined to be defective to a super block; and assigning a respective replacement block to the super block for each of the one or more blocks at the particular block position determined to be defective. The respective replacement block is selected from a number of blocks within a respective one of the planes that includes the respective block determined to be defective.
    Type: Application
    Filed: March 4, 2009
    Publication date: September 9, 2010
    Applicant: Micron Technology, Inc.
    Inventors: Mehdi Asnaashari, Alan Chen, Siamack Nemazie
  • Publication number: 20100229042
    Abstract: An apparatus is provided for performing testing of at least a portion of a system under test via a Test Access Port (TAP) configured to access the system under test. The apparatus includes a first processor for executing instructions adapted for controlling testing of at least a portion of the system under test via the TAP, and a second processor for supporting an interface to the TAP. The first processor is configured for detecting, during execution of the test instructions, TAP-related instructions associated with control of the TAP, and propagating the TAP-related instructions toward the second processor. The second processor is configured for receiving the TAP-related instructions detected by the first processor and processing the TAP-related instructions. The first processor is configured for performing at least one task contemporaneously with processing of the TAP-related instructions by the second processor. An associated method also is provided.
    Type: Application
    Filed: June 30, 2009
    Publication date: September 9, 2010
    Inventors: Suresh Goyal, Michele Portolan, Bradford Van Treuren
  • Publication number: 20100205495
    Abstract: Two common varieties of test interfaces exist for ICs and/or cores, the IEEE 1149.1 Test Access Port (TAP) interface and internal scan test ports. The TAP serves as a serial communication port for accessing a variety of circuitry including; IEEE 1149.1 boundary scan circuitry, built in self test circuitry, internal scan circuitry, IEEE 1149.4 mixed signal test circuitry, IEEE P5001 in-circuit emulation/debug circuitry, and IEEE P1532 in-system programming circuitry. Internal scan test ports serve as a serial communication port for primarily accessing internal scan circuitry within ICs and cores. Today, the TAP and internal scan test ports are typically viewed as being separate test interfaces, each utilizing different IC pins and/or core terminals.
    Type: Application
    Filed: April 21, 2010
    Publication date: August 12, 2010
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Lee D. Whetsel
  • Publication number: 20100205474
    Abstract: A distributed computer system is disclosed which contains at least two physical computers and at least two services installed in the system. The computers function as servers for at least one of the services. To make the system redundant, at least one of the physical computers, in addition to containing the server functionality of a first service, also contains a virtual machine having the server functionality of a second service. A method is also disclosed for implementing redundant server functionalities in a distributed computer system.
    Type: Application
    Filed: March 2, 2010
    Publication date: August 12, 2010
    Applicant: ABB RESEARCH LTD
    Inventors: Christian M. STICH, Marcel Dix, Mats A. Petterson
  • Publication number: 20100199146
    Abstract: In a storage controller provided for a storage system provided with a plurality of disk devices, for controlling to storage data in the plurality of disk devices, an encoding unit encodes data to be stored in the plurality of disk devices by erasure correction coding to obtain encoded data. A storage/reading unit stores the encoded data in the plurality of disk devices and fetches the encoded data from the plurality of disk devices, according to instructions from a personal computer. A transmitting unit transmits the encoded data fetched from the plurality of disk devices by the storage/reading unit to a storage system 1B connected to a storage system 1A via a network.
    Type: Application
    Filed: April 7, 2010
    Publication date: August 5, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Yuichi Sato, Hiroaki Kameyama
  • Publication number: 20100169703
    Abstract: A system and associated method for determining an incident of a resource in a computing environment. An event pertaining to the resource is processed by a system automation module. The event is represented as an associated event data having parameters of a target state, a target state prior to the event, a current state, and a current state prior to the event. First, the target state is compared to the target state prior to the event to assure that the target state is steady. Wherein a determination that the event is an incident cannot be made after comparing the target state and the current state, the system automation module compares the current state to the current state prior to the event. Upon determining that the event is an incident, the event data is marked and stored in a repository.
    Type: Application
    Filed: December 29, 2008
    Publication date: July 1, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas Lumpp, Wolfgang Schaeberle, Juergen Schneider, Isabell Schwertle
  • Publication number: 20100162051
    Abstract: An integration agent device and its fault management method for a node including multi-layered devices are disclosed to effectively control a node including two or more communication devices of different layers and integrally processing relevant fault information. The integration agent device includes: one or more control and management modules controlling and managing one or more communications network devices by layer; and an inter-layer interworking processing module integrating and processing information of the communications network devices by using inter-layer interworking information, and notifying a management system accordingly, wherein the information of the communications network devices is transmitted through the one or more control and management.
    Type: Application
    Filed: August 19, 2009
    Publication date: June 24, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Seung Hyun YOON, You Hyeon JEONG, Hyung Seok CHUNG
  • Publication number: 20100162057
    Abstract: A method for detecting disturb phenomena between neighboring blocks in non-volatile memory includes, sequentially erasing and writing test data (pattern) to each block of a plurality of blocks under test in the non-volatile memory at a first time point, dividing the plurality of blocks under test into a first block group and a second block group based on ordinal number included in each block of the plurality of blocks under test, reading data from each block of the first block group at a second time point, and comparing the data with the test data written at the first time point to generate a first detecting result, and determining applicability of each block of the first block group based on the first detecting result.
    Type: Application
    Filed: January 15, 2009
    Publication date: June 24, 2010
    Inventor: Cheng-Pin Wang
  • Publication number: 20100162027
    Abstract: A system and method are provided for the determining of the potential effect(s) that a degraded system, subsystem, or component may have on the overall capabilities of a vehicle or other system, and any mitigating actions that may need to be taken. Mission-related capabilities of the system are decomposed into a plurality of lower-level capabilities that have an impact on the mission-related capabilities. One or more faults that have an impact on at least one of the lower-level capabilities are mapped to appropriate lower-level capabilities. The lower-level capabilities to which the one or more vehicle faults is mapped are computed, and values of the mission-related capabilities are computed from each of the lower-level capabilities.
    Type: Application
    Filed: December 22, 2008
    Publication date: June 24, 2010
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventors: Robert C. McCroskey, Harold Carl Voges, Darryl Busch, George Daniel Hadden
  • Publication number: 20100152919
    Abstract: A vehicle management and mission management computer architecture and packaging may include a first line replaceable unit and a second line replaceable unit. The first line replaceable unit may include a vehicle management system computer channel coupleable to a group including at least one mission related system and at least one vehicle system. The first line replaceable unit may also include a mission management system computer channel coupleable to the group including the at least one mission related system and the at least one vehicle system. The second line replaceable unit may include another vehicle management system computer channel coupleable to the group including the at least one mission related system and the at least one vehicle system. The second line replaceable unit may also include another mission management system computer channel coupleable to the group including the at least one mission related system and the at least one vehicle system.
    Type: Application
    Filed: February 16, 2010
    Publication date: June 17, 2010
    Inventors: RONALD W. DAVIDSON, KEVIN A. WISE
  • Publication number: 20100138695
    Abstract: Signal-integrity measurement systems and methods utilizing unique time-base generation techniques for controlling the sampling of one or more signals under test. A time-base generator made in accordance with the present disclosure includes a phase filter and modulation circuitry that generates a rapidly varying phase signal as a function of the output of a sigma-delta modulator. The phase filter filters unwanted high-frequency phase components from the rapidly varying phase signal. The filtered signal is used to clock one or more samplers so as to create sampling instances of the signal(s) under test. The sampling instances are then analyze using any one or more of a variety of techniques suited to the type of signal(s) under test.
    Type: Application
    Filed: February 5, 2010
    Publication date: June 3, 2010
    Applicant: DFT MICROSYSTEMS, INC.
    Inventor: Mohamed M. Hafed
  • Publication number: 20100131797
    Abstract: A system and method for assessing and remedying accessibility of websites is provided. The method includes receiving a website address for assessment, an accessibility guideline and level of assessment to be performed from the user. The method further includes crawling the website for extracting information. The information comprises HTML tags used in designing a webpage. Thereafter, the website is scanned for checking conformance to one or more accessibility parameters. Finally, one or more assessment reports are provided to the user.
    Type: Application
    Filed: November 13, 2009
    Publication date: May 27, 2010
    Applicant: INFOSYS TECHNOLOGIES LIMITED
    Inventors: Jai GANESH, Navin KASA, Shaurabh BHARTI, Srinivas PADMANABHUNI, Mayank MATHUR, Ajay KOLHATKAR, Shrirang Prakash SAHASRABUDHE
  • Publication number: 20100131800
    Abstract: A diagnostic device which detects a fault and estimates its cause on the basis of the degree of variation of each attribute of data containing a plurality of attributes obtained by measuring a diagnosis subject. A diagnosis subject variation degree pattern generation means (110) calculates the degree of variation of each attribute of the diagnosis subject data containing the attributes obtained by measuring the diagnosis subject and generates a diagnosis subject variation degree pattern which is a combination of the degrees of variation of the attributes. A reference variation degree pattern storage device (150) stores a reference variation degree pattern composed of the degrees of variation of the attributes in association with the type of the fault and the diagnosis event of the type of the cause.
    Type: Application
    Filed: March 21, 2008
    Publication date: May 27, 2010
    Applicant: NEC CORPORATION
    Inventors: Ryohei Fujimaki, Takayuki Nakata, Akinori Satou, Hidenori Tsukahara
  • Publication number: 20100125760
    Abstract: A method for monitoring the status of a memory device is disclosed. The method includes, during operation of the memory device, exercising a first portion of the memory device more than at least one other portion of the memory device in order to induce an accelerated rate of aging of the first portion. The first portion is monitored to detect at least a potential for a failure in the first portion. According to the method, in response to monitoring the first portion, at least one corrective action is performed. Apparatus and computer readable media are also disclosed.
    Type: Application
    Filed: November 14, 2008
    Publication date: May 20, 2010
    Inventors: Janne T. Nurminen, Kimmo J. Mylly, Matti K. Floman
  • Publication number: 20100125745
    Abstract: A method and system for measuring a customer impacting failure rate in a communication network are disclosed. For example, the method collects a plurality of customer impacting network failure events, where the plurality of customer impacting network failure events comprises both hardware failure events and software failure events associated with a particular type of router or switch, or a particular type of component of the router or the switch. The method computes a Mean Time Between Outage (MTBO) metric from the plurality of customer impacting network failure events and compares the MTBO metric with a MTBO goal metric, wherein the MTBO goal metric is calculated in accordance with a predicted Mean Time Between Failure (MTBF) metric.
    Type: Application
    Filed: November 18, 2008
    Publication date: May 20, 2010
    Inventors: Yaakov Kogan, Rajesh Patki
  • Publication number: 20100122119
    Abstract: A method to manage performance monitoring and problem determination in a context of a service application is provided. The method includes distributing performance monitoring reusable templates to the computing system that describe a set of required monitoring products, a set of scenarios with key performance indicators (KPI) relevant to the service application, and a set of best practices solutions describing how a potential performance incident is to be handled, during instantiation of the service application, deriving from the reusable templates actual performance monitoring characteristics related to various selected components of the computing system, and customizing the reusable templates to the service application in accordance with the actual performance monitoring characteristics by determining whether a number and a type of monitoring agents and/or scenarios with associated KPIs are to be changed, determining whether different KPIs exist and by determining whether solutions exist for an incident.
    Type: Application
    Filed: November 12, 2008
    Publication date: May 13, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Georg Bildhauer, Ulrich Hild, Juergen Holtz
  • Publication number: 20100106678
    Abstract: Methods, systems, and computer-readable media for monitoring information passed from instances of role(s) of a service application installed on a distributed computing platform and for indexing and analyzing the information within a data store are provided. Monitoring involves a monitoring agent that is integrated within an operating system of computing devices that make up the distributed computing platform. In operation, the monitoring agent retrieves information from the role instances and converts the information into parameters that are assembled to documents. Generally, the parameters are assembled to a uniform-structured format in accordance with a schema imposed by the distributed computing platform. Accordingly, each of the documents across the platform have a common format that promotes processing and analysis without a need for reconfiguration.
    Type: Application
    Filed: October 24, 2008
    Publication date: April 29, 2010
    Applicant: Microsoft Corporation
    Inventors: Paul Pietrek, Jose Bernabeu-Auban, Christopher Marsh, Vamshidhar Kommineni, Richard E. Wilbur
  • Publication number: 20100095160
    Abstract: A tester that generates various data patterns to assure that link receivers and transmitters are functioning properly (i.e., are functioning according to a relevant network specification) across the entire storage area network. In various embodiments, this tester may be used in Fibre Channel type SANs or in fiber connectivity (FICON) type SANs.
    Type: Application
    Filed: October 14, 2008
    Publication date: April 15, 2010
    Inventors: Louie A. Dickens, Olive P. Faries, Michael E. Starling, David L. Binning
  • Publication number: 20100095148
    Abstract: A link table recovery method for a flash memory having a plurality of blocks is provided. The method includes: selecting one block from the blocks; selecting a last page containing data of the selected block; checking the last page to determine whether the last page has errors; moving the correct data in the selected block to one of the spare blocks when the last page of the selected block detects errors; and updating a link table of the flash memory.
    Type: Application
    Filed: October 15, 2008
    Publication date: April 15, 2010
    Applicant: SILICON MOTION, INC.
    Inventor: Chia-Hsin Cheng
  • Publication number: 20100088538
    Abstract: A method for determining a probabilistic loss of function of a system includes the steps of determining a plurality of failure mode probabilities, ranking a plurality of functions pertaining to the failure mode probabilities, and identifying a likely function at least substantially lost by the system based at least in part on the plurality of failure mode probabilities and the ranking.
    Type: Application
    Filed: October 2, 2008
    Publication date: April 8, 2010
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventors: David Kolbet, Qingqiu Ginger Shao, Randy Magnuson, Bradley John Barton, Akhilesh Maewal