Abstract: Provided are a semiconductor chip, a method of fabricating a semiconductor chip, and a semiconductor chip stack package. The semiconductor chip includes a semiconductor substrate and a semiconductor device on the semiconductor substrate. A dielectric covers the semiconductor device. A top metal is on the dielectric and electrically connected to the semiconductor device. A deep via penetrates the semiconductor substrate and the dielectric. An interconnection connects the deep via and the top metal electrically. A bump is in contact with the top metal and the interconnection.

Abstract: Embodiments relate to a Complementary Metal Oxide Semiconductor (CMOS) image sensor, and to a method for manufacturing the same, that improves the low-light level characteristics of the CMOS image sensor. The CMOS image sensor has a photosensor unit and a signal processing unit, and may include a semiconductor substrate having a device isolating implant area provided with a first ion implant area and a complementary second ion implant area within the first ion implant area; a device isolating layer in the signal processing unit; a photodiode in the photosensor unit; and transistors in the signal processing unit. A crystal defect zone neighboring the photodiode may be minimized using the device isolating implant area between adjacent photodiodes so that a source of dark current can be reduced and the occurrence of interface traps can be prevented, making it possible to improve the low-light level characteristics of the image sensor.

Abstract: The present invention is a multiple-apparatus connection system; the multiple-apparatus connection system comprises a USB port, a controller, and a voltage determining device. The USB port connects to a peripheral device. The voltage determining device connects to the USB port to generate a detection voltage signal. The controller receives the detection voltage signal and determines the type of the connected peripheral device according to the detection voltage signal.

Abstract: A semiconductor device and a method for manufacturing the same are disclosed, in which an insulating layer may be formed in a strained silicon layer under source/drain regions to substantially overcome conventional problems resulting from a channel decrease in the semiconductor device.

Abstract: An image sensor includes a metal interconnection and readout circuitry over a first substrate, an image sensing device, and an ion implantation isolation layer. The image sensing device is over the metal interconnection, and an ion implantation isolation layer is in the image sensing device. The image sensing device includes first, second and third color image sensing units, and ion implantation contact layers. The first, second and third color image sensing units are stacked in or on a second substrate. The ion implantation contact layers are electrically connected to the first, second and third color image sensing units, respectively.

Abstract: Disclosed is a method of manufacturing a phase-change memory in which the lower electrode of the phase-change memory device is formed using barrier metal for forming a metal interconnection and a via in damascene and dual damascene processes. The method includes the steps of patterning an insulating layer on a semiconductor substrate, sequentially forming barrier metal and metal on the patterned insulating layer, polishing the metal by a CMP process to planarize the metal and patterning the planarized barrier metal to a lower electrode of a desired phase-change memory device, depositing an insulating layer on the patterned lower electrode, forming a hole in the deposited insulating layer, and forming an upper electrode on the resultant material to pattern the upper electrode, and depositing an insulating layer on the upper electrode and forming a via for connecting a metal interconnection and the lower electrode to each other. Therefore, additional deposition for forming the lower electrode is not necessary.

Abstract: An ESD protecting circuit and a manufacturing method thereof are provided. The ESD protecting circuit includes a device isolation layer, first and second high-concentration impurity regions, a third high-concentration impurity region of a complementary type, first and second conductive wells, and a fourth conductive impurity region. The ESD protecting circuit is configured as a field transistor without a gate electrode, and the high breakdown voltage characteristics of the field transistor are lowered by implanting impurity ions, providing an ESD protecting circuit with a low breakdown voltage and low leakage current. Because the leakage current is reduced, the ESD protecting circuit can be used for an analog I/O device that is sensitive to current fluxes. Also, an N-type well may protect a junction of the field transistor.

Abstract: A novel concentrator system is described, which increases the efficiency of collecting sunlight energy and concentrates it on a target. This method uses an array of small movable reflective or refractive concentrator components that can move via a feedback mechanism which tracks the sun and concentrates the suns energy on to a second array of energy converting elements. In order to improve the effective collected energy, the array of concentrator elements is placed on a moving or tiltable flat slab (or dish, substrate, plane, plate, holder, tablet, or similar flat or non-flat surface) that tracks the sun. An alternative method uses an array of target elements or linear elements and a second array of concentrator elements in harmony such that and suns energy is efficiently redistributed by the reflective/reactive array on to the energy converting array as the sun's position in the sky (elevation and azimuth) changes.

Abstract: An image sensor may include a dielectric, a metal interconnection, an align key, a first substrate, a photodiode, and a transparent electrode. The first substrate may include a pixel region, a peripheral circuitry region and a scribe lane. The dielectric may include a metal interconnection and an align key over the first substrate. The photodiode may be formed over the pixel region and the scribe lane. The transparent electrode may be formed over the photodiode. The align key may have a protrusion formed in a center thereof.

Abstract: A method, software, and system for placing circuit elements and routing wires. The method, software, and system generally include the steps of (a) determining a boundary condition for signal paths between components in a circuit, wherein each of the components receives a clock signal and the signal paths include n wires and (n?1) circuit elements in alternating serial communication between the components, n being 2 or more; and (b) placing the circuit elements and routing the wires between the comments and the circuit elements such that no signal path in the circuit exceeds the boundary condition. In preferred embodiments, the boundary condition is a maximum length, and the method further includes placing the clocked components in a floor plan such that no signal path can exceed the boundary condition. The present invention advantageously ensures that timing requirements for signal paths between clocked circuit components are met automatically.

Abstract: Apparatus and method for forming a stackable container from a container blank. The apparatus generally includes a blank feeder configured to place the blank on a conveyor, an index folder configured to pre-fold a plurality of inner fold-down flaps and an index flap over each of two opposing sidewall flaps of the blank, and a pressure former configured to attach a first leading extension to a leading wall of the blank and a first trailing extension to a trailing wall of the blank, wherein the first leading extension and the first trailing extension are foldably attached at an angle of about 90 degrees to one of the inner fold-down flaps or one of the sidewall flaps. Embodiments of the present the present invention can advantageously provide a reliable approach for forming a container from a blank with relatively fewer folding defects.

Abstract: Deterioration of yield may be prevented when a contact in a semiconductor device is made by a method including forming a contact hole by selectively removing an insulating layer from a semiconductor substrate, depositing a barrier layer on the insulating layer and on the surface of (or in) the contact hole, depositing an initial tungsten layer on the barrier layer to at least a predetermined thickness, removing particles generated during at least one of the depositing steps, and filling the contact hole with an additional tungsten layer.

Abstract: Semiconductor devices and methods of fabricating semiconductor devices are disclosed. A disclosed semiconductor device includes a silicon substrate, a source region and a drain region. A gate electrode is formed on the silicon substrate. Also, a metal silicide layer is formed on each of the gate electrode, the source region, and the drain region. The metal silicide layer has a thickness uniformity of about 1˜20%. A disclosed fabrication method includes forming a metal layer on a silicon substrate having a gate electrode, a source region, and a drain region; performing a plasma treatment on the metal layer; forming a protective layer on the metal layer; and heat treating the silicon substrate on which the protective layer is formed to thereby form a metal silicide layer. A gas that includes nitrogen is used as a plasma gas during the plasma treatment.

Abstract: An improved bipolar junction transistor and a method for manufacturing the same are provided. The bipolar junction transistor includes: a buried layer and a high concentration N-type collector region in a P-type semiconductor substrate; a low concentration P-type base region in the semiconductor substrate above the buried layer; a first high concentration P-type base region along an edge of the low concentration P-type base region; a second high concentration P-type base region at a center of the low concentration P-type base region; a high concentration N-type emitter region between the first and second high concentration base regions; and insulating layer spacers between the high concentration base regions and the high concentration emitter regions. In the bipolar junction transistor, the emitter-base distance can be reduced using a trench and an insulating layer spacer. This may improve base voltage and high-speed response characteristics.

Abstract: Provided is a mask pattern of a semiconductor device. The mask pattern includes a plurality of main patterns and a plurality of assistance patterns. The main patterns are adjacent to one another. The assistance pattern is disposed on at least one of an end portion and a middle portion of each of the main patterns and has a line width greater than that of the main pattern. The assistance patterns are staggered.

Abstract: An apparatus and method for testing an integrated circuit in a target electronic application, wherein the apparatus includes a socket for receiving the integrated circuit, a modified commercial electronic product which models the target electronic application, and an electrical connection between the socket and the modified commercial electronic product. The method of testing an integrated circuit includes placing an integrated circuit in a socket that is coupled to a circuit board substantially identical to that of a circuit board configured to include the integrated circuit, but which does not include the integrated circuit, and testing the integrated circuit. A method of making such a tester mechanically attaching a socket to a modified commercial electronic product and electrically connecting an integrated circuit and the modified commercial electronic product. This approach allows for cheaper, more comprehensive, and more accurate testing of an integrated circuit.

Abstract: A method of making hydrogenated Group IVA compounds having reduced metal-based impurities, compositions and inks including such Group IVA compounds, and methods for forming a semiconductor thin film. Thin semiconducting films prepared according to the present invention generally exhibit improved conductivity, film morphology and/or carrier mobility relative to an otherwise identical structure made by an identical process, but without the washing step. In addition, the properties of the present thin film are generally more predictable than those of films produced from similarly prepared (cyclo)silanes that have not been washed according to the present invention.

Abstract: Disclosed are an MIM (Metal-Insulator-Metal) capacitor and a method of manufacturing the same. The MIM capacitor includes: a lower metal layer and a lower metal interconnection on a substrate; a barrier metal layer on the lower metal layer; an insulating layer on the barrier metal layer; an upper metal layer on the insulating layer; an interlayer dielectric layer having a via hole on the lower metal interconnection; and a plug in the via hole.

Abstract: Disclosed are an image sensor and a method for manufacturing the same, capable of increasing a light absorbing coefficient by forming a rough surface on a photodiode. The image sensor includes a semiconductor substrate with a plurality of photodiodes thereon having rough upper surfaces, a dielectric layer on the semiconductor substrate, a color filter layer on the dielectric layer, a planarization layer on an entire surface of the semiconductor substrate including the color filter layer, and a plurality of micro-lenses formed on the planarization layer to correspond to the color filter layer.

Abstract: A digital camera which allows voice annotations to be recorded for each picture, but which includes text annotations with each such picture when the picture is transmitted from the camera. The digital camera includes an image sensing apparatus operable to receive light comprising an image and output image data representing the image, a first memory operable to store the image data, a sound sensing apparatus operable to receive a sound and output sound data representing the sound, wherein the sound is speech and the sound data is voice data, a second memory operable to store the voice data, a third memory operable to store text data; and a voice recognition apparatus operable to access the second memory, translate the stored voice data into text data and store the text data in the third memory, when the digital camera is provided with external power.