Patents Represented by Law Firm Baker & McKenzie
  • Patent number: 8010865
    Abstract: A control channel encoder that uses a channel structure that efficiently transmits more information bits, yet achieves sufficient detection and false alarm performance. Disclosed embodiments use a fixed encoder packet size, tail-biting convolutional coding, and Cyclical Redundancy Check (CRC). Further disclosed is a control channel decoder using Viterbi Decoding and a circular trellis check.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: August 30, 2011
    Assignee: Via Telecom, Inc.
    Inventors: Jian Gu, Hongkui Yang, Pengcheng Su
  • Patent number: 8009486
    Abstract: A semiconductor integrated circuit device includes a write-read clock control signal generating unit that activates a read clock control signal and a write clock control signal in response to one of a write operational mode and a read operational mode after maintaining the read clock control signal and the write clock control signal at a deactivation state in response to one of an idle mode and a refresh operational mode, and a clock buffer that generates a read clock signal and a write clock signal in response to a clock signal, the read clock control signal, and the write clock control signal.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: August 30, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Ki-Tae Kim
  • Patent number: 8009497
    Abstract: An auto-refresh control circuit includes a control signal generating section configured to simultaneously or individually enable first and second control signals in response to an information combination signal having refresh information and operation mode information and first and second chip selection signals, and an auto-refresh signal generating section configured to generate first and second auto-refresh signals in response to a plurality of command signals and the first and second control signals.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: August 30, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Hyung-Wook Moon
  • Patent number: 8006457
    Abstract: A multi-layered roofing shingle is described. The layers of the shingle are connected via a mechanical fastener. A method for manufacturing a multi-layered shingle is also described. The method includes aligning the layers of the shingle, and connecting the layers via at least one mechanical fastener. Further described is a multi-layered shingle having layers that are mechanically fastened by deforming one of the layers into one of the other layers.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: August 30, 2011
    Assignee: Building Materials Investment Corporation
    Inventors: Jesse A. Binkley, Perry J. Prudhomme, Frank M. Bartolic, Louis T. Hahn, Daniel C. DeJarnette, Charles M. Reed, Richard Allen Chasteen, Jr., John W. Haughton, J. Gary Falls, Paul G. Wilson, Casimir Paul Weaver
  • Patent number: 8004758
    Abstract: Polarization preserving front projection screens and diffusers provide optimum polarization preservation for stereoscopic 3D viewing, as well as improved light control for enhanced brightness, uniformity, and contrast for both 2D and 3D systems. Generally, the disclosed screens direct light from a projector toward viewers within a diffusion locus, while maintaining optimum gain characteristics. More specifically, light incident on a region of the front projection screen from a predetermined projection direction is reflected by an engineered surface to a predetermined diffusion locus after undergoing substantially single reflections. The engineered surface, comprised of generating kernels, is used to optimally diffuse illumination light into a range of viewing angles, within the diffusion locus, with suitable gain profile, while optimally preserving polarization for 3D applications.
    Type: Grant
    Filed: August 10, 2009
    Date of Patent: August 23, 2011
    Assignee: RealD Inc.
    Inventors: David A. Coleman, Gary D. Sharp
  • Patent number: 8004928
    Abstract: An active driver control circuit for a semiconductor memory apparatus includes an asynchronous decoding unit that can be activated in response to a bank selection signal, when an external command is a read or write command, can generate an enabled read/write enable signal, and when a precharge signal is enabled, disable the enabled read/write enable signal, a synchronous decoding unit that can be activated in response to the bank selection signal, can generate an enabled active enable signal when the external command is an active command, when the external command is a precharge command, can generate the precharge signal, and output the active enable signal and the precharge signal in synchronization with a clock, and an active driver control signal generating unit that can generate an active driver control signal in response to the active enable signal and the read/write enable signal.
    Type: Grant
    Filed: July 19, 2010
    Date of Patent: August 23, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jong Won Lee
  • Patent number: 8003519
    Abstract: A BEOL manufacturing process for forming a via process between two metal lines on a semiconductor wafer comprises depositing a portion of a first metal adhesion layer within a patterned via hole, followed by a cooling step. The cooling step is then followed by formation of the remainder of the first metal adhesion layer and formation of a second metal adhesion layer within the patterned via hole. This process of forming the remaining portion of the first metal adhesion layer can be referred to as a wafer load, unload, load (LUL) process. By using a LUL process, thermal history is minimized, which reduces Al extrusion at the via interfaces.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: August 23, 2011
    Assignee: Macronix International Co., Ltd.
    Inventors: Tuung Luoh, Chi-Tung Huang, Kuang-Chao Chen, Candy Jiang
  • Patent number: 8001268
    Abstract: Disclosed herein are filtering systems and methods that employ an electronic message source reputation system. The source reputation system maintains a pool of source Internet Protocol (IP) address information, in the form of a Real-Time Threat Identification Network (“RTIN”) database, which can provide the reputation of source IP addresses, which can be used by customers for filtering network traffic. The source reputation system provides for multiple avenues of access to the source reputation information. Examples of such avenues can include Domain Name Server (DNS)-type queries, servicing routers with router-table data, or other avenues.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: August 16, 2011
    Assignee: Google Inc.
    Inventors: Peter K. Lund, Scott M. Petry, Craig S. Croteau, Kenneth K. Okumura, Dorion A. Carroll
  • Patent number: 7994831
    Abstract: A semiconductor integrated circuit is disclosed. The disclosed semiconductor integrated circuit of the present invention includes a DLL (Delay Locked Loop) controller that controls whether to activate a DLL at the entry of a power down mode, in response to a result of detecting whether a range of phase change of an external clock signal is within a predetermined range, and a DLL block that provides a result of comparing a reference clock signal with a feedback clock signal to the DLL controller and also provides a delay locked clock signal that is periodically updated, in response to the reference clock signal, under the control of an activated output signal from the DLL controller.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: August 9, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Hyun-Woo Lee, Won-Joo Yun
  • Patent number: 7995404
    Abstract: A semiconductor IC device includes a core strobe signal generator configured to latch a read command signal according to an internal clock signal to generate a core strobe signal, a core block configured to output data stored in a memory cell in response to the core strobe signal, a data output unit configured to latch data output from the core block according to a plurality of control signals and output the latched data in a predetermined order, and a controller configured to generate the plurality of control signals by using both the core strobe signal and the internal clock signal.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: August 9, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Nak-Kyu Park
  • Patent number: 7994759
    Abstract: The present application describes a system and method for driving a power supply device in an initial activation stage. In one embodiment, the method comprises providing in the power supply device at least one voltage regulator that is coupled with a voltage output adapted to supply a power voltage to a client device, receiving a signal indicative of an activation of the power supply device, and converting the at least one voltage regulator to an equivalent shunting circuit coupled between the voltage output and a reference voltage. Before power voltages are applied at the outputs of the power supply device, shunting paths are thus provided for releasing undesired currents.
    Type: Grant
    Filed: April 13, 2009
    Date of Patent: August 9, 2011
    Assignee: Himax Technologies Limited
    Inventors: Hsien-Ting Huang, Yaw-Guang Chang
  • Patent number: 7995408
    Abstract: A reference voltage supplying circuit can include an internal reference voltage generating unit configured to generate an internal reference voltage, a pad configured to receive an external reference voltage, a switching unit selectively configured to supply the internal reference voltage or the external reference voltage to an internal voltage generator in a test mode.
    Type: Grant
    Filed: July 8, 2008
    Date of Patent: August 9, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Khil-Ohk Kang
  • Patent number: D643127
    Type: Grant
    Filed: September 23, 2008
    Date of Patent: August 9, 2011
    Assignee: OSIM International Ltd.
    Inventor: King Guan Lim
  • Patent number: D643145
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: August 9, 2011
    Assignee: EGLO Leuchten GmbH
    Inventor: Robert Sabernig
  • Patent number: D643149
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: August 9, 2011
    Assignee: EGLO Leuchten GmbH
    Inventor: Robert Sabernig
  • Patent number: D643477
    Type: Grant
    Filed: July 2, 2010
    Date of Patent: August 16, 2011
    Assignee: Wing Hing Manufacturing Co. Ltd.
    Inventors: Lap Kiu Lo, Wai Chung Lo
  • Patent number: D643813
    Type: Grant
    Filed: July 30, 2010
    Date of Patent: August 23, 2011
    Inventors: Francois Portman, Daniel Ferro
  • Patent number: D644342
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: August 30, 2011
    Assignee: DECRA Roofing Systems, Inc.
    Inventors: Willard C. Hudson, Jr., James F. Sauter, Kevin B. Pelka, Geoffrey S. Allan, Peter B. Richards, David R. Painter
  • Patent number: D644691
    Type: Grant
    Filed: July 30, 2010
    Date of Patent: September 6, 2011
    Assignee: Prodir, S.A.
    Inventor: Giorgio Pagani
  • Patent number: D644754
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: September 6, 2011
    Assignee: DECRA Roofing Systems, Inc.
    Inventors: Willard C. Hudson, Jr., James F. Sauter, Kevin B. Pelka, Geoffrey S. Allan, Peter B. Richards, David R. Painter