Abstract: A light emitting diode driving device and light system are provided. The light emitting diode driving device drives a light source by a received alternating current voltage. The light emitting diode driving device includes a rectifier, a feedback unit, a protection unit, a switch unit, a timing unit, and a control unit. The rectifier is electrically coupled to an alternating current voltage source and the light source for providing the alternating current voltage to the light source. The feedback unit is used to detect a loading state and generate a feedback signal according the loading state for outputting the feedback signal. The protection unit is used to receive the feedback signal and compare the feedback signal with a reference voltage built in the protection unit for outputting a switch signal. The switch unit is used to receive the switch signal and connect or disconnect the alternating current voltage source and the light source.

Abstract: A voltage down converter includes a voltage comparator for comparing a first reference voltage and an internal voltage to provide a first driving signal; a driving signal controller coupled with the voltage comparator, the driving signal controller configured to generate a second driving signal in response to an external voltage and selectively providing any one of the first and second driving signals; and a voltage supply coupled with the driving signal controller, the voltage supply configured to receive the selectively provided first and second driving signals, wherein the voltage supply is activated in accordance with the first or second driving signal, thereby providing the internal voltage.

Abstract: A receiver circuit according to the invention includes a first phase transmission unit that is synchronized with a first clock, detects input data according to a plurality of detection levels, and transmits a first output signal, a first discharging control unit that controls a second phase transmission unit in response to the first output signal and adjusts the transmission speed of the second phase transmission unit by changing a node potential where an output of the second phase transmission is determined, and the second phase transmission unit that is synchronized with a second clock, detects the input data according to an output of the first discharging control unit, and transmits a second output signal.

Abstract: A semiconductor integrated circuit includes a multi-mode control signal generating unit configured to control an activation of a up/down mat I/O switch control signal, which controls I/O switches in a up/down mat, according to a multi-test mode signal and a read/write discriminating signal, a multi-mode decoder configured to output multi-mat select signals to simultaneously activate a plurality of mats according to a multi-test mode active write signal, and a mat controller configured to enable word lines and the I/O switches according to the up/down mat I/O switch control signal and the multi-mat select signals.

Abstract: A semiconductor memory apparatus includes a first pad group located along a first edge of a plurality of banks, a second pad group located along a second edge of the plurality of banks opposite the first pad group, and a pad control section configured to provide first and second bonding signals and to implement control operation in response to a test mode signal and a bonding option signal to selectively employ signals from the first and second pad groups.

Abstract: Chain return arrangement and sprocket and chain assembly employed therein with the bow flanks of the horizontal chain links (1) of the chain assembly (10) exhibiting a concave trough at least below an equatorial line (7) and the chain link pockets (52) of the sprocket (50) that receive the horizontal chain links at their tooth flanks (53) in the contact areas (55) to the chain links (1) having a convex crown shape to match the troughed bow flank. This significantly reduces the surface pressures between the two parts.

Abstract: In slicing a crystal bar into silicon wafers, an average about 40% of silicon would be loss due to the widths of slicing wires themselves. The fact that the silicon slurry is discarded as sludge or discarded after recovering silicon carbide particles causes a large waste of cost. If the silicon slurry (40% of silicon) could be recovered as the raw material for growing silicon crystal bars, the production cost would be lowered. The recovery method of silicon slurry according to the present invention could effectively obtain silicon raw material after removing impurities, which could recover the raw material used in solar crystals, further capable of increasing the silicon crystal production and lowering the cost.

Abstract: In a multi-core stream processing system and scheduling method of the same, a scheduler is coupled to a number (N) of stream processing units and a number (N+1) of stream fetching units, where N?2. When the scheduler receives a stream element from a Pth stream fetching unit, the scheduler assigns a Pth stream processing unit as a target stream processing unit when the Pth stream processing unit does not encounter a bottleneck condition, assigns a Qth stream processing unit, which does not encounter the bottleneck condition, as the target stream processing unit when the Pth stream processing unit encounters the bottleneck condition, where 1?P?N, 1?Q?N, and P?Q, and dispatches the received stream element to the target stream processing unit such that the target stream processing unit processes the stream element dispatched from the scheduler.

Abstract: Disclosed herein are filtering systems and methods that employ an electronic message source reputation system. The source reputation system maintains a pool of source Internet Protocol (IP) address information, in the form of a Real-Time Threat Identification Network (“RTIN”) database, which can provide the reputation of source IP addresses, which can be used by customers for filtering network traffic. The source reputation system provides for multiple avenues of access to the source reputation information. Examples of such avenues can include Domain Name Server (DNS)-type queries, servicing routers with router-table data, or other avenues.

Abstract: Disclosed are methods and systems for redeeming virtual coupons by associating the coupons with consumers' credit cards for redemption. In disclosed methods, coupon databases are associated with consumers and associated with the consumers' credit cards. Coupon offers are stored in the coupon databases and are redeemed by consumers by the use of the credit cards that are associated with the consumers' coupon databases.

Abstract: A circuit for generating a pumping voltage in a semiconductor memory apparatus includes a control signal generation block configured to generate a first control signal obtained by level-shifting a voltage level of a test signal to a first driving voltage level, a voltage application section configured to supply an external voltage to a first node in response to a first transmission signal, a first charge pump configured to raise a voltage level of the first node by a first predetermined level in response to an oscillator signal, and a first pumping voltage output section configured to select at least one of a first connection unit and a second connection unit in response to the first control signal, and to interconnect the first node with a second node using the selected connection unit when a second transmission signal is enabled, wherein a first pumping voltage is output through the second node.

Abstract: An apparatus for testing setup/hold time includes a plurality of data input units, each configured to calibrate setup/hold time of input data in response to selection signals and setup/hold calibration signals, and an off-chip driver calibration unit configured to generate the selection signals and the setup/hold calibration signals by using the input data input of one of the plurality of data input units.

Abstract: Systems for assembling and supporting roofing members on a roof structure are described. An exemplary system includes at least one batten extending along a portion of the roof structure. The batten includes receiving portions for removably securing hanger devices along the batten. Related methods for support and assembly are also described.

Abstract: The present invention provides a method of operating a flushing system for efficient waste removal from and cleaning of a toilet bowl. In the disclosed method, a flushing system is provided that includes a pumping means having each of a rim diverter means and a jet diverter means in fluid communication therewith; a sensor means; a control means; a switching means; and a spray means. Activation of the switching means initiates at least a single flush schedule that comprises the steps of initiating operation of the pumping means; opening the jet diverter means for delivery of water to a jet delivery means in fluid communication therewith; subsequently closing the jet diverter means and simultaneously opening the rim diverter means; and directing water from the rim diverter means to a toilet rim in fluid communication therewith for terminal delivery of the water through the spray means.

Abstract: A semiconductor memory apparatus includes an input buffering block configured to buffer an input signal transmitted from an input pin, a latch block configured to latch the input signal buffered by the input buffering block, a defect discriminating block configured to discriminate whether or not the input signal latched by the latch block is defective signal in response to a test mode signal, and a data output buffer configured to buffer an output signal of the defect discriminating block to transmit it to a data output pin, wherein the input signal is one of an input command signal and an input address signal.

Abstract: Disclosed is an input circuit of a semiconductor memory apparatus. The input circuit includes a first buffer and a second buffer. The first buffer has an input terminal connected with a first input pin for receiving a control signal used in a multi-control mode for controlling an entire memory area by dividing the entire memory area, and an output terminal having a first level according to a control mode signal. The second buffer has an input terminal connected with a second input pin for receiving one of plural signals used in a single control mode for controlling the entire memory area without dividing the entire memory area, and an output terminal having a second level according to the control mode signal.