Abstract: Transient distortion is compensated for by multiplying an exponentially-decaying phase shift onto the distorted waveform. The exponentially decaying phase shift waveform is patterned after the transient which typically takes the form of an exponential and occurs upon introduction of power to a circuit or circuit component. A digital circuit produces an appropriate exponentially-decaying waveform which is used as the input for a look up table whose output is a complex sinusoidal waveform capable of compensating for the distortion. The complex sinusoid is multiplied onto the transmitted waveform. The decaying exponential is biased so that it crosses a threshold at which point the compensating circuitry is turned off.

Abstract: A large image sensor structure is created by tiling a plurality of image sensor dies, wherein each of the image sensor dies includes a pixel array that extends to three edges of the die, and control circuitry located along a fourth edge of the die. None of the control circuitry required to access the pixel array (e.g., none of the row driver circuitry) is located in the pixel array, thereby enabling consistent spacing of pixels across the pixel array. Because the pixel array of each image sensor die extends to three edges of the die, the pixel array of each image sensor die can abut up to three pixel arrays in other image sensor dies to form a large image sensor structure having 2×N tiled image sensor dies.

Abstract: Static timing analysis attempts to exhaustively analyze all critical paths of a design. With ever decreasing geometries and ever increasing design complexity, manually identifying timing violations with standard static timing analysis can be very complex and time consuming. A static timing analysis tool can advantageously manage multiple runs having different modes and corners and automatically merge the results generated by the runs. The STA tool can perform the runs either in parallel or in series. Advantageously, the STA tool can save the full timing analysis generated by each run and then extract information from these saved results to form merged results for the design. These merged results can provide different levels of analysis coverage, supply path information at various levels of detail, allow selectable accessibility to information, and highlight propagation of timing changes/violations in the design.

Abstract: A class D amplifier includes a noise-shaping modulator, a pulse width modulator, and a pulse amplifier. The noise-shaping modulator receive a pulse code modulated (PCM) signal and produces an oversampled PCM signal. The pulse width modulator produce a pulse width modulated (PWM) signal from the oversampled PCM signal. The pulse amplifier amplifies the PWM signal to produce an amplified PWM signal. The PWM uses a lookup table to convert from PCM to PWM. A compensation circuit optimizes amplifier performance. An optional demodulator filter converts the amplified PWM signal to an analog signal. The amplifier is ideal for integrated audio applications.

Abstract: Micro-machined (e.g., stress-engineered spring) structures are produced by forming a release layer, forming a partially or fully encapsulated beam/spring structure, and then releasing the beam/spring structure by etching the release layer. The encapsulation structure protects the beam/spring during release, so both the release layer and the beam/spring can be formed using plating and/or using the same material. The encapsulation structure can be metal, resist, polymer, oxide, or nitride, and may be removed after the release process, or retained as part of the completed micro-machined structure.

Abstract: A 3-D optical microscope, a method of turning a conventional optical microscope into a 3-D optical microscope, and a method of creating a 3-D image on an optical microscope are described. The 3-D optical microscope includes a processor, at least one objective lens, an optical sensor capable of acquiring an image of a sample, a mechanism for adjusting focus position of the sample relative to the objective lens, and a mechanism for illuminating the sample and for projecting a pattern onto and removing the pattern from the focal plane of the objective lens. The 3-D image creation method includes taking two sets of images, one with and another without the presence of the projected pattern, and using a software algorithm to analyze the two image sets to generating a 3-D image of the sample. The 3-D image creation method enables reliable and accurate 3-D imaging on almost any sample regardless of its image contrast.

Abstract: A method of providing current mode pulse frequency modulation (PFM) for a switching regulator can include resetting a driver input for a fixed duration when a first current in the driver reaches a first value set by an error amplifier output. The first current can be associated with PMOS switching transistors in the driver. The method can also include setting the driver input signal for the same fixed duration when a second current in the driver reaches a second value. This second current can be associated with NMOS switching transistors in the driver. In one embodiment, the driver can be tristated to ignore both the resetting and the setting. Using this method, perturbations of the inductor current can be substantially corrected and have limited impact on the current waveform beyond the cycle in which they occur.

Abstract: A power amplifier circuit includes two amplifier subsections and delay elements coupled in parallel. An input received by the second amplifier subsection is a delayed version of the input received by the first amplifier subsection. The output of the first amplifier subsection is delayed such that the delayed output of the first amplifier subsection is in phase with the output of the second amplifier subsection. For low output power operation, only the first amplifier subsection is enabled. For high output power operation, both the first and the second amplifier subsections are enabled. The first and the second amplifier subsections operate as saturated amplifiers. A first variable output power control signal controls the output power of the first amplifier subsection, and a second variable output power control signal controls the output power of the second amplifier subsection.

Abstract: A thermal sensor for an integrated circuit including a bandgap reference circuit. The thermal sensor includes a comparator that compares a temperature dependent voltage generated by the bandgap reference circuit to a temperature independent voltage, where both temperatures are referenced to the bandgap reference voltage generated by the bandgap reference circuit. The thermal sensor generates a digital output control signal based on a predetermined relationship between the temperature dependent voltage and the temperature independent reference voltage. When used as a thermal shutdown circuit, the comparator generates a thermal shut-down signal when the dependent temperature voltage decreases (or increases) with rising system temperature to equal to the temperature independent reference voltage. The comparator is implemented using an operational amplifier that is connected to existing circuitry associated with the bandgap reference circuit.

Abstract: An efficient high-temperature water vapor generator includes a combustion chamber and a surrounding structure, wherein a cavity is located therebetween. Water is pumped into the cavity at a location near a first end of the combustion chamber. Water is removed from the cavity at a location near a second end of the combustion chamber, opposite the first end. The water removed from the cavity is injected into the combustion chamber at a location near the first end. Fuel and air are also introduced into the combustion chamber at the first end. The fuel and air are ignited near the first end of the combustion chamber, thereby creating high-temperature water vapor, and pre-heating the water in the cavity surrounding the combustion chamber.

Abstract: A characterized cell library for EDA tools includes receiver model data that provides two or more capacitance values for a given receiver modeling situation (signal type and operating conditions). The receiver model can then use different capacitance values to generate different portions of the model receiver signal, thereby enabling more accurate matching of actual receiver signal timing characteristics. For example, a two-capacitance receiver model can be generated by using the first capacitance value to match the delay characteristics of an actual receiver, and by using the second capacitance (in light of the use of the first capacitance) to match the slew characteristics of that actual receiver. Because typical EDA timing analyses focus mainly on delay and slew (and not the detailed profile of circuit signals), a two-capacitance receiver model can provide a high degree of accuracy without significantly increasing cell library size and computational complexity.

Abstract: A buffer includes a plurality of serial inputs, a plurality of de-serializers, each coupled to a respective input, a plurality n of buffers and a media access controller having inputs coupled to the plurality of de-serializers, data outputs coupled to the buffers, and two control outputs coupled to respective buffers for buffering input data at a clock rate one-nth that of the input data. Preferably the buffer is a bifurcate buffer. In operation, serial packets are received on a port. They must be converted to parallel data for processing by conventional CMOS logic, however there are limits serial to parallel conversion ratio. This buffer describe circumvents theses limits.

Abstract: To increase inspection throughput, the field of view (FOV) of an IR camera can be moved over the sample at a constant velocity. Throughout this moving, a modulation (e.g. optical or electrical) can be provided to the sample and IR images can be captured using the IR camera. Moving the FOV, providing the modulation, and capturing the IR images can be synchronized. The IR images can be filtered to generate the time delay LIT, thereby providing defect identification. In one embodiment, this filtering accounts for the number of pixels of the IR camera in a scanning direction. For the case of optical modulation, a dark field region can be provided for the FOV throughout the moving, thereby providing an improved signal-to-noise ratio (SNR) during filtering.

Abstract: An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.

Abstract: An electrically erasable/programmable CMOS logic memory cell for RFID applications and other mobile applications includes a tunneling capacitor, a control capacitor, and a CMOS inverter that share a single floating gate. A two-phase program/erase operation performs an initial Fowler-Nordheim (F-N) injection phase using the capacitors, and then a Band-to-Band Tunneling (BBT) phase using the CMOS inverter. Both the F-N injection and BBT phases are performed using low currents and low voltages (i.e., 5V or less). The tunneling and control capacitors are fabricated in isolated P-wells (IPWs) including both N+ and a P+ regions to enable the use of both positive and negative programming voltages during the F-N and BBT programming/erasing operations.

Abstract: A high volume testing/formatting process is provided for Universal Serial Bus-based (USB-based) electronic data flash cards (USB devices) that meets the increasing demand for USB electronic data flash cards (USB devices). A test host is simultaneously coupled to the multiple USB devices (e.g., using a multi-port card reader or a probe fixture), a controller endpoint value is read from each of the USB devices and verified with a known good value, and then testing/formatting is performed on each of the USB devices by writing predetermined data into each USB device in a pipelined manner, then reading out and testing the predetermined data. In one embodiment, the test host implements a special a USB driver that blocks standard USB registration procedures upon detecting the plurality of USB devices. Control and/or boot code data are written onto the flash memory device (i.e., instead of being provided on a controller ROM).

Abstract: A phase shifting mask (PSM) and a trim mask can be used in a dual exposure to form circuits on an integrated circuit. The trim mask can include first structures that define non-critical features of a design (e.g. line ends), second structures that protect areas exposed by phase shifters, wherein such areas including critical features (e.g. transistor gates) of the design, and transitional areas located between the first and second structures. Notably, these transitional areas can include notches. This notched trim mask can advantageously minimize line end widening, thereby improving feature definition and device performance on the resulting integrated circuit. The notched trim mask can also advantageously simplify the optical proximity correction of its associated PSM, thereby minimizing fabrication costs.

Abstract: Current OFDM systems use a limited number of symbols and/or sub-channels to provide approximations for channel estimations and pilot tracking, i.e. phase estimations. For example, two training symbols in the preamble of a data packet are used to provide channel estimation. Four of the fifty-four sub-channels are reserved for providing phase estimation. However, noise and other imperfections can cause errors in both of these estimations, thereby degrading system performance. Advantageously, decision feedback mechanisms can be provided to significantly improve channel estimation and pilot tracking in OFDM systems. The decision feedback mechanisms can use data symbols in the data packet to improve channel estimation as well as data sub-channels to improve pilot tracking.

Abstract: A system for characterizing material properties in miniature semiconductor structures performs a scatterometry analysis on inelastically scattered light. The system can include a narrowband probe beam generator and a detector. A single wavelength probe beam from the narrowband probe beam generator produces scattered light from a measurement pattern on a test sample. The scattered light is measured by the detector, and the measurement data (e.g., Raman spectrum) is used in a scatterometry analysis to determine material properties for the measurement pattern. The detector can measure either incoherent inelastically scattered light (e.g., using a spectrometer) or coherent inelastically scattered light (e.g., using an array detector). If the measurement pattern dimensions are substantially similar to actual device dimensions, the material property distributions determined for the measurement pattern can be applied to the actual devices on the test sample.

Abstract: An electronic data flash card accessible by a host computer, includes a flash memory controller connected to a flash memory device, and an input-output interface circuit activated to establish a communication with the host. In an embodiment, the flash card uses a USB interface circuit for communication with the host. A flash memory controller includes an arbitrator for mapping logical addresses with physical block addresses, and for performing block management operations including: storing reassigned data to available blocks, relocating valid data in obsolete blocks to said available blocks and reassigning logical block addresses to physical block addresses of said available blocks, finding bad blocks of the flash memory device and replacing with reserve blocks, erasing obsolete blocks for recycling after relocating valid data to available blocks, and erase count wear leveling of blocks, etc. Furthermore, each flash memory device includes an internal buffer for accelerating the block management operations.