Abstract: A high pressure, high throughout, single wafer semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor provides uniform processing over a wide range of pressures including very high pressures. A low temperature process for forming a highly conformal layer of silicon dioxide from a plasma of TEOS, oxygen and ozone is also disclosed. This layer can be planarized using an etchback process. Silicon oxide deposition and etchback can be carried out sequentially in the reactor.

Abstract: Aluminum alloys containing high amounts of copper can be etched to eliminate copper residues using boron trichloride and chlorine under etch conditions of low temperature, low pressure, high power and strict control of the amount of nitrogen present.

Abstract: A high voltage contact assembly comprising two dielectric housing members adapted for fastening together, the first dielectric housing member having a first conductor inserted therein, the second dielectric housing member having a second conductor inserted therein and spring means sandwiched between the first conductor and the second conductor, the second conductor fastened to a high voltage cable member, such that, when the dielectric housing members are fastened together, the first conductor member extends above the surface of the first housing member. The contact assembly of the invention is useful for mounting in a base plate support for an electrostatic chuck in an etch chamber.

Abstract: A plasma etch reactor comprising a remote source of plasma mounted on a vacuum processing chamber has a large permanent magnet ring around the area of the chamber where the plasma enters, magnetically oriented so that magnetic field lines are removed from said plasma in the processing chamber, and two or more pairs of magnet rings mounted around said chamber to form a series of magnetic cusps about the wall of said chamber, to thereby inhibit plasma electrons from striking the wall of said chamber. A substrate entry port can be fitted between the magnet rings, allowing automatic ingress and egress of said substrates with maximum efficiency.

Abstract: A method displays a signal which represents the variation of light intensity in a processing chamber over time. The light intensity within the process chamber is detected to produce a voltage signal with a voltage amplitude which varies based on the light intensity within the process chamber. The voltage amplitude of the voltage signal is digitally sampled at a sampling interval to obtain sample values. Running averages of a preselected number of sample values are calculated and displayed on a graph. For each newly displayed running average, a rectangular box may be superimposed over the graph of the running averages in order to graphically display changes in slope. A computer is programmed to look for an anticipated sequence of slopes.

Abstract: An etch rate monitor for use with semiconductor wafer etching processes includes a source of light of normal incidence to the wafer surface through a window in the etching chamber. In a first embodiment, a Fresnel or positive lens is used to collect some of the diffraction orders caused by the repetitive patterns on the wafer surface which merge from the window. In alternate embodiments, a concave spherical mirror and/or a photodetector system are used to collect the diffraction orders. A collimating lens applies these diffraction orders of normal incidence to interference filters which reject plasma and ambient light and pass the diffraction orders to a photodetector to monitor etch rate as a function of the cycle period between interference minima or maxima caused by the difference in path length between the etched and not etched surfaces of the wafer.

Abstract: Copper lines can be formed on a semiconductor wafer at low temperatures by forming a patterned photoresist layer over a copper layer, and etching the copper in a vacuum etch chamber using vaporized acetic acid and water as the etchants.

Abstract: A process of removing particles from the surface of a substrate to be processed in a vacuum chamber comprising forming a plasma from an inert plasma precursor gas in said chamber, thereby lifting loosely adhered particles from the surface of the substrate, and increasing the flow of said inert gas without increasing the pressure in the vacuum chamber, thereby sweeping the particles beyond the surface of the substrate, where they can be removed by the vacuum chamber exhaust system. Particles having a particle size of about 0.1 micron or larger can be removed in this fashion.

Abstract: A clamping ring having a downwardly extending finger that mates with a pocket in the periphery of a susceptor for supporting a wafer in a chemical vapor deposition chamber, provides alignment of the clamping ring, the wafer and the susceptor. A source of inert gas connected to the pocket provides a positive pressure in the pocket that prevents reactive gas in the chamber from reaching the edge and backside of the wafer. A source of vacuum connected to the susceptor support surface ensures good contact between the wafer and the susceptor.The clamping ring also has a lip extending over the top surface of the wafer having a rear surface that has a negative angle with respect to the upper surface of the clamping ring, providing a knife edge seal to the wafer, reducing the area of contact between the clamping ring and the wafer and providing a reduced area of thermal contact between the clamping ring and the wafer.

Abstract: A planar magnetron sputtering source having a pair of pole pieces configured to produce a uniform coating, excellent step coverage and excellent step coverage uniformity of a wafer. Between the two pole pieces is a gap within which the magnetic field and electric field produce an electron trap. The shape of the gap produces a depth of sputter profile in the target that results in the uniform coating, excellent step coverage and excellent step coverage uniformity.

Abstract: A rapid thermal heating apparatus in which lamps are disposed in a plurality of light pipes arranged to illuminate and supply heat to a substrate. The light pipes are positioned so that the illumination patterns overlap. The energy supplied to the lamps is controlled to provide a predetermined heating pattern to the substrate. A liquid cooled window cooperates with the light pipes to transmit energy to a wafer disposed in an evacuated chamber.

Abstract: An electrostatic clamp or chuck and method uses soft square wave, slew rate limited, A.C. clamping voltages and a balanced, differential drive for clamping flat articles such as semiconductor wafers to pedestals, wafer transfer blades, and the like, with a large ratio of clamping force to clamping voltage, reduced decay of the clamping force and associated nearly constant maximum clamping force, instantaneous elimination of remnant clamping force when the clamping voltage is removed (instant off operation), isolation of the clamped article from the clamping voltage, and substantial elimination of vibration. Preferably the A.C. frequency is 0.1 to 60 Hz. The instant off operation is enhanced by increasing the frequency as the clamping voltage is decreased.

Abstract: An improved apparatus for CVD processing is described wherein a wafer mounted on a vertically movable susceptor beneath a gas outlet or showerhead is raised into contact with a shield ring which normally rests on a ring support in the chamber. The shield ring engages the frontside edge of the wafer, lifting the shield ring off its support, when the susceptor and the wafer 10 are raised to a deposition position in the chamber. The shield ring, by engaging the frontside edge of the wafer, shields the edge of the top surface of the wafer, as well as the end edge and the backside of the wafer, during the deposition. Matching tapered edges, respectively, on the susceptor and the shield ring permit alignment of the shield ring with respect to the susceptor, and alignment of the wafer to the susceptor and the shield ring. Alignment means are also disclosed to circularly align the shield ring to its support in the chamber.

Abstract: Disclosed is a system, including both method and apparatus, for enhancing the plasma etching of a semiconductor wafer. The system enhances etchant uniformity while greatly reducing plasma contamination. Etching is performed in a housing for processing a semiconductor wafer having a wafer perimeter defined by an outer wafer edge, a top surface and a bottom surface. The plasma etch technique includes a plasma positioned substantially coplanar with and proximate to the semiconductor wafer. The plasma has a perimeter defined by an outer plasma edge and extending beyond substantially all of the wafer perimeter. Provided is a means for introducing an inert gas between the wafer perimeter and the plasma perimeter so the inert gas may or may not hit the wafer's bottom surface. Plasma and wafer can each have a circular shape where the plasma and the wafer are proximate to each other.

Abstract: In a method for in situ cleaning a shield bearing of excess target material deposited in a physical vapor deposition chamber, during a cleaning cycle, a vacuum is created in the physical vapor deposition chamber. A gas mixture which includes a reactive gas is introduced into the physical vapor deposition chamber. The reactive gas is activated by plasma discharge. During the cleaning, the gas mixture is continuously removed from the vapor deposition chamber along with reaction products.

Abstract: An integrated modular multiple chamber vacuum processing system is disclosed. The system includes a load lock, may include an external cassette elevator, and an internal load lock wafer elevator, and also includes stations about the periphery of the load lock for connecting one, two or several vacuum process chambers to the load lock chamber. A robot is mounted within the load lock and utilizes a concentric shaft drive system connected to an end effector via a dual four-bar link mechanism for imparting selected R-.theta. movement to the blade to load and unload wafers at the external elevator, internal elevator and individual process chambers. The system is uniquely adapted for enabling various types of IC processing including etch, deposition, sputtering and rapid thermal annealing chambers, thereby providing the opportunity for multiple step, sequential processing using different processes.

Abstract: A method of depositing good quality thermal CVD silicon oxide layers over a PECVD TEOS/oxygen silicon oxide layer comprising forming an interstitial layer by ramping down the power in the last few seconds of the PECVD deposition.

Abstract: A wafer processing reactor having an input manifold to enable control of a process gas flow profile over a wafer that is being processed. Both process gas relative concentrations and flow rates can be controlled, thereby enabling an increased uniformity of processing across the wafer.

Abstract: An inner lid is attached to a vacuum chamber, covering an inner region of the vacuum chamber. An outer lid, also attached to the vacuum chamber, covers the inner lid, leaving a region between the inner lid and the outer lid. A gas conduit allows gas to flow between the inner region of the vacuum chamber and the region between the inner lid and the outer lid. A filter is placed in or immediately outside the gas conduit to prevent particles from entering the inner region of the vacuum chamber from the region between the inner lid and the outer lid. Since the pressure is the same on the top and bottom of the inner lid, the inner lid does not flex and thus does not rub against the vacuum chamber when the vacuum chamber is pumped down or vented up.

Abstract: Ion implantation equipment is modified so as to provide filament reflectors to a filament inside of an arc chamber, and to remove the electrical insulators for the filament outside of the arc chamber and providing a means of shielding, thereby reducing the formation of a conductive layer on said insulators and greatly extending the lifetime and reducing downtime of the equipment. The efficiency of the equipment is further enhanced by means of an interchangeable liner for the arc chamber that increases the wall temperature of the arc chamber and thus the electron temperature. The use of tungsten parts inside the arc chamber, obtained either by making the arc chamber itself or portions thereof of tungsten, particularly the front plate having the exit aperture for the ion beam, or by inserting a removable tungsten liner therein, decreases contamination of the ion beam. Serviceability of the arc chamber is improved by means of a unitary clamp that separately grips both the filament and filament reflectors.