Abstract: An IGFET device includes a semiconductor wafer having a first conductivity type drain region contiguous with a wafer surface. A second conductivity type body region extends into the wafer from the wafer surface so as to form a body/drain PN junction having an intercept at the surface; the body region further including a body-contact portion of relatively high conductivity disposed at the surface. A first conductivity type source region extends into the wafer so as to form a source/body PN junction which has first and second intercepts at the surface. The first intercept is spaced from the body/drain intercept so as to define a channel region in the body region at the surface, and the second intercept is contiguous with the body contact portion. The second intercept is relatively narrowly spaced from the first intercept along most of the length of the first intercept and is relatively widely spaced from the first intercept at one or more predetermined portions.

Abstract: A semiconductor structure GaInAs provides significantly low output capacitance in a digital integrated circuit, such as an inverter. A dopant density (N) within the range of 1.0.times.10.sup.16 cm.sup.-3 and 4.7.times.10.sup.16 cm.sup.-3 and an active layer thickness (a) within the range of 0.15 micrometer and 0.33 micrometer are selected in proper combination to provide a design criterion to provide good device performance with a significantly small propagation delay between the input and output terminals.

Abstract: A MOSFET device comprises a semiconductor wafer which includes a drain region of first conductivity type contiguous with a wafer surface. A diffused body region of second conductivity type extends into the wafer from the wafer surface so as to form a body/drain PN junction which has a polygonally-shaped intercept at the wafer surface. A plurality of source regions of first conductivity type extends into the wafer from the wafer surface within the boundary of the body region. The source regions define a plurality of channel regions, a contact area, and at least one shunt region at the surface of the body region. Each shunt region extends from the contact area to one of the corners of the body/drain PN junction polygonal intercept. A source electrode contacts the body region contact area and each of the source regions adjacent thereto.

Abstract: The ion implantation of a silicon structure isolated from a semiconductor substrate by a layer of silicon dioxide with boron ions to render it p type conductive is improved by initially doping the silicon with phosphorus ions. The presence of the phosphorus ions in the silicon prevents the implanted boron ions from rapidly migrating into the silicon dioxide during annealing.

Abstract: An avalanche photodiode includes a region of second conductivity type extending a distance into a substrate and a region of first conductivity type extending a further distance into the substrate of first conductivity type with a P-N junction therebetween. The invention is a method for fabricating an avalanche photodiode having a specified breakdown voltage. The method includes the step of measuring the concentration of the first type conductivity modifiers and removing a portion of the surface of the substrate prior to forming the region of second conductivity type. This method provides control of the concentration of the first type conductivity modifiers at the P-N junction and thereby controls the breakdown voltage.

Abstract: An array of infra-red (IR) detectors for a CCD image sensor includes a plurality of spaced areas of a conductive material at the surface of a substrate of semiconductor material of one conductivity type with each conductive area forming a Schottky-barrier diode with the substrate to form the IR detectors. Each detector includes a high conductivity contact region within the substrate. Between the detector area is a guard band which consists of a region of a conductivity type opposite to that of the substrate within the substrate and around said detector area. The guard band is spaced from the contact regions and each conductive area overlaps a portion of its adjacent guard band.

Abstract: A method for making a partially radiation hardened oxide adjacent an edge comprises forming an oxide layer on another layer with a temperature between about 975.degree. C. and 1400.degree. C., preferably between about 1000.degree. C. and 1200.degree. C. Then the structure of the oxide layer is damaged, such as by ion implantation, preferably with an inert element. Thereafter the oxide layer is annealed at a temperature between about 850.degree. C. and 900.degree. C., preferably at about 875.degree. C.

Abstract: A protection circuit comprises first and second circuit to respectively protect an IC against negative and positive going transients in an input signal. If the input includes a repetitive signal greater than a threshold for firing the negative going protection circuit, substrate current injection and signal clamping will result. To prevent this, the first circuit includes an emitter-base shunt resistor and a Zener diode coupled to a pair of opposite conductivity type transistors to lower the threshold thereof. Each of the circuits comprises a pair of opposite conductivity type transistors formed in a single isolated region, which in turn is formed in an opposite conductivity type substrate.

Abstract: An LCD pixel in accordance with the invention has disposed on a substrate a segmented back-to-back diode, an address line, and an electrode adjacent to the address line. The electrode has an additional portion, with one diode segment disposed on the additional portion and the other diode segment disposed on the address line. A free area of the substrate is adjacent to the additional portion so that the diode area is accurately defined.

Abstract: A zener diode structure for integrated circuits is disclosed. The device includes a pair of parallel zener diodes connected back to back with a third zener diode. The anode of one of the parallel diodes is connected to the anodes of the other two diodes through a parasitic resistance. The zener breakdown junctions of two of the diodes are well below the surface of the device thereby reducing any adverse affect of stray surface charges and ultraviolet radiation. Further, the doping levels of the opposing diodes are selected to reduce drift in the breakdown voltage due to variations in operating temperature of the device.

Abstract: A VDMOS device comprises a semiconductor wafer having a major surface with a first conductivity type drain region thereat. An array of second conductivity type body regions, spaced from each other by distance D, is diffused into the drain region from the first surface. The body regions each include a relatively high conductivity supplementary body region and a first conductivity type source region diffused therein from within the first surface boundary thereof. The spacing between each source region and the drain region defines a channel region at the first surface. A source electrode contacts the source and body regions and an insulated gate electrode overlies each channel region. A gate bond pad, in direct contact with the gate electrode, overlies a second conductivity type gate shield region and is insulated therefrom. The gate shield region is contiguous with the drain region and is spaced from the neighboring channel regions by distance D.

Abstract: Apparatus for irradiating deep ultraviolet (DUV) photoresist-sensitive material on a single substrate, such as a wafer, from a xenon lamp source providing pulsed radiation in the DUV range. A spherical reflector reinforces direct radiation to provide a radiation beam with predetermined divergence confined by a cylindrical baffle. The walls of the baffle are either reflective or absorptive to provide either a curing function or mask exposure imaging function as desired.A wafer having single layer or multi-layer photoresist material sensitive to DUV is either exposed for imaging for pattern development with high resolution and uniformity even with thin photoresist layers or for curing the patterned layers.

Abstract: An apparatus is disclosed for in-process storage of a stack of molded discs which is comprised of a rigid base member and inflatable tubular member attached to the base member which can be inflated so as to hold the stack of discs placed on the base member securely in position and protected from physical damage during storage.

Abstract: Selected areas of the surface of a substrate, such as the surface of a substrate of single crystalline silicon having at least one CCD image sensor along an opposed surface of the substrate, is coated with a metal by coating the surface to be coated with a layer of a photoresist. The substrate is then supported, such as by a vacuum chuck, with the photoresist layer being exposed. A mask, which is supported above the substrate, is moved close to but spaced from the photoresist layer. The substrate is then moved, such as by means of an x-y-.theta. aligner table on which the chuck is mounted, until a pattern on the mask is aligned with areas of the substrate surface. A light directed through the substrate and the mask from below the substrate and viewed by a microscope above the mask assists in achieving the alignment. The mask is then lowered onto the photoresist layer and lies thereon under only its own weight. Radiation is then directed onto the photoresist layer through the mask.

Abstract: A solid-state detector assembly for a television camera includes a beam-splitting prism having an inlet port and three outlet ports. A pair of mounting plates each having opposed major surfaces extend across the top and bottom of the prism and have a major surface secured to the prism. Each of the mounting plates has a separate pair of spaced slots in its edge adjacent each of the outlet ports. Each of the slots in one of the mounting plates is aligned with a separate slot in the other mounting plate. A separate pair detector support rods extends between the mounting plates adjacent each outlet port. Each of the detector support rods extends through the slots in the mounting plates and projects beyond the major surfaces of the mounting plates. A separate detector is mounted on each of the pair support rods and extends across an outlet port.

Abstract: A method is disclosed for forming a continuous glass coating which is free of pinholes, cracks, and the like over the surface of an electrical device. In the method disclosed, a mixture consisting essentially of an organic vehicle which is reactive with a suitable plasma to form gaseous reaction products at a temperature below the thermal decomposition temperature of the organic vehicle and a glass frit having a glass transition temperature above the thermal degradation temperature is applied in a layer over the surface of a completed electrical device. The applied layer of the mixture is then subjected to a suitable plasma at a temperature below the thermal degradation temperature of the organic vehicle for a time sufficient to remove the organic vehicle from the layer. The layer is then heated to or above the glass transition temperature of the glass frit until the glass frit fuses and forms a continuous defect-free glass coating over the surface of the electrical device.

Abstract: A method for forming a CMOS FET structure includes the steps of forming an apertured insulating layer on a silicon substrate and epitaxially forming a monocrystalline silicon island of first conductivity type through an aperture therein. The exposed surface of the silicon island is then thermally oxidized and the portion of the insulating layer not covered by the oxide is removed. A monocrystalline silicon island of second conductivity type is then formed adjacent to the oxidized silicon island of first conductivity type.

Abstract: A method is disclosed for fabricating thick film electrical components which are exceptionally uniform in electrical properties and have increased density wherein a thick film ink comprised of (i) an organic vehicle which is reactive with a plasma to form gaseous reaction products at a temperature below its thermal decomposition temperature, (ii) a glass frit having a glass transition temperature above the thermal degradation temperature, and (iii) a particulate material having the desired electrical properties for the thick film electrical component are applied to a suitable substrate in a pattern corresponding to the electrical component. The applied layer is then subjected to a suitable plasma at a temperature below the thermal degradation temperature for a time sufficient to remove the organic vehicle from the applied layer. The resultant layer is then heated at or above the glass transition temperature of the glass frit until the glass frit fuses and forms a composite with the particulate material.

Abstract: Liquid crystal displays are improved by using as the alignment layer an alkali-soluble resin which is an addition resin of (a) at least one ethylenically unsaturated, ligand-free monomer and (b) at least one ethylenically unsaturated monomer having at least one carboxyl group. The resin is optically clear and is characterized by being exceptionally stable.

Abstract: A floating gate structure wherein the floating gate is a second level polysilicon layer that is substantially shielded from the substrate by a segmented, discontinuous first level word line. Coupling of the floating gate to the substrate for "writing" is accomplished by extending the floating gate between word line segments while electrical continuity of the word line is maintained by buried contacts which make electrical contact to a continuous third level polysilicon layer.