Patents Represented by Attorney, Agent or Law Firm Bo-In Lin
  • Patent number: 8350790
    Abstract: A video display system includes a plurality of primary color light sources; and a spatial light modulator (SLM) for modulating an illumination light emitted from at least one of the plurality of primary light sources. The video display system further includes a display controller for controlling a process to display a sequence of video images within a period of one frame comprising each of a plurality of primary colors and each of a plurality of complementary colors to minimize a number of emissions of each of the plurality of primary color light sources and also displaying the video images of the colors of the plurality of primary colors and the plurality of complementary colors in sequence.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: January 8, 2013
    Assignees: Silicon Quest Kabushiki-Kaisha, Olympus Corporation
    Inventors: Taro Endo, Yoshihiro Maeda, Hirotoshi Ichikawa, Fusao Ishii
  • Patent number: 8351107
    Abstract: The present invention provides an image projection system implemented with a spatial light modulator (SLM) to modulate an illumination light projected from a light source wherein said SLM comprising a first conductive layer to wire and function as a bit line; a second conductive layer to wire and function as a word line; and a first conductive and second conductive capacitor layers functioning as a capacitor wherein the bit line is wired along a direction crossing the word line and the capacitor is disposed in parallel with the bit line.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: January 8, 2013
    Assignee: Olympus Corporation
    Inventors: Akira Shirai, Naoya Sugimoto, Fusao Ishii
  • Patent number: 8346023
    Abstract: A computer peripheral apparatus (CPA) provided for connecting to a computer. The CPA includes a CPA processor to execute a CPA program to independently and directly carry out a document processing function without receiving an instruction from a computer. In an exemplary embodiment, the CPA includes a scanner for scanning a document and the CPA processor executes a optical character recognition (OCR) program to directly recognize characters included in the document scanned by the scanner. In another exemplary embodiment, the characters recognized by the OCR program further include instructions for instructing the CPA processor to execute a subsequent program to process the document scanned by the scanner. In another exemplary embodiment, the characters recognized by the OCR program further includes instructions for instructing the CPA processor to send a facsimile of the document scanned by the scanner to a facsimile destination.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: January 1, 2013
    Inventor: Bo-In Lin
  • Patent number: 8342234
    Abstract: A plasma-driven cooling device generates and drives a plasma-driven gas flow to cool down electronic devices. The plasma-driven cooling device comprises electrodes, dielectric pieces, and heat sink fins. The voltages applied on the electrodes coupled with dielectric pieces and heat sink fins induce the gas flow, which is used to cool down heat sources. A magnetic circuit may be coupled with plasma-drive gas flow to enhance the cooling.
    Type: Grant
    Filed: June 8, 2008
    Date of Patent: January 1, 2013
    Inventor: Chien Ouyang
  • Patent number: 8338854
    Abstract: A transient-voltage suppressing (TVS) device disposed on a semiconductor substrate of a first conductivity type. The TVS includes a buried dopant region of a second conductivity type disposed and encompassed in an epitaxial layer of the first conductivity type wherein the buried dopant region extends laterally and has an extended bottom junction area interfacing with the underlying portion of the epitaxial layer thus constituting a Zener diode for the TVS device. The TVS device further includes a region above the buried dopant region further comprising a top dopant layer of a second conductivity type and a top contact region of a second conductivity type which act in combination with the epitaxial layer and the buried dopant region to form a plurality of interfacing PN junctions constituting a SCR acting as a steering diode to function with the Zener diode for suppressing a transient voltage.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: December 25, 2012
    Assignee: Alpha and Omega Semiconductor Incorporated
    Inventors: Madhur Bobde, Lingpeng Guan, Anup Bhalla, Limin Weng
  • Patent number: 8340904
    Abstract: A wireless communication device disposed on a moving vehicle. The wireless communication device further includes a geographic location determination processor for determining a geographic location on a city map. The wireless communication device further receives a vehicle location and arrival schedule request for sending a message to a passenger waiting for the vehicle for providing the geographic location on the city map and an estimated arrival time of the vehicle to a passenger waiting for the vehicle.
    Type: Grant
    Filed: January 6, 2007
    Date of Patent: December 25, 2012
    Inventor: Bo-In Lin
  • Patent number: 8338860
    Abstract: A heterostructure field effect transistor (HFET) gallium nitride (GaN) semiconductor power device comprises a hetero-junction structure comprises a first semiconductor layer interfacing a second semiconductor layer of two different band gaps thus generating an interface layer as a two-dimensional electron gas (2DEG) layer. The power device further comprises a source electrode and a drain electrode disposed on two opposite sides of a gate electrode disposed on top of the hetero-junction structure for controlling a current flow between the source and drain electrodes in the 2DEG layer.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: December 25, 2012
    Assignee: Alpha and Omega Semiconductor Incorporated
    Inventors: Anup Bhalla, Tinggang Zhu
  • Patent number: 8338915
    Abstract: A vertical TVS (VTVS) circuit includes a semiconductor substrate for supporting the VTVS device thereon having a heavily doped layer extending to the bottom of substrate. Deep trenches are provided for isolation between multi-channel VTVS. Trench gates are also provided for increasing the capacitance of VTVS with integrated EMI filter.
    Type: Grant
    Filed: August 18, 2010
    Date of Patent: December 25, 2012
    Assignee: Alpha and Omega Semiconductor Incorporated
    Inventors: Shekar Mallikararjunaswamy, Madhur Bobde
  • Patent number: 8331010
    Abstract: This invention discloses a mirror device comprises a mirror array. The mirror array includes multiple mirror elements. Each element comprises a mirror supported on a hinge. The hinge is attached directly to the mirror and is substantially perpendicular to the mirror. The hinge penetrates a bottom surface of the mirror with a hinge-top buried in a layer of the mirror beneath a top surface of the mirror.
    Type: Grant
    Filed: July 14, 2009
    Date of Patent: December 11, 2012
    Assignee: Silicon Quest Kabushiki-Kaisha
    Inventor: Fusao Ishii
  • Patent number: 8330264
    Abstract: This invention discloses an electronic package for containing a vertical semiconductor chip that includes a laminated board having a via connector and conductive traces distributed on multiple layers of the laminated board connected to the via connector. The semiconductor chip having at least one electrode connected to the conductive traces for electrically connected to the conductive traces at a different layer on the laminated board and the via connector dissipating heat generated from the vertical semiconductor. A ball grid array (BGA) connected to the via connector functioning as contact at a bottom surface of the package for mounting on electrical terminals disposed on a printed circuit board (PCB) wherein the laminated board having a thermal expansion coefficient in substantially a same range the PCB whereby the BGA having a reliable electrical contact with the electrical terminals.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: December 11, 2012
    Assignee: Alpha and Omega Semiconductor Incorporated
    Inventors: Ming Sun, Yueh Se Ho
  • Patent number: 8324053
    Abstract: This invention discloses a method for manufacturing a semiconductor power device in a semiconductor substrate comprises an active cell area and a termination area.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: December 4, 2012
    Assignee: Alpha and Omega Semiconductor, Inc.
    Inventors: Madhur Bobde, Lingpeng Guan, Anup Bhalla
  • Patent number: 8304312
    Abstract: This invention discloses a semiconductor power device disposed on a semiconductor substrate includes a plurality of deep trenches with an epitaxial layer filling said deep trenches and a simultaneously grown top epitaxial layer covering areas above a top surface of said deep trenches over the semiconductor substrate. A plurality of trench MOSFET cells disposed in said top epitaxial layer with the top epitaxial layer functioning as the body region and the semiconductor substrate acting as the drain region whereby a super-junction effect is achieved through charge balance between the epitaxial layer in the deep trenches and regions in the semiconductor substrate laterally adjacent to the deep trenches. Each of the trench MOSFET cells further includes a trench gate and a gate-shielding dopant region disposed below and substantially aligned with each of the trench gates for each of the trench MOSFET cells for shielding the trench gate during a voltage breakdown.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: November 6, 2012
    Assignee: Alpha and Omega Semiconductor Incorporated
    Inventor: François Hébert
  • Patent number: 8282221
    Abstract: A projection apparatus using a spatial light modulator (SLM), comprising the following: at least one variable light source, at least one spatial light modulator for modulating the illumination light emitted from the variable light source in accordance with the modulation state of arrayed pixel elements, a variable light source controller for controlling modulation of the variable light source, and a spatial light modulator controller for controlling modulation of each pixel element of the spatial light modulator, wherein the variable light source controller controls the variable light source so as to reduce the period in which the modulation states of the pixel element are in transition on a display image.
    Type: Grant
    Filed: August 14, 2008
    Date of Patent: October 9, 2012
    Assignees: Silicon Quest Kabushiki Kaisha, Olympus Corporation
    Inventors: Kazuma Arai, Fusao Ishii
  • Patent number: 8283243
    Abstract: This invention discloses a bottom-anode Schottky (BAS) diode that includes an anode electrode disposed on a bottom surface of a semiconductor substrate. The bottom-anode Schottky diode further includes a sinker dopant region disposed at a depth in the semiconductor substrate extending substantially to the anode electrode disposed on the bottom surface of the semiconductor and the sinker dopant region covered by a buried Schottky barrier metal functioning as a Schottky anode.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: October 9, 2012
    Assignee: Alpha and Omega Semiconductor Incorporated
    Inventor: François Hébert
  • Patent number: 8283213
    Abstract: This invention discloses an insulated gate bipolar transistor (IGBT) formed in a semiconductor substrate. The IGBT comprises a buffer layer of a first conductivity type formed below an epitaxial layer of the first conductivity having body and source regions therein. The IGBT further includes a lowly doped substrate layer below the buffer layer and a dopant layer of a second conductivity type disposed below the lowly doped substrate layer and above a drain electrode of said IGBT attached to a bottom surface of said semiconductor substrate wherein the dopant layer of the second conductivity type has a higher dopant concentration than the lowly doped substrate layer.
    Type: Grant
    Filed: July 30, 2010
    Date of Patent: October 9, 2012
    Assignee: Alpha and Omega Semiconductor Incorporated
    Inventors: Madhur Bobde, Anup Bhalla, Lingpeng Guan
  • Patent number: 8270061
    Abstract: The present invention provides a display apparatus, comprising: a light source; at least one spatial light modulator for modulating a luminous flux emitted from the light source; and a controller for processing inputted video image information and for controlling the light source and spatial light modulator, wherein the controller controls the light source and spatial light modulator so that the light source performs pulse emission for a period shorter than a period in which the spatial light modulator is controlled under a modulation state.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: September 18, 2012
    Assignees: Silicon Quest Kabushiki-Kaisha, Olympus Corporation
    Inventors: Taro Endo, Kazuma Arai, Yoshihiro Maeda, Fusao Ishil
  • Patent number: 8263482
    Abstract: This invention discloses a semiconductor power device disposed in a semiconductor substrate and the semiconductor substrate has a plurality of trenches. Each of the trenches is filled with a plurality of epitaxial layers of alternating conductivity types constituting nano tubes functioning as conducting channels stacked as layers extending along a sidewall direction with a “Gap Filler” layer filling a merging-gap between the nano tubes disposed substantially at a center of each of the trenches. The “Gap Filler” layer can be very lightly doped Silicon or grown and deposited dielectric layer. In an exemplary embodiment, the plurality of trenches are separated by pillar columns each having a width approximately half to one-third of a width of the trenches.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: September 11, 2012
    Assignee: Alpha and Omega Semiconductor Incorporated
    Inventors: Hamza Yilmaz, Daniel Ng, Lingpeng Guan, Anup Bhalla, Wilson Ma, Moses Ho, John Chen
  • Patent number: 8258890
    Abstract: A transient voltage suppressing (TVS) circuit with uni-directional blocking and symmetric bi-directional blocking capabilities integrated with an electromagnetic interference (EMI) filter supported on a semiconductor substrate of a first conductivity type. The TVS circuit integrated with the EMI filter further includes a ground terminal disposed on the surface for the symmetric bi-directional blocking structure and at the bottom of the semiconductor substrate for the uni-directional blocking structure and an input and an output terminal disposed on a top surface with at least a Zener diode and a plurality of capacitors disposed in the semiconductor substrate to couple the ground terminal to the input and output terminals with a direct capacitive coupling without an intermediate floating body region.
    Type: Grant
    Filed: September 7, 2010
    Date of Patent: September 4, 2012
    Assignee: Alpha and Omega Semiconductor Incorporated
    Inventor: Madhur Bobde
  • Patent number: 8252645
    Abstract: A method for manufacturing a trenched semiconductor power device includes a step of forming said semiconductor power device with a trenched gate surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a substrate. The method further includes the steps of covering the MOSFET cell with an insulation layer and applying a contact mask for opening a source-body contact trench extending through the source and body regions into an epitaxial layer underneath for filling a contact metal plug therein. And, the method further includes a step of forming an embedded Schottky diode by forming a Schottky barrier layer near a bottom of the source-body contact trench below the contact metal plug with the Schottky barrier layer having a barrier height for reducing a leakage current through the embedded Schottky diode during a reverse bias between the drain and the source.
    Type: Grant
    Filed: August 7, 2009
    Date of Patent: August 28, 2012
    Assignee: Force—Mos Technology Corporation
    Inventor: Fwu-ruan Hshieh
  • Patent number: 8238013
    Abstract: A projection apparatus comprising a micromirror device for reflecting and modulating a light emitted from a light source to project a display an image on a display screen. The projection apparatus further includes a projection optical system comprises an adjustable aperture for adjusting an aperture ratio to control an amount of output light reflected from the micromirror device to the image display screen.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: August 7, 2012
    Assignees: Silicon Quest Kabushiki-Kaisha, Olympus Corporation
    Inventors: Hirotoshi Ichikawa, Fusao Ishii