Patents Represented by Attorney, Agent or Law Firm Bo-In Lin
  • Patent number: 8064123
    Abstract: The present invention provides an image display system implemented with a micro-electromechanical system (MEMS) device formed and supported on a substrate functioning as a spatial light modulator wherein the MEMS device further comprises a drive circuit disposed on the substrate; a micromirror functioning as a movable electrode supported on a deflectable hinge extended from the substrate; a stationary electrode disposed on the substrate and connected to the drive circuit to receive signals therefrom, wherein the stationary electrode comprises a first electrode, a second electrode and an insulation layer, wherein the insulation layer is disposed between the first electrode and second electrode.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: November 22, 2011
    Assignees: Silicon Quest Kabushiki-Kaisha, Olympus Corporation
    Inventors: Yoshihiro Maeda, Hirotoshi Ichikawa, Naoya Sugimoto, Fusao Ishii
  • Patent number: 8061856
    Abstract: The present invention provides a projection apparatus, comprising: a light source; a spatial light modulator for modulating the incident light emitted from the light source; a spatial light modulator control unit for generating, from an inputted image signal, a control signal for driving the spatial light modulator; and a light source control unit for receiving data corresponding to the control signal for controlling the light source to operate in one of three states consisted of a driven state, a stopped state and a standby state on the basis of the data.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: November 22, 2011
    Assignees: Silicon Quest Kabushiki-Kaisha, Olympus Corporation
    Inventors: Akira Shirai, Fusao Ishii
  • Patent number: 8064118
    Abstract: This invention provides a display system that receives an image signal containing a binary data of N bits, wherein N is a positive integer, for displaying an image with a grayscale corresponding to the binary data. The display system further includes a data converter for converting M-bit of the N bits of the binary data into a non-binary data, wherein M is a positive integer and N?M, for applying the non-binary data as a sub-frame in controlling the gray scale in displaying the image. In an exemplary embodiment, the data converter converts consecutive M-bit of the N bits of the binary data into the non-binary data. The display system further includes a spatial light modulator (SLM) having a plurality of pixel elements and the SLM receiving the non-binary data of M bits for controlling the pixel elements.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: November 22, 2011
    Assignees: Silicon Quest Kabushiki-Kaisha, Olympus Corporation
    Inventors: Fusao Ishii, Yoshihiro Maeda, Hirotoshi Ichikawa, Kazuma Arai
  • Patent number: 8061846
    Abstract: A method for controlling a light source of a video image display apparatus, comprising: projecting illumination lights to a first spatial light modulator (SLM) and a second SLM, and changing over a wavelength of one of the illumination lights projected to the second SLM in a sequence during a period when the wavelength of another one of the illumination lights projected to the first SLM is controlled to have a flexibly adjustable wavelength.
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: November 22, 2011
    Assignees: Silicon Quest Kabushiki-Kaisha, Olympus Corporation
    Inventors: Akira Shirai, Fusao Ishii
  • Patent number: 8061854
    Abstract: The present invention provides a projection apparatus, comprising: a light source; at least one spatial light modulator for modulating illumination light from the light source by a plurality of pixel elements by using different modulation states; a light source control unit performing a modulation control of the light source; and a spatial light modulator control unit generating, from an input image signal, a control signal for driving the spatial light modulator, wherein: the light source control unit has a function of receiving data corresponding to the control signal generated by the spatial light modulator control unit, controlling a parameter of an emission pulse of the illumination light emitted from the light source, and thereby adjusting an emission intensity of the illumination light.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: November 22, 2011
    Assignees: Silicon Quest Kabushiki-Kaisha, Olympus Corporation
    Inventors: Akira Shirai, Hirokazu Nishino, Yoshiaki Horikawa, Fusao Ishii
  • Patent number: 8064125
    Abstract: The present invention provides a display apparatus, comprising: a light source or light sources for emitting a luminous flux or luminous fluxes having a plurality of colors; a spatial light modulator for modulating the luminous flux(es) having a plurality of colors incoming from the light sources; and controller for processing video image input data, which is input, and controlling the light source(s) and the spatial light modulator, wherein the controller generates a plurality of video image signals of colors constituting a video image based on the video image input data, and controls the light source(s) so as to cause the light source(s) having at least two colors, from among the light source(s) having a plurality of colors, to perform pulse emission in sequence and modulate the pulse emission during a period shorter than a modulation period controlled under the spatial light modulator is with the video image signal of one color from among the video image signals.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: November 22, 2011
    Assignees: Silicon Quest Kabushiki-Kaisha, Olympus Corporation
    Inventors: Taro Endo, Kazuma Arai, Yoshihiro Maeda, Fusao Ishii
  • Patent number: 8058687
    Abstract: This invention discloses a trenched metal oxide semiconductor field effect transistor (MOSFET) cell. The trenched MOSFET cell includes a trenched gate opened from a top surface of the semiconductor substrate surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a substrate. The trenched gate further includes at least two mutually insulated trench-filling segments each filled with materials of different work functions. In an exemplary embodiment, the trenched gate includes a polysilicon segment at a bottom portion of the trenched gate and a metal segment at a top portion of the trenched gate.
    Type: Grant
    Filed: January 30, 2007
    Date of Patent: November 15, 2011
    Assignee: Alpha & Omega Semiconductor, Ltd.
    Inventors: Sung-Shan Tai, YongZhong Hu
  • Patent number: 8058981
    Abstract: A tire pressure-monitoring device (TPMD) directly mounted onto an air-pumping inlet-stem on a tire. The TPMD includes a light emitter connected to a battery through an electrical connecting loop wherein the electrical connecting loop comprising a plurality of electrical conductive structural components and at least two of the structural components are physically separated in a normal tire pressure condition and connected in a low pressure tire pressure condition for providing power to the light emitter for emitting a low tire pressure warning light.
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: November 15, 2011
    Assignee: Kysonix, Inc.
    Inventors: James Y. Yang, Yunlong Min, Jianyun Yang, Qiang Shen, Huigang Tu
  • Patent number: 8058670
    Abstract: A trench insulation gate bipolar transistor (IGBT) power device with a monolithic deep body clamp diode comprising a plurality of trench gates surrounded by emitter regions of a first conductivity type near a top surface of a semiconductor substrate of the first conductivity type encompassed in base regions of a second conductivity type. A collector region of the second conductivity type is disposed on a rear side opposite from the top surface of the semiconductor substrate corresponding to and underneath the trench gates surrounded by the emitter regions encompassed in the base regions constituting a plurality of insulation gate bipolar transistors (IGBTs). A deep dopant region of the second conductivity type having P-N junction depth deeper than the base region is disposed between and extending below the trench gates in the base region of the first conductivity type.
    Type: Grant
    Filed: June 4, 2009
    Date of Patent: November 15, 2011
    Assignee: Force—MOS Technology Corporation
    Inventor: Fwu-Iuan Hshieh
  • Patent number: 8053298
    Abstract: This invention discloses an improved semiconductor power device includes a plurality of power transistor cells wherein each cell further includes a planar gate padded by a gate oxide layer disposed on top of a drift layer constituting an upper layer of a semiconductor substrate wherein the planar gate further constituting a split gate including a gap opened in a gate layer whereby the a total surface area of the gate is reduced. The transistor cell further includes a JFET (junction field effect transistor) diffusion region disposed in the drift layer below the gap of the gate layer wherein the JFET diffusion region having a higher dopant concentration than the drift region for reducing a channel resistance of the semiconductor power device.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: November 8, 2011
    Assignee: Alpha & Omega Semiconductor Ltd.
    Inventors: Anup Bhalla, Francois Hebert, Daniel S. Ng
  • Patent number: 8053315
    Abstract: This invention discloses a method of manufacturing a trenched semiconductor power device with split gate filling a trench opened in a semiconductor substrate wherein the split gate is separated by an inter-poly insulation layer disposed between a top and a bottom gate segments. The method further includes a step of forming the inter-poly layer by applying a RTP process after a HDP oxide deposition process to bring an etch rate of the HDP oxide layer close to an etch rate of a thermal oxide.
    Type: Grant
    Filed: October 16, 2009
    Date of Patent: November 8, 2011
    Assignee: Alpha & Omega Semiconductor, LTD
    Inventors: Sung-Shan Tai, Yong-Zhong Hu, François Hébert, Hong Chang, Mengyu Pan, Yingying Lou, Yu Wang
  • Patent number: 8053834
    Abstract: This invention discloses an inverted field-effect-transistor (iT-FET) semiconductor device that includes a source disposed on a bottom and a drain disposed on a top of a semiconductor substrate. The semiconductor power device further comprises a trench-sidewall gate placed on sidewalls at a lower portion of a vertical trench surrounded by a body region encompassing a source region with a low resistivity body-source structure connected to a bottom source electrode and a drain link region disposed on top of said body regions thus constituting a drift region. The drift region is operated with a floating potential said iT-FET device achieving a self-termination.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: November 8, 2011
    Assignee: Alpha & Omega Semiconductor, Inc.
    Inventor: François Hébert
  • Patent number: 8053808
    Abstract: A semiconductor power device supported on a semiconductor substrate includes a plurality of transistor cells each having a source and a drain with a gate to control an electric current transmitted between the source and the drain. The semiconductor further includes a source metal connected to the source region, and a gate metal configured as a metal stripe surrounding a peripheral region of the substrate connected to a gate pad wherein the gate metal and the gate pad are separated from the source metal by a metal gap. The semiconductor power device further includes an ESD protection circuit includes a plurality of doped polysilicon regions of opposite conductivity types constituting ESD diodes extending across the metal gap and connected between the gate metal and the source metal on the peripheral region of the substrate.
    Type: Grant
    Filed: May 21, 2007
    Date of Patent: November 8, 2011
    Assignee: Alpha & Omega Semiconductor, Ltd.
    Inventors: Yi Su, Anup Bhalla, Daniel Ng, Wei Wang, Ji Pan
  • Patent number: 8044375
    Abstract: An ion implantation apparatus with multiple operating modes is disclosed. The ion implantation apparatus has an ion source and an ion extraction means for forming a converging beam on AMU-non-dispersive plane therefrom. The ion implantation apparatus includes magnetic scanner prior to a magnetic analyzer for scanning the beam on the non-dispersive plane, the magnetic analyzer for selecting ions with specific mass-to-charge ratio to pass through a mass slit to project onto a substrate. A rectangular quadruple magnet is provided to collimate the scanned ion beam and fine corrections of the beam incident angles onto a target. A deceleration or acceleration system incorporating energy filtering is at downstream of the beam collimator. A two-dimensional mechanical scanning system for scanning the target is disclosed, in which a beam diagnostic means is build in.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: October 25, 2011
    Assignee: Kingstone Semiconductor Company, Limited
    Inventor: Jiong Chen
  • Patent number: 8045254
    Abstract: The present invention discloses an image display system implemented with a spatial light modulator (SLM) having a plurality of pixel elements wherein each of the pixel elements further comprises an electrode having a structural body comprising: a first electrically conductive layer; a second electrically conductive layer; and a semiconductor layer disposed adjacently to the first electric conductive layer and second electric conductive layer and the semiconductor layer further comprises a doped conductive area for electrically connecting the first electric conductive layer and second electric conductive layer.
    Type: Grant
    Filed: November 13, 2009
    Date of Patent: October 25, 2011
    Assignees: Silicon Quest Kabushiki-Kaisha, Olympus Corporation
    Inventors: Hirotoshi Ichikawa, Yoshihiro Maeda, Fusao Ishii
  • Patent number: 8044486
    Abstract: This invention discloses a bottom-anode Schottky (BAS) diode that includes an anode electrode disposed on a bottom surface of a semiconductor substrate. The bottom-anode Schottky diode further includes a sinker dopant region disposed at a depth in the semiconductor substrate extending substantially to the anode electrode disposed on the bottom surface of the semiconductor and the sinker dopant region covered by a buried Schottky barrier metal functioning as a Schottky anode.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: October 25, 2011
    Assignee: Alpha & Omega Semiconductor, Inc.
    Inventor: François Hébert
  • Patent number: 8039821
    Abstract: An ion implantation apparatus of high energy is disclosed in this invention. The new and improved system can have a wide range of ion beam energy at high beam transmission rates and flexible operation modes for different ion species. This high energy implantation system can be converted into a medium current by removing RF linear ion acceleration unit.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: October 18, 2011
    Assignee: Kingstone Semiconductor Company, Limited
    Inventor: Jiong Chen
  • Patent number: 8035159
    Abstract: This invention discloses a semiconductor power device. The trenched semiconductor power device includes a trenched gate, opened from a top surface of a semiconductor substrate, surrounded by a source region encompassed in a body region near the top surface above a drain region disposed on a bottom surface of a substrate. The semiconductor power device further includes an implanting-ion block disposed above the top surface on a mesa area next to the body region having a thickness substantially larger than 0.3 micron for blocking body implanting ions and source ions from entering into the substrate under the mesa area whereby masks for manufacturing the semiconductor power device can be reduced.
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: October 11, 2011
    Assignee: Alpha & Omega Semiconductor, Ltd.
    Inventors: Anup Bhalla, François Hébert, Sung-Shan Tai, Sik K Lui
  • Patent number: 8022471
    Abstract: A trenched semiconductor power device includes a plurality of trenched gates surrounded by source regions near a top surface of a semiconductor substrate encompassed in body regions. The trenched semiconductor power device further comprises tilt-angle implanted body dopant regions surrounding a lower portion of trench sidewalls for reducing a gate-to-drain coupling charges Qgd between the trenched gates and a drain disposed at a bottom of the semiconductor substrate. The trenched semiconductor power device further includes a source dopant region disposed below a bottom surface of the trenched gates for functioning as a current path between the drain to the source for preventing a resistance increase caused by the body dopant regions surrounding the lower portions of the trench sidewalls.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: September 20, 2011
    Assignee: Force-MOS Technology Corp.
    Inventor: Fwu-Iuan Hshieh
  • Patent number: 8022482
    Abstract: A trenched semiconductor power device includes a trenched gate insulated by a gate insulation layer and surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a semiconductor substrate. The source region surrounding the trenched gate includes a metal of low barrier height to function as a Schottky source. The metal of low barrier height further may include a PtSi or ErSi layer. In a preferred embodiment, the metal of low barrier height further includes an ErSi layer. The metal of low barrier height further may be a metal silicide layer having the low barrier height. A top oxide layer is disposed under a silicon nitride spacer on top of the trenched gate for insulating the trenched gate from the source region. A source contact disposed in a trench opened into the body region for contacting a body-contact dopant region and covering with a conductive metal layer such as a Ti/TiN layer.
    Type: Grant
    Filed: February 14, 2006
    Date of Patent: September 20, 2011
    Assignee: Alpha & Omega Semiconductor, Ltd
    Inventors: Yongzhong Hu, Sung-Shan Tai