Abstract: A nutritional planning system comprising a plurality of databases such as: a nutrition, a user diet, a recommended diet databases and at least two programs: a nutritional analysis program and a nutritional suggestion program. This nutritional planning system is operational on a host server connected to a computer network for providing communication between the host server and a plurality of remote individual users. The nutrition planning system, further, performs the following step: a) receiving dietary information over a computer network from remote user; b) analyzing the nutritional composition of the dietary information; c) generating suggested modification to the remote user's diet; d) generating suggested modifications to the remote user's diet; e) providing products information which can be used to improve the remote users dietary intake; and f) automatically notifying the remote user over the electronic network of the suggested modification and remote information.

Abstract: A group organizational system operational as a computer program on a computer network. The computer network provides communication between a host server and a plurality of remote individual users. The group organizational system includes an organization database, a registrant database and a roster database. The organization database includes information relevant to an organization and predetermined registration qualifications. The registrant database is in communication with the remote users and the host server. The registrant database receives registration information from the remote users. The roster database is in communication with the host server. The host server includes a registration generation program for comparing the registration information of the remote users with the predetermined registration qualifications to determine whether a remote user qualifies as member of the organization.

Abstract: An array of active pixel sensors. The array of active pixel sensors includes a substrate that includes electronic circuitry. An interconnect structure is formed adjacent to the substrate. The interconnect structure includes a plurality of conductive vias. A plurality of conductive guard rings are formed adjacent to the interconnect structure. Each conductive guard ring is electrically connected to the substrate through at least one of the conductive vias. A plurality of photo diode sensors are formed adjacent to the interconnect structure. Each photo diode sensor is surrounded by at least one of the conductive guard rings. Each photo diode sensor includes a pixel electrode. The pixel electrode is electrically connected to the substrate through a corresponding conductive via. An I-layer is formed adjacent to the pixel electrode. The array of active pixel sensors further includes a transparent conductive layer formed adjacent to the photo diode sensors.

Abstract: An image pixel sensor array. The image pixel sensor array includes a substrate. An interconnect structure is formed adjacent to the substrate. A plurality of image pixel sensors are formed adjacent to the interconnect structure. Each image pixel sensor includes a pixel electrode, and an I-layer formed adjacent to the pixel electrode. The I-layer includes a first surface adjacent to the pixel electrode, and a second surface opposite the first surface. The first surface includes a first surface area which is less than a second surface area of the second surface. The image pixel sensor array further includes an insulating material between each image pixel sensor, and a transparent electrode formed over the image pixel sensors. The transparent electrode electrically connects the image pixel sensors and the interconnect structure.

Abstract: The present invention provides an active pixel sensor read-out channel that includes an active pixel. The active pixel drives an active pixel output to a signal voltage having an amplitude proportional to an intensity of light received by the active pixel. The active pixel drives the active pixel output to a reference voltage when the active pixel is not exposed to light. The active pixel output is connected to a sample and hold circuit. The sample and hold circuit samples and stores the signal voltage and samples and stores the reference voltage. A buffer amplifier generates a difference voltage between the sampled and stored signal voltage and the sampled and stored reference voltage.

Abstract: An ink jet nozzle. The ink jet nozzle includes a substrate having an upper surface in which an ink energizing element is attached to the upper surface of the substrate. The ink jet nozzle further includes an oxide-nitride or oxide-carbide composite orifice layer. The oxide-nitride composite orifice layer includes a lower surface conformally connected to the upper surface of the substrate, and an exterior surface facing away from the substrate. The oxide-nitride composite orifice layer defines a firing chamber. The firing chamber opens through a nozzle aperture in the exterior surface, and extends downward with a negative slope through the oxide-nitride orifice layer to expose the ink energizing element.

Abstract: A method of forming solder bumps on a wafer. The wafer includes at least one substrate, a plurality of solder-wettable pads and a solder wettable retention ring about the periphery of the wafer. The method of forming solder bumps includes forming a non-solder-wettable mask on the wafer which includes a plurality of apertures which align with the solder-wettable pads, and the solder wettable retention ring surrounds the mask. The mask and wafer are positioned within an aperture of a stencil so that the solder wettable retention ring aligns with a gap between the periphery edge of the mask and an inside edge of the aperture of the stencil. Solder paste is applied to the mask so that the solder paste fills the apertures of the mask and the gap. The solder paste is reflowed forming solder bumps on the pads and a solder ring on the solder wettable retention ring. The mask is removed after formation of the solder bumps.

Abstract: A method of forming a low-dielectric constant film on a substrate. The method includes placing the substrate within a plasma processing chamber. Gas within the chamber is removed. A combination of hydrocarbon and hydrofluorocarbon gasses are flowed into the chamber. A high density plasma is created in the chamber. The high density plasma is extinguished. Finally, all gas is removed from the chamber. The method can additionally include a heating step after the film has been formed.

Abstract: An integrated circuit sensor structure. The integrated circuit sensor structure includes a substrate which includes electronic circuitry. An interconnect structure is adjacent to the substrate. The interconnect structure includes conductive interconnect vias which pass through the interconnect structure. A dielectric layer is adjacent to the interconnect structure. The dielectric layer includes a planar surface, and conductive dielectric vias which pass through the dielectric layer and are electrically connected to the interconnect vias. The dielectric layer further includes an interlayer planarization dielectric layer adjacent to the interconnect structure, and a passivating layer adjacent to the interlayer planarization dielectric layer. The integrated circuit sensor structure further includes sensors adjacent to the dielectric layer. The interconnect vias and the dielectric vias electrically connect the electronic circuitry to the sensors.

Abstract: An optical disk structure and optical disk recorder which enables data to be rewritten onto the recording layer of the optical disk. A clock reference structure is permanently formed along servo tracks of the optical disk. An optical transducer is coupled to the clock reference structure and generates a clock reference signal simultaneously with writing new data onto the recording layer of the optical disk. The data is written as data marks along the servo tracks. Each of the data marks includes edges. The edges of the data marks are recorded in synchronization with a write clock. The write clock is phase-locked with the clock reference signal. Therefore, the edges of the data marks are aligned with the clock reference structure with sub-bit accuracy. Standard DVD-ROM disk readers are not able to detect the high spatial frequency of the clock reference structure.

Abstract: An optical device package. The optical device package includes a first substrate. The first substrate includes a light sensitive electronic device and several solder bumps. The electronic devices and the solder bumps are oriented on the first substrate according to a predetermined pattern. The optical device package further includes a second substrate. The second substrate includes a lens which is physically attached to the second substrate. The second substrate further includes several conductive pads which receive the plurality of solder bumps and align the light sensitive electronic device with the lens.

Abstract: An active pixel sensor. The active pixel sensor includes a substrate, an interconnect structure adjacent to the substrate, and at least one photo sensor adjacent to the interconnect structure. Each photo sensor includes an individual pixel electrode. An I-layer is formed over all of the pixel electrodes. A transparent electrode is formed over the I-layer. An inner surface of the transparent electrode is electrically connected to the I-layer and the interconnect structure.

Abstract: An integrated circuit redistribution structure. The integrated circuit redistribution structure includes a plurality of conductive pads located on an active side of an integrated circuit. The integrated circuit redistribution structure includes a redistribution layer and an under bump material structure for receiving a solder bump. The redistribution layer can include a first mechanically protective layer which adheres to the active side of the integrated circuit. The redistribution layer includes a plurality of conductive lines in which at least one of the conductive lines is connected to at least one conductive pad. Each conductive line includes an adhesion and diffusion barrier layer, an electrical conductor layer, and a first metallic protective layer. The under bump material structure is formed over at least one conductive line.

Abstract: An electrical interconnection structure. The electrical interconnection structure includes a mother board substrate having a plurality of layers. At least one layer includes a signal path having a characteristic impedance of Z.sub.O and a conductive ground plane. A signal via passes through each layer of the mother board substrate. The signal via electrically is connected to the signal path. A ground via passes through each layer of the mother board substrate. The ground via is electrically connected to the conductive ground plane. The electrical interconnection structure further includes a plurality of flex circuits. Each flex circuit includes a flex signal path having a characteristic impedance of Z.sub.O and a flex ground plane. Each flex signal path is electrically connected to the signal via and each flex ground plane is electrically connected to the ground via.

Abstract: A method of detecting open circuit defects within an integrated circuit. The invention includes locating a conductive plate proximate to a top surface of the integrated circuit. A voltage potential is coupled to the conductive plate. The voltage potential of the conductive plate couples to open circuit interconnections within the integrated circuit. Open circuit interconnections are identified by monitoring the quiescent current conducted by the integrated circuit while controlling the voltage on the conductive plate and controlling inputs to the integrated circuit.

Abstract: A salient integration mode active pixel sensor. The active pixel sensor includes an amplify/compare transistor which has a threshold voltage. The amplify/compare transistor couples an input of the amplify/compare transistor to an output of the amplify/compare transistor when the input of the amplify/compare transistor exceeds the threshold voltage. A photo-diode generates a signal voltage which has a voltage level dependent upon the intensity of light received by the photo-diode. The signal voltage is coupled to the input of the amplify/compare transistor. A reset element couples a reset line to the photo-diode and discharges the photo-diode when the reset line is active. A coupling capacitor for couples a select line to the input of the amplify/compare transistor. The select line causes the input to the amplify/compare transistor to exceed the threshold voltage and thereby couple the signal voltage to the output of the amplify/compare transistor.

Abstract: An image sensor. The image sensor array includes a substrate. An interconnect structure is formed adjacent to the substrate. A plurality of image sensors are formed adjacent to the interconnect structure. Each image sensor includes a pixel electrode, and a separate I-layer section formed adjacent to the pixel electrode. The image sensor array further includes an insulating material between each image sensor. A transparent electrode is formed over the image sensors. An inner surface of the transparent electrode is electrically connected to an outer surface of the image sensors and the interconnect.

Abstract: A method of estimating the distributed capacitance of an interconnection line within an integrated circuit. The invention includes a method for estimating distributed capacitance between interconnection lines within an integrated circuit. The integrated circuit is modeled as including a middle plane which is planar and adjacent to a top plane and a bottom plane. Each plane includes a plurality of interconnection lines which are infinite in length and parallel. The interconnection lines of the middle plane are orthogonal to the interconnection lines of the top plane and the interconnection lines of the bottom plane. A ground plane is adjacent and planar to the bottom plane. A first value of capacitance between an interconnection line of the middle plane and an interconnection line of the top plane is estimated ignoring the effects of the bottom plane.

Abstract: An encapsulated liquid toner apparatus and method for printing. The encapsulated liquid toner apparatus and method for printing operates by selectively depositing ink filled microcapsules to a print medium. The microcapsules have a mixture of pigment particles, drying agents, and an ester oil contained within a hard brittle outer shell. The outer shell formed from a urea resoricnol formaldehyde material is crushed which releases ink within the microcapsule onto the print medium. One embodiment of the invention deposits the microcapsules on the print medium through an electrophotographic process. Another embodiment deposits the microcapsules through a toner ejection process.

Abstract: An apparatus and method for aligning the conductive pads of a ceramic module with contact points of a socket. The apparatus includes a ceramic module having a plurality of conductive pads. A plurality of rigid spheres are attached to some of the plurality of conductive pads. A socket having apertures and conductive test points receives the ceramic module. The apertures receive the rigid spheres of the ceramic module and align the conductive pads in registration with the plurality of conductive test points.