Abstract: An improved charge pump used in a phase-locked loop includes transient current correction capability by adding a canceling capacitance for each parasitic capacitance associated with a switching device in a charge pump. For each transient current component flowing through the parasitic capacitance, a canceling capacitance is implemented to create a canceling transient current component in the opposite direction such that it cancels out the transient current component. Preferably, an additional switching device is added to implement such a canceling capacitance for each parasitic capacitance.

Abstract: A method and apparatus for efficiently storing an effective address (EA) in an effective to real address translation (ERAT) table supporting multiple page sizes by adding PSI fields, based on the number of unique page sizes supported, to each ERAT entry and using one ERAT entry to store an EA for a memory page, regardless of page size, by setting the PSI fields to indicate the page size.

Abstract: A body panel smoothness inspection light support system is provided having a movable joint and a rotatable sliding contact electrical power connection, minimizing the tendency for a power cord to wear or fray.

Abstract: A method and apparatus are provided for extracting and reporting communication associated information of communications between a subject and an associate. This is achieved by populating an application identifier in the Network Layer 3, which the access networks examine in order to route the packets appropriately, and, thereby, allowing the access networks to isolate and extract the communication associated information. The access networks extract the call associated information and report the same to the Law Enforcement Agencies. Delivery to the LEAs of communication associated information may also be optimized.

Abstract: A method, apparatus and system for broadcasting data packets, perhaps concurrently, over multiple carriers. A carrier is selected for conveying data packets. An employment flag may be transmitted over a forward link MAC channel. QC information for a pilot channel of a given carrier is received over a reverse link MAC channel. The QC pilot channel information is then processed to determine the carrier selection for acceptable data packet transmission for a given time slot.

Abstract: A data structure and corresponding search methods are disclosed for improving the performance of table lookups. A data structure for the table is employed using a single hash table with hash table entries pointing to tree fragments that are contiguous in main memory and can be efficiently loaded into a local data store or cache. Decision nodes are stored in a contiguous block of memory in a relative position based on the position of the decision node in the tree structure, including blank positions. Leaf nodes are stored in a contiguous block of memory based on the position of the leaf node in the tree structure, concatenating leaf nodes to eliminate blank positions. Leaf nodes of the tree fragments contain indicia of a data record, or indicia of another tree fragment. The data structure and corresponding search algorithm are employed for searches based on a longest prefix match in an internet routing table.

Abstract: A method, computer program code, and system directs a complying build tool, such as Make or GNUmake, to derive multiple final files from a single source file, along with any associated auxiliary files. The invention further provides a method to minimize the work of a user of the invention when changing the list of final files to be derived, and provides guards against the possibility of builds being executed with stale data.

Abstract: A system and method is described for the simulation of the transfer function of very large RC networks of IC chips, such as VLSI. Both the real and imaginary components of the transfer function of RC networks have a property of changing more rapidly at lower frequencies but changing less rapidly at higher frequencies. Methods are employed which interpolate between transfer functions of the RC network for specific frequencies in order to derive an interpolated transfer function of the RC network.

Abstract: A method, an apparatus, and a computer program are provided to reduce the number of required latches in a deep pipeline wordline (WL) decoder. Traditionally, a signal local clock buffer (LCB) has been responsible for providing a driving signal to a WL driver. However, with this configuration, a large number of latches are utilized. To reduce this latch usage, a number of LCBs are employed, such that one latch can enable an increased number of WLs. Hence, the overall area occupied by latches is reduced and power consumption is reduced.

Abstract: Power is conserved by dynamically applying clocks to execution units in a pipeline of a microprocessor. A clock to an execution unit is applied only when an instruction to the execution unit is valid. At other times when the execution unit needs not to be operational, the clock is not applied to the execution unit. In a preferred embodiment of the invention, a dynamic clock-control unit is used to provide a control signal to a local clock buffer providing a local clock to an execution unit.

Abstract: A method for providing telecommunications users access to information networks. This is achieved by providing access information for at least one service provider to a service application. Thereafter, the service application retrieves the access information when information is requested from the service provider. The service application formats a request with the access information and transmits the request to the service provider. The service provider's response is presented to the user. By the use of this invention, the user can request information from a service provider from one or more devices without re-entering the access information.

Abstract: A method and an apparatus are provided for saving power in a microprocessor. The microprocessor has at least one functional unit, which has a plurality of blocks. The blocks each include a plurality of sub-blocks. It is determined whether there is any instruction for the functional unit. Upon a determination that there is no instruction for the functional unit, the functional unit is shut down. Upon a determination that there is at least one instruction for the functional unit, at least one inactive block of the functional unit is shut down based on the instruction.

Abstract: A method, an apparatus, and a computer program are provided to minimize filter capacitor leakage in a Phased Locked Loop (PLL). In high frequency processors and devices, filter leakage currents can cause substantial problems by causing PLLs to drift out of phase lock. To combat the leakage currents, a dummy filter and other components are employed to provide additional charge or voltage to a low pass filter during lock. The provision of the charge or voltage exponentially decreases the rate of decay of voltage across the low pass filter caused by leakage currents.

Abstract: A window covering system includes a window covering, a motor having a housing and a power supply inlet, for opening or closing the window coverings, and a modular motor converter. The modular motor converter includes a low voltage interface for functional attachment to the motor, a housing for the low voltage interface, a standard motor power supply connector incorporated into the housing and fitting into the motor power supply inlet, and at least one attachment arm, preferably two, that clips onto the motor housing and permits quick clip-on and removal from the motor. In one form, the modular motor converter further includes a remote radio frequency control for functional attachment to and control of the motor. The modular motor converter also includes means for pre-setting silent stop of the motor end positions. The housing permits external access to motor dip switches.

Abstract: The present invention provides for an integrated circuit (IC) bus system. A local IC is coupled to a remote IC through a bus interface. A local memory is coupled to the local IC. A bus interface controller is employable to track data transfer requests from the remote IC for data address that are contained within at least one segment of the first partitioned memory range. The bus interface controller is further employable to stop the forwarding of a data transfer request generated within the local IC to the remote IC, if the memory segment count corresponding to the data address of the locally generated data transfer request equals zero.

Abstract: The present invention provides for state correction. A first value in a state circuit is received from a flip flop. The received value is transmitted to a second flip flop. The received value within the second flip flop is altered if an error condition arises. The received value is transmitted to a third flip flop. In one aspect, the received value transmitted to the third flip flop comprises an unaltered received value. In another aspect, the received value transmitted to the third flip flop comprises transmitting an altered received value. This allows for an incorrect state within the state machine to change to a correct state after a few clock pulses.

Abstract: The present invention provides a system for managing cache replacement eligibility. A first address register is configured to request an address from an L1 cache. An L1 cache is configured to determine whether a requested address is in the L1 cache and, in response to a determination that a requested address is not in the L1 cache, is further configured to transmit the requested address to a range register coupled to the L1 cache. The range register is configured to generate a class identifier in response to a received requested address and to transmit the requested address and class identifier to a replacement management table coupled to the range register. The replacement management table is configured to generate L2 tag replacement control indicia in response to a received requested address and class identifier. An L2 address register is coupled to the first address register and configured to request an address from an L2 cache.

Abstract: A method and apparatus for expanding a free end of a tube by use of a fluted spinning tool. The fluted spinning tool of the present invention, when rotated at a predetermined speed into the free end of the tube, produces a combination of force, rotation, and heat which results in uniform expansion of the free end of the tube. Further, the fluted spinning tool of the present invention allows for the rapid and efficient production of expanded tube parts, such parts being evenly formed with minimal bias on the expanded free ends of the tubes.

Abstract: An apparatus, a method, and a computer program product are provided for time reduction and energy conservation during address distribution in a high speed memory macro. To address these concerns, this design divides the typical data arrays into sets of paired subarrays, divides the conventional memory address latches into separate sets, and interposes one set of memory address latches between each pair of subarrays. Therefore, time is saved because the address signals have less wire length to travel and energy is saved because only one set of address latches needs to be powered on for each transmission.

Abstract: The present invention provides for selectively overwriting sets of a cache as a function of a replacement management table and a least recently used function. A class identifier is created as a function of an address miss. A replacement management table is employable to read the class identifier to create a tag replacement control indicia. The cache, comprising a plurality of sets, is employable to disable the replacement of at least one of the plurality of sets as a function of the tag replacement control indicia.