Patents Represented by Attorney Charles W. Peterson, Jr.
  • Patent number: 6924517
    Abstract: A field effect transistor (FET), integrated circuit (IC) chip including the FETs and a method of forming the FETS. The devices have a thin channel, e.g., an ultra-thin (smaller than or equal to 10 nanometers (10 nm)) silicon on insulator (SOI) layer. Source/drain regions are located in recesses at either end of the thin channel and are substantially thicker (e.g., 30 nm) than the thin channel. Source/drain extensions and corresponding source/drain regions are self aligned to the FET gate and thin channel.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: August 2, 2005
    Assignee: International Business Machines Corporation
    Inventors: Huajie Chen, Bruce B. Doris, Philip J. Oldiges, Xinlin Wang, Huilong Zhu
  • Patent number: 6922819
    Abstract: Component values and/or sizes in an electrical circuit are optimized with waveform shaping considerations in addition to other constraints and/or objective functions such as delay, power, gain, area or rise/fall times. A consistent metric is defined as a quality measure of waveform match. Gradients of these metrics are computed by efficient methods, thus enabling mathematical optimization by a numerical optimizer. Two different useful metrics and the corresponding efficient gradient computation techniques are described.
    Type: Grant
    Filed: January 29, 2003
    Date of Patent: July 26, 2005
    Assignee: International Business Machines Corporation
    Inventor: Chandramouli Visweswariah
  • Patent number: 6868000
    Abstract: A silicon on insulator (SOI) CMOS circuit, macro and integrated circuit (IC) chip. The chip or macro may include be an SRAM in partially depleted (PD) SOI CMOS. Most field effect transistors (FETs) do not have body contacts. FETs otherwise exhibiting a sensitivity to history effects have body contacts. The body contact for each such FET is connected to at least one other body contact. A back bias voltage may be provided to selected FETs.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: March 15, 2005
    Assignee: International Business Machines Corp.
    Inventors: Yuen H. Chan, Rajiv V. Joshi, Antonio R. Pelella
  • Patent number: 6864540
    Abstract: The invention includes a field effect transistor (FET) on an insulator layer, and integrated circuit (IC) on SOI chip including the FETs and a method of forming the IC. The FETs include a thin channel with raised source/drain (RSD) regions at each end on an insulator layer, e.g., on an ultra-thin silicon on insulator (SOI) chip. Isolation trenches at each end of the FETs, i.e., at the end of the RSD regions, isolate and define FET islands. Insulating sidewalls at each RSD region sandwich the FET gate between the RSD regions. The gate dielectric may be a high K dielectric. Salicide on the RSD regions and, optionally, on the gates reduce device resistances.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: March 8, 2005
    Assignee: International Business Machines Corp.
    Inventors: Rama Divakaruni, Louis C. Hsu, Rajiv V. Joshi, Carl J. Radens
  • Patent number: 6862731
    Abstract: The present invention is a task management system, method and computer program product for determining optimal placement of task components on multiple machines for task execution, particularly for placing program components on multiple computers for distributed processing. First, a communication graph is generated representative of the computer program with each program unit (e.g., an object) represented as a node in the graph. Nodes are connected to other nodes by edges representative of communication between connected nodes. A weight is applied to each edge, the weight being a measure of the level of communication between the connected edges. Terminal nodes representative of ones of the multiple computers are attached to the communication graph. Independent nets may be separated out of the communication graph.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: March 1, 2005
    Assignee: International Business Machines Corp.
    Inventors: Tova Roth, Vadakkedathu T. Rajan, Douglas N. Kimelman, Mark N. Wegman, Karin Hogstedt
  • Patent number: 6829603
    Abstract: This patent describes a novel system, method, and program product that are used in interactive natural language dialog. One or more presentation managers operating on a computer system present information from the computer system to one or more users over network interface(s) and accept queries from the users using one or more known input/output modalities (e.g. Speech, typed in text, pointing devices, etc.). A natural language parser parses one or more natural language phrases received over one or more of the network interfaces by one or more of the presentation managers into one or more logical forms (parsed user input), each logical form having a grammatical and structural organization. A dialog manager module maintains and directs interactive sessions between each of the users and the computer system.
    Type: Grant
    Filed: February 2, 2000
    Date of Patent: December 7, 2004
    Assignee: International Business Machines Corp.
    Inventors: Joyce Yue Chai, Sunil Subramanyam Govindappa, Nandakishore Kambhatla, Tetsunosuke Fujisaki, Catherine G. Wolf, Dragomir Radkov Radev, Yiming Ye, Wlodek Zadrozny
  • Patent number: 6823510
    Abstract: A task management system, method and computer program product for determining optimal placement of task components on multiple machines for task execution, particularly for placing program components on multiple computers for distributed processing. First, a communication graph is generated representative of the computer program with each program unit (e.g., an object) represented as a node in the graph. Nodes are connected to other nodes by edges representative of communication between connected nodes. A weight is applied to each edge, the weight being a measure of the level of communication between the connected edges. Terminal nodes representative of the multiple computers are attached to the communication graph. Independent nets may be separated out of the communication graph. A cut is made at each terminal node and the weights of the cut edges are summed.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: November 23, 2004
    Assignee: International Business Machines Corp.
    Inventors: Vadekkadathu T. Rajan, Douglas N. Kimelman, Tova Roth, Mark N. Wegman, Karin Hogstedt
  • Patent number: 6815282
    Abstract: Silicon on insulator (SOI) field effect transistors (FET) with a shared body contact, a SRAM cell and array including the SOI FETs and the method of forming the SOI FETs. The SRAM cell has a hybrid SOI/bulk structure wherein the source/drain diffusions do not penetrate to the underlying insulator layer, resulting in a FET in the surface of an SOI layer with a body or substrate contact formed at a shared contact. FETs are formed on SOI silicon islands located on a BOX layer and isolated by shallow trench isolation (STI). NFET islands in the SRAM cells include a body contact to a P-type diffusion in the NFET island. Each NFET in the SRAM cells include at least one shallow source/drain diffusion that is shallower than the island thickness. A path remains under the shallow diffusions between NFET channels and the body contact. The P-type body contact diffusion is a deep diffusion, the full thickness of the island. Bit line diffusions shared by SRAM cells on adjacent wordlines may be deep diffusions.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: November 9, 2004
    Assignee: International Business Machines Corp.
    Inventors: William R. Dachtera, Rajiv V. Joshi, Werner A. Rausch
  • Patent number: 6817016
    Abstract: A task management system, method and computer program product for determining optimal placement of task components on multiple machines for task execution, particularly for placing program components on multiple computers for distributed processing. First, a communication graph is generated representative of the computer program with each program unit (e.g., an object) represented as a node in the graph. Nodes are connected to other nodes by edges representative of communication between connected nodes. A weight is applied to each edge, the weight being a measure of the level of communication between the connected edges. Terminal nodes representative of the multiple computers are attached to the communication graph. Then, dominant edges are identified within the communication graph. For any non-terminal node, a connected edge is dominant if it is at least as heavy (its weight is greater than or equal to) as the sum of the remaining non-terminal edges and the heaviest of the remaining terminal edges.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: November 9, 2004
    Assignee: International Business Machines Corp.
    Inventors: Mark N. Wegman, Vadakkedathu T. Rajan, Tova Roth, Douglas N. Kimelman, Karin Hogstedt
  • Patent number: 6798688
    Abstract: A CMOS storage array such as a static random access memory (SRAM) and a sense amplifier. The SRAM may be in partially depleted (PD) silicon on insulator (SOI) and may include fully depleted (FD) FETs. A power line supply select at each row selectively increases cell supply voltage to a full supply voltage when the row is selected. A word line decoder selects a row of cells that are provided the supply voltage and cells in remaining rows are provided a reduced supply voltage. Leakage is substantially lower in said remaining rows than in said selected row. The sense amplifier may include cross coupled FD NFETs sensing stored data. A read/write-select in each bit path selectively blocks cell writes when cell contents are not being changed. Power is not expended unnecessarily writing to cells.
    Type: Grant
    Filed: November 29, 2002
    Date of Patent: September 28, 2004
    Assignee: International Business Machines Corp.
    Inventor: Rajiv V. Joshi
  • Patent number: 6798682
    Abstract: An integrated circuit that may include an array such as a static random access memory (SRAM) with high threshold device array devices and in selected other devices to reduce leakage. Devices with high threshold have a thicker gate oxide or a high k dielectric gate oxide that is selected based on threshold voltage (VT) variations with gate oxide dielectric type or gate oxide thickness for the particular technology, e.g., PD SOI CMOS. High threshold devices may be used in non-core circuits, e.g., test circuits. Also, non-critical paths may be identified and a non-critical path margin identified. A thicker device threshold is selected for non-critcal path FETs based on the non-critical path margin. Non-critical path delays are re-checked. FETs are formed with the selected thicker gate oxide for any non-critical paths passing the re-check and in array FETs with non-selected FETs being formed with normal gate oxide thickness.
    Type: Grant
    Filed: November 29, 2002
    Date of Patent: September 28, 2004
    Assignee: International Business Machines Corp.
    Inventors: Ching-Te K. Chuang, Rajiv V. Joshi, Michael G. Rosenfield
  • Patent number: 6742179
    Abstract: A program product and method of compiling a computer program to optimize performance of a computer program. First, after initialization, a profiling run is done on computer code which may include program code blocks and program data. Execution of each computer program step is monitored and each occurrence of each individual code unit is logged, e.g. each instruction block or block of data. Frequently occurring code units are identified periodically as hot blocks. An initial snapshot of hot blocks is logged, e.g., when identified hot blocks exceed an initial block number. Profiling continues until the profiling run is complete, updating identified hot blocks and logging a new current snapshot whenever a current set of identified hot blocks contains a selected percentage of different hot blocks. Snapshots are selected as representative to different program modes. The program is optimized according to program modes.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: May 25, 2004
    Assignee: International Business Machines Corporation
    Inventors: Nimrod Megiddo, Bilha Mendelson
  • Patent number: 6675174
    Abstract: This invention is a scaleable system to perform exact matching or similarity matching between a large store of reference temporal media sequences and a query target temporal media sequence. The system is not limited to finding exact matching media segments but also can find media segments that are similar. One kind of similarity between media segments is the similarity between a long commercial and a short commercial, where the short commercial is formed by sub-segments of the longer commercial. Another kind of similarity of two media segment is when they depict three-dimensional actions that are similar and imaged from similar viewpoints. Given a reference media segment, a multitude of features are computed in a consistent way from either predetermined or media content-dependent key intervals. These features are stored in segment index tables along with identifiers of the corresponding reference media segments.
    Type: Grant
    Filed: February 2, 2000
    Date of Patent: January 6, 2004
    Assignee: International Business Machines Corp.
    Inventors: Rudolf Maarten Bolle, Arun Hampapur
  • Patent number: 6665839
    Abstract: A system for identifying distinguishing features between an input new blank form and another blank form. The system includes a processor and memory capable of identifying a property in the input form which is sufficiently from a corresponding property in the other form. The identified property complies with a criterion that relates to the likelihood that the property is retained substantially invariable under use of the form. The specified property constitutes a verification property. In the case that no property is identified as a verification property, identifying a property in the other form which is sufficiently distinguishable from a corresponding property in the input form. This identified property complies with a criterion that relates to the likelihood that the property is retained invariable under use of the input form. The latter property constitutes a rejection property.
    Type: Grant
    Filed: June 28, 1999
    Date of Patent: December 16, 2003
    Assignee: International Business Machines Corporation
    Inventor: Aviad Zlotnick
  • Patent number: 6658642
    Abstract: A system, method and program product for computer program development. A new computer program to be developed is outlined and the outline organized to identify required modules. Required modules are provided to the system, which categorizes them and posts a list of required modules with corresponding requirements on, for example, a dedicated web site. Module requirements may include module specifications, a corresponding price and a deadline. Software developers intending to participate may provide an intention to submit. If fewer than two developers intend to submit module candidates for one or more required modules, the computer program outline may be reorganized to encourage more participants. For each required module where at least two module candidates are received, the candidates are tested for compliance with corresponding module requirements.
    Type: Grant
    Filed: June 21, 2000
    Date of Patent: December 2, 2003
    Assignee: International Business Machines Corporation
    Inventors: Nimrod Megiddo, Xiaoming Zhu
  • Patent number: 6654277
    Abstract: A static random access memory (SRAM) with cells in one portion having a higher beta ratio than the remaining cells of the array. In a first portion, cells have a low &bgr; ratio for high performance. A second portion of the array contains SRAM cells with a higher &bgr; ratio that are more stable than the cells in the first portion, but are somewhat slower.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: November 25, 2003
    Assignee: International Business Machines Corp.
    Inventors: Louis L. Hsu, Rajiv V. Joshi, Robert C. Wong
  • Patent number: 6643469
    Abstract: Method for wireless optical communication between a transmitting station and a receiving station, whereby the transmitting station provides a Request-to-Send (RTS) frame to the receiving station to announce the transmission of a data frame, the receiving station provides a Clear-to-Send (CTS) frame to the transmitting station in case of correct reception of the RTS frame, and the transmitting station subsequently sends the data frame to the receiving station. The RTS frame comprises Preamble (PA), Synchronization (SYNC), and Robust Header (RH) fields. The RTS frame further comprises a Source Address/Destination Address field (SA/DA) and a Cyclic Redundancy Check field (CRC). Adjusting the power level of the RTS frame to be different from the nominal transmission power level at which the data frame is sent, and by variable repetition coding within the Robust Header (RH) field of the RTS frame, allows a larger dynamic range of link quality estimation and improved collision avoidance properties.
    Type: Grant
    Filed: May 5, 2000
    Date of Patent: November 4, 2003
    Assignee: International Business Machines Corp.
    Inventors: Fritz R. Gfeller, Walter Hirt
  • Patent number: 6633757
    Abstract: Scheme and apparatus (10) for distinguishing services offered by a service-providing device in adjacency of the apparatus (10) from services offered by a service-providing device not being in the apparatus' adjacency. All devices—including the apparatus—are part of a wireless local network. The apparatus (10) maintains a record with information about services and associated identifiers as well as a list of identifiers about the service-providing devices. The associated identifiers and the list of identifiers are compared to determine an associated service as being in adjacency of the apparatus if it is rendered by a service-providing device being listed in the list of identifiers. An associated service is determined as not being in adjacency of the apparatus if it is rendered by a service-providing device not being listed in the list of identifiers.
    Type: Grant
    Filed: January 19, 2000
    Date of Patent: October 14, 2003
    Assignee: International Business Machines Corp.
    Inventors: Reto Hermann, Dirk Husemann, Michael Moser, Michael Nidd, Andreas Schade
  • Patent number: 6624459
    Abstract: Silicon on insulator (SOI) field effect transistors (FET) with a shared body contact, a SRAM cell and array including the SOI FETs and the method of forming the SOI FETs. The SRAM cell has a hybrid SOI/bulk structure wherein the source/drain diffusions do not penetrate to the underlying insulator layer, resulting in a FET in the surface of an SOI layer with a body or substrate contact formed at a shared contact. FETs are formed on SOI silicon islands located on a BOX layer and isolated by shallow trench isolation (STI). NFET islands in the SRAM cells include a body contact to a P-type diffusion in the NFET island. Each NFET in the SRAM cells include at least one shallow source/drain diffusion that is shallower than the island thickness. A path remains under the shallow diffusions between NFET channels and the body contact. The P-type body contact diffusion is a deep diffusion, the full thickness of the island. Bit line diffusions shared by SRAM cells on adjacent wordlines may be deep diffusions.
    Type: Grant
    Filed: April 12, 2000
    Date of Patent: September 23, 2003
    Assignee: International Business Machines Corp.
    Inventors: William R. Dachtera, Rajiv V. Joshi, Werner A. Rausch
  • Patent number: 6597802
    Abstract: The invention is a system and method for constructing a rolled surface image from a set of partial surface images. A sequence of individual partial surface images is acquired as an object is progressively rolled across the surface of an imaging device. The imaging device is configured so that only that part of the object's surface which is in close proximity is imaged. To produce a complete rolled surface image, i.e. a composite image, the value of each pixel of the composite image is derived by performing a suitable pixel operation on the set of corresponding pixels in the input partial surface images. This is possible because each partial image is represented as a fixed size and each pixel in each of the partial images has a unique position in the partial image. The system can also directly produce a list of salient surface features. Localized features are extracted from each individual partial image whereas other specific attributes of each image are ignored.
    Type: Grant
    Filed: August 25, 1999
    Date of Patent: July 22, 2003
    Assignee: International Business Machines Corp.
    Inventors: Rudolf Maarten Bolle, Jonathan Hudson Connell, Nalini Kanta Ratha