Patents Represented by Attorney Cool Patent, P.C.
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Patent number: 7612684Abstract: Briefly, in accordance with one or more embodiments, a dual mode power amplifier is capable of operating in either linear mode such as class A operation, or a non-linear mode such as class F operation. The power amplifier may be utilized in an RFID interrogator. The power amplifier may be biased to operate in a linear mode if the power amplifier is operating in a higher linearity mode, or may be biased to operate in a non-linear mode if the power amplifier is operating in a higher efficiency, lower power mode. The power amplifier may comprise two or more amplifiers coupled in parallel. A current mirror circuit may turn on more amplifiers if the power amplifier is operating in a higher power mode, and may turn on fewer amplifiers if the power amplifier is operating a lower power mode.Type: GrantFiled: June 22, 2007Date of Patent: November 3, 2009Assignee: Intel CorporationInventors: Issy Kipnis, Daniel Bjork, Jan Rapp
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Patent number: 7605451Abstract: In various embodiments, semiconductor components and methods to manufacture semiconductor components are disclosed. In one embodiment, a method to manufacture semiconductor components includes attaching multiple heat spreaders to a semiconductor wafer. Other embodiments are described and claimed.Type: GrantFiled: June 27, 2006Date of Patent: October 20, 2009Assignee: HVVi Semiconductors, IncInventor: Dan Moline
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Patent number: 7602745Abstract: Embodiments of multiple input multiple output wireless communication systems, associated methods and data structures are generally described herein.Type: GrantFiled: December 20, 2005Date of Patent: October 13, 2009Assignee: Intel CorporationInventors: Xintian E. Lin, Qinghua Li, Keith A. Holt, Raymond Blackham
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Patent number: 7598588Abstract: In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a semiconductor device includes a plurality of rectilinear structures, wherein the plurality of rectilinear structures comprise silicon dioxide and extend from a surface of a semiconductor material to a distance of at least about three microns or greater below the surface of the semiconductor material and wherein a first rectilinear structure of the plurality of rectilinear structures is perpendicular to, or substantially perpendicular to, a second rectilinear structure of the plurality of rectilinear structures. Other embodiments are described and claimed.Type: GrantFiled: October 26, 2007Date of Patent: October 6, 2009Assignee: HVVi Semiconductors, IncInventor: Robert Bruce Davies
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Patent number: 7596355Abstract: An embodiment of the present invention provides a method of closed loop MIMO calibration in a wireless communication system, comprising detecting that station calibration is obsolete and requires calibration, determining a range of automatic gain control which the station wants to calibrate and determining a list of transmission power for an Access Point (AP) in communication with the station, initiating by the station the calibration by sending the power list and N channel sounding preambles, where N is the number of transmit antennas at the station; and sending back by the AP a channel matrix and L sets of channel sounding preambles with a different transmission power level for each set, where L is the number of entries in the power list.Type: GrantFiled: November 29, 2004Date of Patent: September 29, 2009Assignee: Intel CorporationInventors: Qinghua Li, Xintian Lin
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Patent number: 7588968Abstract: A method for attaching an integrated circuit chip to a package substrate includes placing the integrated circuit onto the package substrate, and performing reflow to attach the integrated circuit to the package substrate. The temperature of the integrated circuit and package assembly is maintained at or above a predetermined temperature prior to dispensing an underfill between the package substrate and the integrated circuit. An underfill material is dispensed between the package substrate and the integrated circuit. The underfill material is cured to a first level of curing in the integrated circuit and package assembly. The underfill material is cooled in the integrated circuit and package assembly, and the underfill material is cured to a second level of curing in which the second level of curing is greater than the first level of curing.Type: GrantFiled: March 31, 2008Date of Patent: September 15, 2009Assignee: Intel CorporationInventors: Edward A Zarbock, Ming Lei, Sabina Houle
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Patent number: 7586890Abstract: Executing a simulated annealing process to lower a simulated system energy of a wireless network, the network having a plurality of clients and at least one base station with which the clients may communicate, and a media access control protocol layer supporting at least Orthogonal Frequency Division Multiple Access and Space Division Multiple Access, the simulated system energy based at least in part on reported co-interference between a pair of clients; and computing an allocation of a client of the wireless network to a region within a sub frame of an air link frame of the wireless network, the sub frame including a time slot and a sub-channel frequency range, the allocation based at least in part on a result of the simulated annealing process.Type: GrantFiled: May 19, 2005Date of Patent: September 8, 2009Assignee: Intel CorporationInventor: David M. Putzolu
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Patent number: 7586873Abstract: A wireless communications adapts its mode of operation between spatial multiplexing and non-spatial multiplexing in response to transmission-specific variables. An embodiment of a wireless communications system for transmitting information between a base transceiver station and a subscriber unit includes mode determination logic. The mode determination logic is in communication with the base transceiver station and the subscriber unit. The mode determination logic determines, in response to a received signal, if a subscriber datastream should be transmitted between the base transceiver station and the subscriber unit utilizing spatial multiplexing or non-spatial multiplexing. In an embodiment, the mode determination logic has an input for receiving a measure of a transmission characteristic related to the received signal.Type: GrantFiled: April 7, 2005Date of Patent: September 8, 2009Assignee: Intel CorporationInventors: Robert W. Heath, Jr., Rajeev Krishnamoorthy, Peroor K. Sebastian, Arogyaswami J. Paulraj
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Patent number: 7583559Abstract: A wordline decoder scheme for a memory device is generally described. In one example, a memory device includes a distributed logical NOR gate to decode addressing signals to generate wordline selection signals within a block of memory wherein the distributed logical NOR gate comprises a wordline decoder output driver, the wordline decoder output driver comprising two transistors coupled with a wordline signal.Type: GrantFiled: May 31, 2007Date of Patent: September 1, 2009Assignee: Intel CorporationInventors: Hari Giduturi, Mark Bauer, Hernan A. Castro
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Patent number: 7583871Abstract: Package substrates for optical die structures are generally described. In one example, an apparatus includes a package substrate having one or more plated through hole (PTH) structures, an optical waveguide coupled with the package substrate, the optical waveguide having one or more input/output (I/O) optical signal pathways to route I/O signals to and from the package substrate, and one or more optical fibers coupled with the optical waveguide, the one or more optical fibers being disposed in the PTH structures to route I/O signals to and from a motherboard.Type: GrantFiled: March 20, 2008Date of Patent: September 1, 2009Inventors: Omar J. Bchir, Islam Salama, Charan Gurumurthy, Houssam Jomaa, Ravi Nalla, Yonggang Li
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Patent number: 7583609Abstract: The present invention includes a method of optimizing a transmission mode of wirelessly transmitted data. The method includes selecting a first transmission mode based on a predetermined channel database and a first channel characterization. The first channel characterization can be based upon signals transmitted in an initial mode. An error factor is generated based on a difference between an estimated performance characteristic, and an expected performance characteristic. A subsequent transmission mode is selected based upon the predetermined channel database, the error factor and a subsequent channel characterization. The predetermined channel database can include a predetermined look-up-table that provides transmission mode selections based upon the channel characterizations. The look-up-table generally includes a plurality of quality parameter thresholds that determine the selection of a transmission mode.Type: GrantFiled: November 16, 2004Date of Patent: September 1, 2009Assignee: Intel CorporationInventors: Severine Catreux, David Gesbert, Manish Airy
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Patent number: 7580467Abstract: The present invention provides a method of characterizing a frequency response of a transmission channel between a transceiver and a subscriber unit. The method includes once per predetermined interval of time, the transceiver transmitting a signal including multiple carriers, a plurality of the carriers including training symbols, a plurality of the carriers including information symbols. The subscriber unit generates frequency response estimates at the frequencies of the carriers including training symbols, each interval of time. The frequency response estimates are converted into a time domain response generating an impulse response once per interval of time. The impulse responses are filtered over a plurality of intervals of time. A channel profile is determined from the filtered impulse responses. The channel profile is converted to the frequency domain generating a channel interpolator. The characterized frequency response is generated from the channel interpolator and the frequency response estimates.Type: GrantFiled: April 12, 2006Date of Patent: August 25, 2009Assignee: Intel CorporationInventor: Hemanth Sampath
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Patent number: 7579953Abstract: A radio frequency device capable of differentiating self-jammer signals.Type: GrantFiled: May 31, 2007Date of Patent: August 25, 2009Assignee: Intel CorporationInventor: Scott Chiu
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Patent number: 7574568Abstract: A method, an apparatus and a system for a computing system implements a technique known as cache push that enhances a single writer invalidation protocol with the ability to optionally push data into another processor's cache without changing the memory consistency model being utilized by the method, apparatus and system.Type: GrantFiled: December 6, 2004Date of Patent: August 11, 2009Assignee: Intel CorporationInventor: Shubhendu S. Mukherjee
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Patent number: 7532509Abstract: A memory device including segmented bit lines with memory cells coupled to a data cache is provided. A segmented bit line includes a bias transistor to selectively connect the bit line to a source line. Further, a physical implementation showing a segmentation pattern of the memory device is also provided.Type: GrantFiled: June 30, 2007Date of Patent: May 12, 2009Assignee: Intel CorporationInventor: Tomoharu Tanaka
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Patent number: 7512689Abstract: Systems and methods of discovering devices on a plug and play network provide for enhanced network performance. Initial discovery messages can be adapted based on predetermined characteristics of access points such as the access point being associated with a high loss connection to a network node and the access point being associated with a congested environment with regard to discovery traffic. In one approach, initial discovery messages are transmitted over a wireless connection in unicast so that error correction is implemented. Other approaches involve storing notification messages at access points to minimize discovery traffic, and transmitting initial discovery messages at the lowest available transmission rate to eliminate the need for the transmission of multiple copies.Type: GrantFiled: July 2, 2003Date of Patent: March 31, 2009Assignee: Intel CorporationInventors: Ylian Saint-Hilaire, Bryan Y. Roe, Nelson F. Kidd
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Patent number: 7498850Abstract: Briefly, in accordance with one or more embodiments, an offset compensated comparator is capable of being utilized for higher speed, lower voltage use. The comparator comprises a cross-coupled latch comprising n type devices and p type devices. The threshold mismatch between n type devices is captured on capacitors coupled to the gates of the n type devices to capture the mismatch between the devices. After the threshold mismatch is captured, the comparator can be used as a typical cross coupled latch.Type: GrantFiled: June 22, 2007Date of Patent: March 3, 2009Assignee: Intel CorporationInventor: Nicholas Hendrickson
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Patent number: 7463514Abstract: A method of sensing data in a multi-level cell memory using two or less sense operations and adjusting column load is provided. A sensing circuit implementing a serial-parallel sense scheme is also provided. The column loads are re-configurable based on the sensing circuit and the serial-parallel sense scheme.Type: GrantFiled: June 21, 2007Date of Patent: December 9, 2008Assignee: Intel CorporationInventor: Rezaul Haque
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Patent number: 7412123Abstract: Briefly, in accordance with one or more embodiments, a backplane includes one or more optical links and is capable of receiving one or more circuit cards. Optical signals sent via the optical links may at least partially travel in a free space region between optical elements of the circuit cards and the optical links. Optical signals may also traverse the free space between optical links in the absence of a circuit card wherein the optical signal may travel to one or more other circuit cards on the backplane. As a result, in one or more embodiments a network between one or more of the circuit cards on the backplane may be automatically configured even in the absence of one or more circuit cards from the backplane.Type: GrantFiled: May 22, 2007Date of Patent: August 12, 2008Assignee: Intel CorporationInventors: Tom Mader, Christine Krause, Hengju Cheng, Jamyuen Ko
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Patent number: 7380085Abstract: Briefly, in accordance with one embodiment of the invention, a portable communication device may have multiple processors and a memory. Portions of the memory may only be accessible by one of the processors.Type: GrantFiled: November 14, 2001Date of Patent: May 27, 2008Assignee: Intel CorporationInventors: Eugene P. Matter, Ramkarthik Ganesan