Abstract: A system for providing input to a computer comprises a touchscreen apparatus for generating a grid of horizontal and vertical light beams and producing a set of output signals, each indicating whether a corresponding one of the light beams strikes an object. A scanning device repeatedly scans the states of the output signals, stores data representing the last scanned state of each output signal, and transmits a first interrupt signal to the computer whenever the state of any one of the output signals changes. In response to the interrupt signal, the computer reads the stored scan data, determines whether the data indicates that a horizontal and a vertical light beam is striking an object, and if so, sets parameter values to identify the horizontal and vertical light beams.

Abstract: A charge-coupled device includes an array of closely spaced electrodes aligned along a lateral path on an oxide layer covering a semiconductor substrate. A portion of a channel reigon in the substate below each electrode has a tilted potential gradient providing an electrical field assisting lateral charge carrier drift within the channel region.

Abstract: A serial-parallel-serial, charged-coupled device includes an array of horizontal rows and columns of closely spaced charge storage cells. Each storage cell is formed by an electrode covering an insulation layer above a semiconductor substrate. The semiconductor substrate of each storage cell includes a channel region for conducting carriers laterally through the storage cell. The channel region of each storage cell included both in a first row of the array and in any column of the array has a tilted potential gradient providing an electric field facilitating charge carrier drift within the channel region in two lateral directions, toward a neighboring storage cell of the first row and also toward a neighboring storage cell of its column.

Abstract: Segments of memory are allocated to a stack cache as needed to accommodate additional continuation frames during execution of a program. When a continuation is captured, flags in all segments of the stack cache are set to indicate the signals are shared by a captured continuation, the top segment of the stack cache is copied, and the copy is made the top continuation frame of the stack cache. To invoke a continuation, the top segment of the invoked continuation is copied into the current stack cache segment. When the stack cache is ready to underflow into a segment shared by a captured continuation, the shared segment is copied and the stack cache underflows into the copy.

Abstract: A probe assembly for use in conveying signals between cables from test apparatus and contact areas on a contact face of an integrated circuit includes a support member having an aperture therein and a dielectric membrane clamped over the aperture such that conductive bumps mounted on the underside of the periphery of the membrane engage corresponding contact areas on an upper surface of the support member surrounding the aperture. A central area of the membrane extends downward through the aperture such that conductive bumps on the under side of the central area of the membrane engage contact areas on the contact face of an integrated circuit situated below the aperture. A plurality of conductor runs supported by the membrane extend from the conductive bumps in the central area of the membrane to the conductive bumps in the periphery of the membrane.

Abstract: A differential amplifier includes a pair of input transistors for directing portions of a load current from a current source through a pair of load transistors in response to a differential input signal. A common mode output voltage of the differential amplifier is detected and applied to control terminals of a pair of feedback transistors. The feedback transistors couple the load transistors to a reference voltage and act therewith to provide control currents through the load transistors concurrent with the load currents. The control currents provide feedback that maintains the common mode output voltage at a constant threshold level.

Abstract: Jitter in a clock signal is measured by using the clock signal to clock a digitizer repetitively digitizing a highly stable sine wave signal so as to produce a first data sequence representing the magnitiude of the sine wave signal as a function of time. This first data sequence is normalized to produce a second data sequence having data elements that vary between maximum and minimun magnitudes of +1 and -1. The arcsine of each element of the second data sequence is then determined to provide a monotonically increasing third data sequence, wherein each element of the third data sequence indicates a phase angle associated with a corresponding element of the second data sequence. A fourth data sequence is then generated, each element of the fourth data sequence representing a difference between a phase angle represented by a corresponding element of the third data sequence and a phase angle that the corresponding element of the third data sequence would represent if the clock signal had a constant frequency.

Abstract: An apparatus for storing multi-bit pixel data comprises a random access memory, for storing a plurality of pixels at each addressable memory location, the memory having one write enable and one data input for each bit of each pixel at a currently addressed memory location. Means are provided to couple each line of a data bus to the write enable inputs associated with corresponding bits of each addressed pixel and to place a common bit, in a selected state, on every data input assosciated with a corresponding bit of each currently addressed pixel, thereby permitting a processor to rewrite the addressed pixels with a selected pixel value, provided the write enables of each pixel are activated by an appropriate bit on the associated data bus line, and thereby permitting a processor to write pixel data to the memory using only one bit per pixel on the data bus.

Abstract: An isolation region is fabricated in a silicon substrate by first forming a silicon dioxide insulating layer on the substrate. A silicon nitride mask layer and an oxide layer are then deposited on the insulating layer. The oxide, mask and insulating layers and the substrate are etched to form a trench in the substrate. A channel stopper is implanted in substrate below the trench and the oxide layer is then stripped. Thereafter, the trench surface is oxidized to extend the insulating layer into the trench. Next, the trench is partially filled with polysilicon material, the surface of which is initially oxidized to extend the insulating layer over the trench. The mask layer is etched back to expose portions of the insulating layer adjacent the trench. The upper surface of the polysilicon material in the trench and portions of the substrate beneath exposed portions of the insulating layer are further oxidized to thicken the insulating layer over the trench.

Abstract: An M-element waveform data sequence representative of an analog input signal during a period of interest is produced by first amplifying the input signal with a linear amplifier and periodically digitizing the amplifier output signal to produce a first data sequence having M+N-1 elements. The first N-1 elements of the first data sequence represent magnitudes of the amplifier output signal preceding the period of interest, and the remaining M elements of the first data sequence represent magnitudes of the amplifier output signal during the period of interest. The first data sequence is applied as input to a digital filter which produces an output second data sequence wherein each element of the second data sequence corresponds to an element of the first data sequence and is a linear combination of its corresponding first data sequence element and N-1 data preceding data elements of the first data sequence.

Abstract: An improved graphics display system includes a picture processor for processing display lists defining graphic designs, the display lists comprising pixel data and/or instructions for generating pixel data. The system further includes a display controller which stores pixel data in a frame buffer memory and controls a display of graphic designs in accordance therewith. When a display list defining a graphic design is changed but the design is not to be displayed, the display list is processed by the picture processor, but the output pixel data generated by the picture processor is routed not to the display controller but to a control processor which stores the generated pixel data in a second memory. When the design is thereafter to be displayed, the control processor generates a secondary display list including the pixel data stored in the second memory to the picture processor.

Abstract: A sequence controller includes a plurality of time slice modules, each producing an adjustable number of sequentially asserted time slice signals, and a plurality of phase generators each having as input the time slice signals produced by an associated one of the time slice modules. Each phase generator produces a square wave output signal, the timing of the rising and trailing edges of each pulse thereof being determined by a selectable pair of its input time slice signals. A state machine monitors time slice signals produced by the time slice modules and transmits a separate enable signal to each time slice generator in response to the time slice signals. Each of the time slice modules produces time slice signals only when output enabled by an enable signal from the state machine.

Abstract: A method and apparatus for determining the effective bits of resolution of a digitizer wherein amplitude, frequency, phase angle and offset parameters characterizing a sinewave input signal to the digitizer are estimated from the waveform data sequence produced by the digitizer in response to the input signal. These estimated parameters are used to develop a model of the sinewave signal, and the effective bits of resolution of the digitizer are then determined by the comparing measured magnitudes of the sinewave signal as represented by the waveform data sequence to estimated magnitudes of the input signal being determined from the model.

Abstract: An oscilloscope automatically measures an interval between first and second triggering events in a repetitive input signal. The oscilloscope includes A and B sweep circuits for generating event triggered "A" and "B" sweep ramps, respectively. The oscilloscope also includes two comparators. One comparator generates an "A" indicating signal when the A sweep ramp reaches the level of a first adjustable reference signal. The other comparator generates a "B" indicating signal when the B sweep ramp reaches the level of a second adjustable reference signal. The oscilloscope initially sets both sweep circuits to repetitively trigger on the first event and sets the first reference signal to a constant level. While monitoring relative timing of the A and B indicating signals, the oscilloscope iteratively adjusts the second reference signal to a "first pass" level for which the A and B indicating signals are repetitively generated at substantially similar times.

Abstract: An object-oriented, distributed data base system separates into a plurality of virtual partitions following communication failure between sites accessing the data base. Each partition accesses a separate copy of an initial data base and independently updates groups of data objects included in the data base to add new versions of data objects to the data base. Each virtual partition maintains a copy of all previous versions of data objects and maintains a change list describing all group updates that it executes. Following restoration of communication between sites, each virtual partition merges the data bases maintained by separate partitions to form a consistent merged data base permitting versions of data objects and collections of data objects created by any one of the separate virtual partitions to be identified and accessed in the merged data base.

Abstract: A clock signal is transmitted to nodes of each of several interconnected circuits through a separate adjustable delay circuit, the time delay of each delay circuit being adjusted so that the clock signal arrives at each node at the same time, thereby synchronizing operation of the separate integrated circuits one to another. Each delay circuit comprises a set of signal delay elements which can be selectively switched into the clock signal path so that the clock signal delay may be adjusted by adjusting the number of signal delay elements in the clock signal path. Each signal delay element itself has a unit delay adjustable in proportion to an applied control voltage generated by a delay element monitor. The delay element monitor measures the unit delay in relation to the period of a stable reference clock and adjusts the delay of each delay element as necessary to ensure that the unit delay remains constant.

Abstract: A multiple port memory includes a set of memory units each comprising a set of memory cells, one corresponding to each port. Each cell of a memory unit stores a single data bit and each cell is independently read and write accessed through separate data, address and control busses. The cells of each memory unit are cross-coupled so that when the state of the bit stored by one of the cells of a memory unit is changed when write accessed, the other cells of the memory unit thereafter change the states of their stored bits in the same way.

Abstract: A multilevel logic circuit includes a pair of resistors coupling collectors of an emitter-coupled pair of transistors to a voltage source, and includes a switch selectively connecting the emitters of the transistors to a current source. When the switch is closed, an input signal applied across the bases of the transistors controls an output signal produced between their collectors. When the switch is open, both transistors are off and the output signal is not affected by the input signal. A clamping circuit connected to a circuit node at the emitters of the transistors maintains a constant voltage at the node sufficient to prevent leakage current from charging or discharging inherent circuit capacitance at the node when the switch is open.

Abstract: A circuit produces an output binary floating point number approximating with high accuracy the inverse of an input binary floating point number D in accordance with the expression (1/D).apprxeq.[(1/A)-C]+[C-(B/A.sup.2)], where the number A is a low accuracy approximation of D, and B is substantially equal to D-A. C is a number selected for each value of A such that the exponents of quantities [(1/A)-C] and [C-(B/A.sup.2)] are equal to the exponent of the quantity 1/2A. Quantities [(1/A)-C] and [C-(B/A.sup.2)] are produced by lookup tables and summed to provide an approximation of 1/D.

Abstract: A computer-based digital oscilloscope includes a touchscreen mechanism for generating output signals indicating when an operator has touched the oscilloscope's screen and identifying a particular touch zone area that the operator has touched from among a plurality of touch zone areas of the screen. A computer which controls display of waveforms and other images on the screen, monitors the touchscreen output signals to determine whether the operator is touching a touch zone and to determine whether a portion of a particular image other than a waveform is displayed on the screen within boundaries of the touch zone.