Patents Represented by Attorney, Agent or Law Firm Daniel R. Collopy
  • Patent number: 5808873
    Abstract: An electronic component assembly (10) is formed by mounting an electronic component (31) to a substrate (11). An encapsulating material (33) is used to protect the electronic component (31) from environmental hazards. The encapsulating material (33) is formed by dispensing an encapsulating fluid over the electronic component (31). A trench (36) is formed in a masking layer (21) on a substrate (11) to stop the flow of the encapsulating fluid. The trench (36) provides an edge (35) which acts as a discontinuity in the surface (23) of the masking layer (21). This discontinuity is sufficient to control the flow of the encapsulating fluid until the encapsulating fluid is cured to form the encapsulating material (33).
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: September 15, 1998
    Assignee: Motorola, Inc.
    Inventors: Phillip C. Celaya, John R. Kerr
  • Patent number: 5808331
    Abstract: A semiconductor device (15) having a sensor (11) and a transistor (10) formed on a monolithic semiconductor substrate (16). The sensor (11) has a source region (41), a drain region (42), and a microstructure (12) which is formed from a conductive layer (28). The microstructure (12) modulates a channel region between the source and drain regions (41,42). The transistor has a gate structure, a portion of which is formed from the same conductive layer (28) used to form the microstructure (12). Anneal steps are performed on the conductive layer (28) to remove stress prior to the formation of source and drain regions (34,36) of the transistor (10). A self-test structure (14) is formed adjacent to the microstructure (12) which is used to calibrate and verify the operation of the sensor (11).
    Type: Grant
    Filed: July 16, 1997
    Date of Patent: September 15, 1998
    Assignee: Motorola, Inc.
    Inventors: Zuoying L. Zhang, Barun K. Kar, Guang X. Li, Ronald J. Gutteridge, Eric D. Joseph
  • Patent number: 5804462
    Abstract: A process for forming different types of sensors, including metal oxide (10), calorimetric (44), and heterojunction (48), on the same semiconductor chip includes the steps of doping a top surface of a silicon substrate (16) with boron to form a diffusion region (18) for a resistive heater, forming a first silicon nitride layer (24) on the diffusion region, forming a first metal layer (26) on the first silicon nitride layer to provide a resistive temperature detector, forming a second silicon nitride layer (28) on the first metal layer, forming a second metal layer (34) on the second silicon nitride layer, and etching a sensing cavity (40) underneath and adjacent to the diffusion region using an anisotropic wet etchant and the diffusion region as an etch-stop. A metal oxide layer (36) is formed over the second metal layer for a metal oxide or heterojunction sensor. The sensor can optionally be suspended by tethers (38) within the sensing cavity.
    Type: Grant
    Filed: November 30, 1995
    Date of Patent: September 8, 1998
    Assignee: Motorola, Inc.
    Inventors: Chung-Chiun Liu, Xiaodong Wang, Henry G. Hughes
  • Patent number: 5790728
    Abstract: An optical component (40) is formed by bonding a light generating device (43) onto a transparent substrate (41). The light generating device can be attached to the transparent substrate (41) using a flip-chip bond. A light detecting device (51) is also bonded to the transparent substrate (41) and positioned so that a portion of the optical signal provided by the light generating device (43) is reflected to the light detecting device (51) through the transparent substrate (41). A holographic film (42) may be formed on the transparent substrate (41) to diffuse the optical signal provided by the light generating device (43).
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: August 4, 1998
    Assignee: Motorola, Inc.
    Inventor: Robert M. Wentworth
  • Patent number: 5783853
    Abstract: A diaphragm (30) flexes in response to varying forces applied to the diaphragm (30). This motion is monitored by a transducer (31) that is preferably in a Wheatstone bridge configuration. When the diaphragm (30) is in a relaxed condition, with little or no force applied to the diaphragm, an offset voltage is generated by highly doped contact regions (35,36,37,38). At least one of these highly doped contact regions (35,36,37,38) is configured to have more squares of material which increases the resistance of that particular highly doped contact region (37).
    Type: Grant
    Filed: January 2, 1996
    Date of Patent: July 21, 1998
    Assignee: Motorola, Inc.
    Inventor: Dragan Mladenovic
  • Patent number: 5772325
    Abstract: A probe (10) is formed to provide a topographical and thermal image of a semiconductor device. The probe (10) is made from a first ribbon of material (11) and a second ribbon of material (12) which forms a thermocouple junction (13). A probe tip (15) is then attached to the thermocouple junction (13) with an epoxy (14). In an alternate embodiment of the present invention, a probe (20) has a point region (17) which is formed by bending a portion of the thermocouple junction (13) and coating the point region (17) is coated with a thermally conductive material. An optical signal is then reflected off a planar portion of the first ribbon of material (11), the second ribbon of material (12), or the thermocouple junction (13) so the motion of the probe (10,20) can be monitored by an optical detector.
    Type: Grant
    Filed: November 20, 1995
    Date of Patent: June 30, 1998
    Assignee: Motorola, Inc.
    Inventors: Theresa J. Hopson, Ronald N. Legge
  • Patent number: 5760476
    Abstract: In a first approach, an interconnect structure (10) reduces peak localized interconnect current density by distributing current flow around the perimeter (22) of an interlevel connector (14) in a semiconductor device. A first interconnect level (12) is connected to a second interconnect level by the interlevel connector (14), and the perimeter (22) of the interlevel connector (14) is located at the juncture between the first interconnect level (12) and the interlevel connector (14). The first interconnect level (12) has two or more fingers (16,18,20) protruding therefrom that connect to the perimeter (22) of the interlevel connector (14). At least one opening (36, 38) is disposed between two of the fingers (16,18,20) for dividing current flow.
    Type: Grant
    Filed: October 15, 1996
    Date of Patent: June 2, 1998
    Assignee: Motorola, Inc.
    Inventors: Charles J. Varker, Michael L. Dreyer, Thomas E. Zirkle
  • Patent number: 5751025
    Abstract: A current limiter (15) is formed between a silicon substrate (10) and a source region (17) by a channel implant region (20). The channel implant region (20) is not modulated by a gate structure so the maximum voltage that can flow between the silicon substrate (10) and the source region (17) is determined by the doping profile of the ever-present channel implant region (20). A pinch-off structure (12) is used to form a depletion region which can support a large voltage potential between the silicon substrate (10) and the source region (17). In an alternate embodiment, a bipolar device is formed such that a limited current flow can be directed into a base region (32) which is used to modulate a current flow between silicon substrate (30) and an emitter region (38). Using the current limiters (15,35) it is possible to form an AC current limiter (50) that will limit the current flow regardless of the polarity of the voltage placed across two terminals (51,52).
    Type: Grant
    Filed: January 2, 1997
    Date of Patent: May 12, 1998
    Assignee: Motorola, Inc.
    Inventors: David M. Heminger, Joseph H. Slaughter
  • Patent number: 5747839
    Abstract: A field effect transistor (10) for chemical sensing by measuring a change in a surface potential of a gate electrode (48) due to exposure to a fluid has a semiconductor substrate (12) with a trench (18, 20). The trench has a first sidewall (30) and a second sidewall (32) disposed opposite the first sidewall to provide a fluid gap (50) for the fluid to be sensed. The gate electrode is disposed overlying the first sidewall of the trench, and a source region (54) and a drain region (56) are disposed in the second sidewall of the trench. A channel region (52) is disposed between the source and drain regions, and the gate electrode is disposed opposite the first channel region across the fluid gap. A heater (26) for regulating the temperature of the gate electrode is disposed in the first sidewall of the trench.
    Type: Grant
    Filed: September 30, 1996
    Date of Patent: May 5, 1998
    Assignee: Motorola, Inc.
    Inventors: Jonathan H. Hammond, Young Sir Chung
  • Patent number: 5744396
    Abstract: A method for fabricating semiconductor substrates with resistivity below 0.02 ohm-cm is provided. This low resistivity is achieved by doping a silicon melt with a phosphorus concentrations above 1.times.10.sup.18. The silicon melt is also doped with a germanium concentration that is 1.5 to 2.5 times that of the phosphorus concentration and a stress and dislocation free crystalline boule is grown. Phosphorus in high concentrations will induce stress in the crystal lattice due to the difference in the atomic radius of silicon atoms versus phosphorus atoms. Germanium compensates for the atomic radius mismatch and also retards the diffusion of the phosphorus as the diffusion coefficient remains relatively constant with a doping of 1.times.10.sup.18 to 1.times.10.sup.21 atoms per cm.sup.3. This will retard phosphorus from diffusing into an overlying epitaxial layer and retard other layers formed on the substrate from being auto-doped.
    Type: Grant
    Filed: May 31, 1996
    Date of Patent: April 28, 1998
    Assignee: Motorola, Inc.
    Inventors: Herng-Der Chiou, Geoffrey J. Crabtree
  • Patent number: 5739561
    Abstract: A light sensitive semiconductor device (10) is formed in a well region (12) in a semiconductor substrate (11). A first voltage (30) is applied to a source region (4) of the semiconductor device (10) and to a contact region (13) to the well region (12) to attract holes. A second voltage (31) is applied to the source region (14) and a drain region (16) to provide a current flow. As photons (23) from a light source are absorbed by semiconductor device (10), the source to drain current is decreased.
    Type: Grant
    Filed: April 30, 1996
    Date of Patent: April 14, 1998
    Assignee: Motorola, Inc.
    Inventor: Peter Wennekers
  • Patent number: 5734194
    Abstract: A semiconductor device (10) is formed in a semiconductor substrate (11) that acts as a collector region. A base region (12) is formed in the semiconductor substrate (11) and an emitter region (52) is formed such that it contacts at least a portion of the base region (12). A conductive layer (28) is used to provide electrical connection to the emitter region (52). The portion of the conductive layer (28) above the emitter region (52) is counter-doped to address the problems of an interfacial oxide layer (27) that exists between the emitter region (52) and the conductive layer (28).
    Type: Grant
    Filed: January 31, 1997
    Date of Patent: March 31, 1998
    Assignee: Motorola, Inc.
    Inventors: Paul W. Sanders, Troy E. Mackie, Julio C. Costa, John L. Freeman, Jr., Alan D. Wood
  • Patent number: 5733806
    Abstract: A method for forming a self-aligned semiconductor device (10) having sidewall spacers (16,17) used to align the formation of a source region (23) and a drain region (24) along with the formation of a gate structure (35). Spacers (16,17) can be formed using a sacrificial structure process where a sacrificial structure (14) is formed which determines the location of a final gate structure (35). The deposition of a dielectric layer over the sacrificial structure (14) and subsequent etch will form spacers (16,17). A second method for forming spacers (18,19), uses a photolithographic process to pattern a dielectric layer without the use of a sacrificial structure process. The spacers (16,17) are used in conjunction with implant mask regions (22) to form the source and drain regions (23,24) which are aligned to the gate structure (35).
    Type: Grant
    Filed: September 5, 1995
    Date of Patent: March 31, 1998
    Assignee: Motorola, Inc.
    Inventors: Gordon M. Grivna, Karl J. Johnson
  • Patent number: 5633911
    Abstract: A telepoint communication system 100 where the telepoint communication unit (TCU) 125 reserves a communication channel on the communication link 126, where the communication link 126 couples the telepoint base station (TBS) 110 to the public switched telephone network (PSTN) 105. Reserving the communication channel is accomplished by communicating information packets 130,133,136,140,143 and 146 between the TCU 125 and the TBS 110. Reserving the communication channel enables the TCU 125 to ensure the reserved communication is available to route incoming calls received on the telepoint communication system 100 to the TCU 125, particularly when an incoming call is expected.
    Type: Grant
    Filed: January 23, 1995
    Date of Patent: May 27, 1997
    Assignee: Motorola, Inc.
    Inventors: Wen K. Han, See W. Ng, Prashanth M. L. Gowda
  • Patent number: 5525204
    Abstract: Fabricating a printed circuit by forming layers of metallization in a predetermined sequence, where each layer is formed in a predetermined pattern, with a layer of plating formed at selected locations of the printed circuit. Subsequently, forming a layer of insulation over the layers of metallization, except at the selected locations.
    Type: Grant
    Filed: September 29, 1994
    Date of Patent: June 11, 1996
    Assignee: Motorola, Inc.
    Inventors: John Shurboff, Ang L. Eng
  • Patent number: 5451903
    Abstract: An output driver (100) for driving an external impedance load (160) comprising an output stage (110) and an impedance element (120). An input signal to the output stage (110) is controlled to provide an output signal that then drives the external impedance load (160).The output stage (110) comprises an input controller (112) that couples to a current generator (114) and a current replicator (116). A voltage reference source (150) determines a quiescent output current level of the current generator (114). The impedance element (120) comprises a current modulating resistor (230) that couples a two polarity voltage supply (130) to the output stage (110).Operations of the output driver (100) depends on the external load impedance (160). For a high external impedance load, the output driver (100) functions as a simple voltage follower.
    Type: Grant
    Filed: June 24, 1994
    Date of Patent: September 19, 1995
    Assignee: Motorola, Inc.
    Inventor: Desmond R. Armstrong
  • Patent number: 5347268
    Abstract: A radio frequency (RF) communication system transmits information including multiple data formats. The RF communication system receives the information (102) and parses the information into a plurality of nibbles (126), each of the nibbles comprising a predetermined number of bits. The plurality of nibbles are then provided to a terminal (10) as a message (154), the message is encoded by the terminal (10), and the encoded message is transmitted to a transmitter (15) for transmission therefrom.
    Type: Grant
    Filed: October 18, 1991
    Date of Patent: September 13, 1994
    Assignee: Motorola, Inc.
    Inventors: Leonard E. Nelson, Robert K. Lockhart, Jr.
  • Patent number: 5323148
    Abstract: A selective call receiver (10) for receiving and presenting messages comprises a receiver (12) for receiving the messages and a memory (14) for storing the received messages. A processor (13) calculates the length of certain types of stored messages, and, for those types of messages, the length of the message is displayed prior to presenting the message.
    Type: Grant
    Filed: March 9, 1993
    Date of Patent: June 21, 1994
    Assignee: Motorola, Inc.
    Inventors: Jorge L. Olazabal, Silvia M. Viteri
  • Patent number: 5313197
    Abstract: A paging system (100) includes a transmitter (104) for transmitting first information including a transmitted page, a receiver (108) for receiving second information, and a diagnostic controller (106) coupled to the transmitter (104) and the receiver (108) for monitoring the first and second information to determine whether the transmitted page was correctly received by the receiver (108).
    Type: Grant
    Filed: September 27, 1991
    Date of Patent: May 17, 1994
    Assignee: Motorola, Inc.
    Inventors: William M. Barr, Steven J. Goldberg
  • Patent number: 5311516
    Abstract: A selective call receiver (106) receives one or more message packets of a transmitted fragmented message, where each of the one or more message packets includes an address (1605) and message data (1610), and the message data (1610) includes an indication (1702) of whether more message packets are to be received for the fragmented message. The selective call receiver (106) receives an address of each message packet, and then correlates (2908) the address to one or more predetermined addresses. After a successful correlation (2908), the selective call receiver (106) decodes the message data (1610) of each message packet, and then successively stores (2928, 2936, 2942) the decoded message data (1610) to reconstruct the fragmented message. The selective call receiver (106) determines that the fragmented message is completely reconstructed after detection (2918) in the decoded message data (1610) an indication (1702) that no more message packets are to be received for the fragmented message.
    Type: Grant
    Filed: November 23, 1992
    Date of Patent: May 10, 1994
    Assignee: Motorola, Inc.
    Inventors: William J. Kuznicki, David F. Willard