Patents Represented by Attorney, Agent or Law Firm Edward C. Kwok
  • Patent number: 6188343
    Abstract: A non-linear function of an input voltage is provided by cascading multiplying digital-to-analog converters (mDACs) to provide a polynomial power series to approximate the non-linear function. Weighting functions are provided by fixed gain amplifiers.
    Type: Grant
    Filed: April 21, 1998
    Date of Patent: February 13, 2001
    Assignee: National Semiconductor Corporation
    Inventor: Steven O. Smith
  • Patent number: 6184112
    Abstract: In accordance with the present invention, an amorphous layer is formed in a crystalline substrate (e.g., the channel region of a MOSFET transistor) by, for example, implanting ions of an inert specie such as germanium. A dopant is implanted so that it overlaps with the amorphous layer. Subsequently, low temperature recrystallization of the amorphous layer leads to an abrupt retrograded layer of active dopant in the channel region of the MOSFET. This retrograded dopant layer could be formed before or after the formation of the gate electrode.
    Type: Grant
    Filed: December 2, 1998
    Date of Patent: February 6, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Witold P. Maszara, Srinath Krishnan, Shekhar Pramanick
  • Patent number: 6183131
    Abstract: A temperature sensor corrects the parabolic curvature error in the output signal without attempting to linearize the reference voltage itself. A temperature sensor produces a temperature output signal that is a function of the ratio of a temperature dependent voltage to a reference voltage. The temperature sensor uses a nonlinear reference voltage, e.g., the reference voltage conforms to a curve with an approximately hyperbolic shape over a temperature range, so that the ratio of the temperature dependent voltage to the hyperbolic reference voltage will be linear. The hyperbolic reference voltage is generated by summing a reference voltage with an appropriate temperature dependent voltage. The “gain” or slope of the ratio is altered by adjusting a scaling factor. Finally, the offset of the ratio is adjusted so that the temperature sensor produces the appropriate output signal at ambient temperature.
    Type: Grant
    Filed: March 30, 1999
    Date of Patent: February 6, 2001
    Assignee: National Semiconductor Corporation
    Inventors: Peter R. Holloway, Ravi Subrahmayan, Gary S. Sheehan
  • Patent number: 6185130
    Abstract: A programmable reference current source used with a memory array during test and user modes to program or erase verify. The reference current source is programmable so that optimal reference currents can be determined during test mode. A value representing the optimal reference current is stored so that the reference current source provides the determined reference current during user mode.
    Type: Grant
    Filed: October 18, 1999
    Date of Patent: February 6, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Shane C. Hollmer, Joseph G. Pawletko
  • Patent number: 6185083
    Abstract: A protected telecommunications test adapter for use in troubleshooting telephone networks. The test adapter plugs into an industry standard panel and provides access to the network wiring via an RJ11 connector or clip posts. The test adapter has a surge protector to protect both user and equipment. The test adapter is of a modular enclosed housing design for portability and low manufacturing cost. Since the test adapter is intended for temporary test installation, its dimension is designed for ease of removal, installation, and access to the test connector or posts.
    Type: Grant
    Filed: December 11, 1998
    Date of Patent: February 6, 2001
    Assignee: NEC America, Inc.
    Inventors: Randall E. Mathieu, William R. Olsen
  • Patent number: 6185226
    Abstract: A repeater interface controller (“RIC”) integrated circuit with integrated filters and buffer drivers is provided for use in a repeater. In one embodiment, the RIC uses two filters to filter link pulse signals and data signals for a plurality of ports. Thus, the RIC is able to concurrently provide filtered link pulses to some ports and filtered data signals to other ports. Further, because only two filters are used, the area required to implement the plurality of ports is reduced relative to conventional repeaters that use a filter for each port. In another embodiment of the present invention, a RIC includes a logic circuit and a plurality of analog multiplexers and twisted pair buffer drivers. The analog multiplexers receive signals on their input lines and select which of these signals are passed to the buffer drivers to be outputted.
    Type: Grant
    Filed: June 22, 1998
    Date of Patent: February 6, 2001
    Assignee: National Semiconductor Corp
    Inventors: Para K. Segaram, Roy T. Myers, Jr.
  • Patent number: 6179975
    Abstract: In the monitoring of the consumption of a target of, for example, titanium for providing titanium and/or titanium nitride film, the process work in kilowatt-hours (Y1) is determined for complete consumption of the target when providing only titanium, and the process work in kilowatt-hours (Y2) is also determined for complete consumption of the target in providing only titanium nitride.
    Type: Grant
    Filed: October 2, 1996
    Date of Patent: January 30, 2001
    Assignee: National Semiconductor Corporation
    Inventor: Charles A. Dark
  • Patent number: 6181605
    Abstract: A technique to determine whether multiple memory cells are programmed or erased. After a program or erase operation, respective program or erase verify operations are performed. A logical gate is coupled to measure the state of each memory cell. When all memory cells selected to be programmed or erased are programmed or erased then the output of the logical gate indicates successful program or erase verify. Thus, by using a single logical gate coupled to measure the states of multiple memory cells, only the output of the logical gate need be measured to determine successful program or erase verification of multiple memory cells.
    Type: Grant
    Filed: October 6, 1999
    Date of Patent: January 30, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Shane C. Hollmer, Joseph G. Pawletko, Michael S. C. Chung
  • Patent number: 6175276
    Abstract: A preamplifier amplifies a differential signal from a magneto-resistive read head. The preamplifier is designed to maximize gain and minimize introduction of noise, while maintaining wide bandwidths and common mode rejection performance. The emitters of the differential amplifier are coupled together by a third transistor and a capacitor.
    Type: Grant
    Filed: March 16, 1998
    Date of Patent: January 16, 2001
    Assignee: National Semiconductor Corporation
    Inventor: Perry S. Lorenz
  • Patent number: 6171922
    Abstract: A process for increasing the sheet resistance and lowering the temperature coefficient of resistance of a thin film resistor deposited on a wafer, the process comprising ramping the temperature of the wafer to an annealing temperature above the decomposition temperature of the thin film resistor using a radiant heat source such that the wafer reaches the annealing temperature within a ramp up time of from about 5 to 10 seconds, and annealing the wafer at the annealing temperature for an annealing period of from about 50 to 85 seconds.
    Type: Grant
    Filed: September 1, 1993
    Date of Patent: January 9, 2001
    Assignee: National Semiconductor Corporation
    Inventor: Pirouz Maghsoudnia
  • Patent number: 5436588
    Abstract: A bias control circuit and an associated method in an audio output amplifier provide slow turn-on or turn-off operation of a bias voltage generation circuit, using an external bypass capacitor. A slow rate in the turn-on and turn-off operations in such a bias voltage generation circuit prevents click or pop noises. In one embodiment, two bipolar transistors each responsive to the voltage on an external capacitor are provided to gradually increase the voltage of an output node, which can be used to drive the gate terminal of an MOS transistor in the bias voltage generation circuit. Alternatively, in another embodiment, an MOS inverter, which receives as input the voltage on bypass capacitor, is provided to divert current from a conventional bias circuit. The rate at which the MOS inverter diverts current from the conventional bias circuit controls the slew rate in the turn-off operation of the bias current.
    Type: Grant
    Filed: December 17, 1993
    Date of Patent: July 25, 1995
    Assignee: National Semiconductor Corp.
    Inventor: Parviz Ghaffaripour
  • Patent number: 5386374
    Abstract: An improved method for simulating the surface contours of a layer of material to be formed over a base structure using a string algorithm is described. The method of the string algorithm includes the steps of defining old surface points along the base structure, defining a set of possible new surface points, and defining a set of orderly array of points, from the set of new surface points, which define the surface contours of the simulated layer of material formed over the base structure.
    Type: Grant
    Filed: June 18, 1991
    Date of Patent: January 31, 1995
    Assignee: National Semiconductor Corporation
    Inventor: Peter P. Meng
  • Patent number: 5216231
    Abstract: A code reading device, which converts a bar code displayed on a medium into electric signals by means of a photo-electric converter and outputs them after having decoded them into data, which can be dealt with by an information processing device, wherein there are disposed two memories for storing data decoded, respectively, at the present time and data decoded at the last time and a comparator for comparing the data stored in these memories, and decoded data are transmitted to the information processing device, only when the two data differ from each other so that the amount of outputted data is reduced.
    Type: Grant
    Filed: August 8, 1991
    Date of Patent: June 1, 1993
    Assignee: Alps Electric Co., Ltd.
    Inventor: Junichi Ouchi
  • Patent number: 5140579
    Abstract: A cartridge loading device for a disk player which can supply, when a disk tray on which a disk is placed is accommodated in position into a device body of the disk player, the disk readily to a disk driving unit located laterally of an area of advancing and retracting movement of the disk tray.
    Type: Grant
    Filed: October 15, 1990
    Date of Patent: August 18, 1992
    Assignee: Alpine Electronics Inc.
    Inventors: Shoji Suzuki, Kenji Yatsu