Patents Represented by Attorney Fernandez & Associate LLP
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Patent number: 7104447Abstract: Parking meters detect presence of vehicles in monitored parking spaces and obtain images of license plates. A parking enforcement system communicates with the parking meters and manages use of parking spaces.Type: GrantFiled: December 15, 2003Date of Patent: September 12, 2006Inventors: Anthony Lopez, Manuel Quijano
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Patent number: 7098815Abstract: A compression method and apparatus identifying candidates for compression by selectively fingerprinting shingles or overlapping subsets of an input dataset and creating a set of characteristic input fingerprints based on fingerprint value. In some cases, the characteristic fingerprints are selected based on the relative value of the fingerprints with respect to other fingerprints in the same cluster. Potential matches may be identified and confirmed by comparing the characteristic input fingerprints with fingerprints associated with a history. Advantageously, some examples according to the current invention may be applied to input data such as: data, files, bit streams, byte streams, packet streams and previously encoded, compressed and/or encrypted data.Type: GrantFiled: March 25, 2005Date of Patent: August 29, 2006Assignee: Orbital Data CorporationInventors: Allen Samuels, Paul Sutter, Robert Plamondon
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Patent number: 7095936Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical devices such as the core of an optical waveguide or a light scatterer will damage the devices and prevent the passage of light through those sections of the devices. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: July 14, 2005Date of Patent: August 22, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7085443Abstract: High speed optical modulators can be made of a lateral PN diode formed in a silicon optical waveguide, disposed on a SOI or other silicon based substrate. A PN junction is formed at the boundary of the P and N doped regions. The depletion region at the PN junction overlaps with the center of a guided optical mode propagating through the waveguide. Electrically modulating a lateral PN diode causes a phase shift in an optical wave propagating through the waveguide. Each of the doped regions can have a stepped or gradient doping profile within it or several doped sections with different doping concentrations. Forming the doped regions of a PN diode modulator with stepped or gradient doping profiles can optimize the trade off between the series resistance of the PN diode and the optical loss in the center of the waveguide due to the presence of dopants.Type: GrantFiled: August 11, 2004Date of Patent: August 1, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Roger Koumans, Bing Li, Guo Liang Li, Thierry J. Pinguet
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Patent number: 7085408Abstract: Methods and systems for testing an image sensor system-on-chip (SOC). For testing an image sensor SOC that integrates a sensor array and an image processing component, defects are being searched separately in the sensor array and the image processing component in order to isolate possible defects of the sensor array from the possible defects of the image processing component. In so doing, the location of the defects can be pin-pointed.Type: GrantFiled: July 16, 2002Date of Patent: August 1, 2006Assignee: Magna Chip SemiconductorInventor: Li Chung-Chi Jim
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Patent number: 7082246Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical elements such as the core of an optical waveguide or a light scatterer will damage the elements and prevent the passage of light through those sections of the elements. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: July 15, 2005Date of Patent: July 25, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7082247Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical elements such as the core of an optical waveguide or a light scatterer will damage the elements and prevent the passage of light through those sections of the elements. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: August 29, 2005Date of Patent: July 25, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier, Jeremy Witzens, Zhen-Li Ji
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Patent number: 7082245Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical elements such as the core of an optical waveguide or a light scatterer will damage the elements and prevent the passage of light through those sections of the elements. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: July 15, 2005Date of Patent: July 25, 2006Assignee: Luxtern, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7079742Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical elements such as the core of an optical waveguide or a light scatterer will damage the elements and prevent the passage of light through those sections of the elements. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: July 15, 2005Date of Patent: July 18, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7076742Abstract: A treemap generation engine enables a user of a treemap generation application to design a treemap display page by providing inputs that define the format of the treemap display page, as well as inputs that define the data to be represented by the treemap display page. Based on the inputs, the treemap generation application generates treemap display data that can be processed by a browser application to draw a treemap display page on a computer.Type: GrantFiled: August 13, 2002Date of Patent: July 11, 2006Assignee: The Hive GroupInventors: Matthew Thorn, Donald Hoffman, Daniel Perkel
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Patent number: 7072998Abstract: Method and system for generating an optimized full signal in a FIFO device. In one embodiment of the present invention, the optimized full signal control circuit checks the storage capacity of the FIFO memory by aggregating the number of occupied word entries and the number of occupied pipelines.Type: GrantFiled: May 13, 2003Date of Patent: July 4, 2006Assignee: Via Technologies, Inc.Inventor: Hsilin Huang
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Patent number: 7072556Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical elements such as the core of an optical waveguide or a light scatterer will damage the elements and prevent the passage of light through those sections of the elements. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: August 29, 2005Date of Patent: July 4, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier, Bing Li
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Patent number: 7071981Abstract: A cost-effective image capture apparatus is presented which achieves high shutter speed without blurring the captured image or introducing noise. The apparatus uses standard 4T pixels to store exposure information on the pixel itself and employs a near simultaneous reset mechanism to reset the pixels, thereby achieving high-speed image capture without increasing the per pixel die area for extra storage or incurring unwanted current spikes and noise due to simultaneous resets.Type: GrantFiled: July 1, 2002Date of Patent: July 4, 2006Assignee: MagnaChip Semiconductor, Ltd.Inventor: Bor-Yuan Chester Hwang
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Patent number: 7068887Abstract: A polarization splitting grating coupler (PSGC) connects an optical signal from an optical element, such as a fiber, to an optoelectronic integrated circuit. The PSGC separates a received optical signal into two orthogonal polarizations and directs the two polarizations to separate waveguides on an integrated circuit. Each of the two separated polarizations can then be processed, as needed for a particular application, by the integrated circuit. A PSGC can also operate in the reverse direction, and couple two optical signals from an integrated circuit to two respective orthogonal polarizations of one optical output signal sent off chip to an optical fiber.Type: GrantFiled: October 26, 2005Date of Patent: June 27, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier, Jeremy Witzens
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Patent number: 7061380Abstract: A single integrated circuit provides communication, sensing and recording of one or more conditions critical to the entity to which it is attached. The chip is part of a larger module comprising a visual indicator, such as an LED, and a power source such as a battery. The sensor may be a temperature sensor whose output is stored in a non-volatile memory section of the chip on some periodic basis. A product identifier is stored on the chip; a method for product recall or location is described.Type: GrantFiled: November 5, 2003Date of Patent: June 13, 2006Assignee: Alta Analog, Inc.Inventors: Richard V. Orlando, Trevor A. Blyth
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Patent number: 7058273Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical elements such as the core of an optical waveguide or a light scatterer will damage the elements and prevent the passage of light through those sections of the elements. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: July 14, 2005Date of Patent: June 6, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7054534Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical elements such as the core of an optical waveguide or a light scatterer will damage the elements and prevent the passage of light through those sections of the elements. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: July 15, 2005Date of Patent: May 30, 2006Assignee: Luxtera, IncInventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7054533Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical elements such as the core of an optical waveguide or a light scatterer will damage the elements and prevent the passage of light through those sections of the elements. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: July 15, 2005Date of Patent: May 30, 2006Assignee: Luxtera, IncInventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7046895Abstract: Optoelectronic devices of the present invention include several embodiments of an electronically active optical waveguide made of a strip loaded waveguide with a lateral, self-aligned diode fabricated in a layer of silicon. A voltage applied across the diode changes the free carrier density in a portion of the active waveguide, which can change the refractive index in that portion of the waveguide. Changing the refractive index can cause a phase shift of an optical signal propagating down the waveguide and this effect can be used to control the optical signal. Changing the free carrier density can also change the amount of optical attenuation in a section of an active waveguide. Optoelectronic devices such as: modulators, attenuators, switches, beam diverters, tunable filters and other devices can be fabricated on a standard SOI substrate (silicon on insulator), which is typically used in the fabrication of CMOS integrated circuits.Type: GrantFiled: November 8, 2005Date of Patent: May 16, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Bing Li, Thierry J. Pinguet, David Press, Maxime Jean Rattier
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Patent number: 7046894Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical devices such as the core of an optical waveguide or a light scatterer will damage the devices and prevent the passage of light through those sections of the devices. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: July 14, 2005Date of Patent: May 16, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier