Patents Represented by Attorney Fernandez & Associate LLP
  • Patent number: 7309056
    Abstract: Integrated micro-valve is formed to control fluid flow and pressure. The valve converts supplied energy to mechanical energy through a means for energy conversion resident above a flexible wall or membrane. In one embodiment a sealed cavity contains a fluid that expands and contracts as it is heated or cooled, thus causing the flexible wall to move. Movement of this wall or membrane is used to move a valve element and dynamically control the opening or closing of a valve port over a predetermined range. Additional means for stiffening are added to the membrane to improve performance.
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: December 18, 2007
    Assignee: SMC Kabushiki Kaisha
    Inventors: James M. Harris, Michael Selser, Bradford A. Cozad, Albert K. Henning
  • Patent number: 7307411
    Abstract: A apparatus and method for creating a universally usable and configurable sensor platform which is used in conjunction with various sensor and sensing elements to sense and measure environmental conditions which incorporates inputs from multiple sensors 6-9 and 12-14. The apparatus incorporates an oscillator 3 which provides a signal whose frequency varies according to the inputs from sensors 6-9 and 12-14 in combination with a microprocessor 1. A cordic block 61 allows for supplemental calculations of trigonometric operations and functions. An output unit 2 converts the signals received from microprocessor 1 into a variety of serial protocols.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: December 11, 2007
    Assignee: Sensor Platforms, Inc.
    Inventors: George Hsu, Joseph F. Miller
  • Patent number: 7298939
    Abstract: This application describes, among others, wafer designs, testing systems and techniques for wafer-level optical testing by coupling probe light to/from the top of a wafer. A wafer level test system uses optical and electronic probes to search for and align with an optoelectronic alignment structure. The test system uses a located optoelectronic alignment structure as a reference point to locate other devices on the wafer. The system tests the operation of selected devices disposed on the wafer. The optoelectronic alignment loop is also used as an alignment reference of known performance for an adjacent device of unknown performance.
    Type: Grant
    Filed: March 16, 2005
    Date of Patent: November 20, 2007
    Assignee: Luxtera, Inc.
    Inventors: Roman Malendevich, Myles Sussman, Lawrence C. Gunn III
  • Patent number: 7276861
    Abstract: A system drives one or plurality of LEDs regulating their brightness by controlling LEDs average current or voltage. The system includes a switching power converter and an integrated digital regulator with at least one of electrical, thermal and optical feedbacks. The regulator is constructed as a hysteretic peak current mode controller for continuous mode of operation of the power converter. For discontinuous mode of operation of the power converter a pulse averaging sliding mode control is being used. Average LED current is measured by integrating LED pulse current at off time and hysteretically adjusting on time of the power switch. Input battery is protected from discharging at abnormally low impedance of the output.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: October 2, 2007
    Assignee: Exclara, Inc.
    Inventors: Anatoly Shteynberg, Harry Rodriguez
  • Patent number: 7273657
    Abstract: Atomic layer epitaxy (ALE) is applied to the fabrication of new forms of rare-earth oxides, rare-earth nitrides and rare-earth phosphides. Further, ternary compounds composed of binary (rare-earth oxides, rare-earth nitrides and rare-earth phosphides) mixed with silicon and or germanium to form compound semiconductors of the formula RE—(O, N, P)—(Si,Ge) are also disclosed, where RE=at least one selection from group of rare-earth metals, O=oxygen, N=nitrogen, P=phosphorus, Si=silicon and Ge=germanium. The presented ALE growth technique and material system can be applied to silicon electronics, opto-electronic, magneto-electronics and magneto-optics devices.
    Type: Grant
    Filed: December 28, 2004
    Date of Patent: September 25, 2007
    Assignee: Translucent Photonics, Inc.
    Inventor: Petar B. Atanackovic
  • Patent number: 7272402
    Abstract: Methods and systems for obtaining the location of a caller during an emergency or other telephone call. Before or during a call, a phone system can obtain from one or more sources a subscriber access line identity associated with a subscriber location record that includes a subscriber access line identity attribute and a subscriber location attribute. A phone system can send a query that includes the subscriber access line identity to a subscriber location query system that returns a subscriber location record or a subscriber location to the phone system. The phone system can then display the caller location information to a phone system, an agent or operator so that emergency services can be quickly and accurately dispatched. Using similar procedure and a memory, phone systems can also determine if a subscriber phone has or is changing location. Methods for testing the emergency call capabilities of a subscriber access line.
    Type: Grant
    Filed: July 14, 2005
    Date of Patent: September 18, 2007
    Assignee: TP Lab
    Inventors: Chi Fai Ho, Shin Cheung Simon Chiu
  • Patent number: 7272667
    Abstract: A portable CR-RW drive has a CD drive and spindle platform, a chargeable battery power source, at least one docking bay for docking a removable storage medium and a processor supporting firmware for enabling functions of the drive. In a preferred embodiment the drive is, in a portable fashion, used minimally to burn CDs from data stored on the removable storage medium using the battery as a power source and wherein no externally connected device is required to participate in the function of the drive.
    Type: Grant
    Filed: April 1, 2003
    Date of Patent: September 18, 2007
    Assignee: PNI Corporation
    Inventors: George Hsu, Tony Marinus de Rijk
  • Patent number: 7269326
    Abstract: The present I/O ports comprise (1) a layered structure comprising (a) an unpatterned superstrate having at least one layer, (b) an unpatterned substrate having at least one layer, and (c) at least one intermediate layer sandwiched between the unpatterned superstrate and the unpatterned substrate, (2) a coupling region that is within the at least one intermediate layer and that comprises an arrangement of at least one optical scattering element and (3) at least one output waveguide. The present I/O ports can be effectively used in balanced photonic circuits and unbalanced photonic circuits.
    Type: Grant
    Filed: April 7, 2004
    Date of Patent: September 11, 2007
    Assignee: Luxtera, Inc.
    Inventors: Paul J. Paddon, Michael K. Jackson, Jeff F. Young, Selena Lam
  • Patent number: 7266245
    Abstract: An image signal compression method and system. Without involving the current processing pixel, an encryption key and a decryption key are respectively and separately generated by a compression subsystem and a decompression subsystem. Both of the encryption and decryption keys are separately generated using the same principle of pixel prediction. Both of the encryption and decryption keys have the same value. In the compression subsystem, the encryption key is subtracted from the pixel value of the current processing pixel to generate a compressed data. In the decompression subsystem, the decryption key is added to the compressed data to recover the pixel value of the current processing pixel.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: September 4, 2007
    Assignee: MagnaChip Semiconductor Ltd.
    Inventor: Shang-Hung Lin
  • Patent number: 7262117
    Abstract: The present invention discloses an integration flow of germanium into a conventional CMOS process, with improvements in performing selective area growth, and implementing electrical contacts to the germanium, in a way that has minimal impact on the preexisting transistor devices. The present invention also provides methods to integrate the germanium without impacting the optical or electrical performance of these devices, except where intended, such as in a germanium photodetector, or germanium waveguide photodetector.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: August 28, 2007
    Assignee: Luxtera, Inc.
    Inventors: Lawrence C. Gunn, III, Giovanni Capellini, Gianlorenzo Masini
  • Patent number: 7262852
    Abstract: This application describes, among others, wafer designs, testing systems and techniques for wafer-level optical testing by coupling probe light from top of the wafer.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: August 28, 2007
    Assignee: Luxtera, Inc.
    Inventors: Lawrence C. Gunn, III, Roman Malendevich, Thierry J. Pinguet, Maxime Jean Rattier, Myles Sussman, Jeremy Witzens
  • Patent number: 7260289
    Abstract: Various configurations of elongate scattering elements in an optical waveguide grating coupler for coupling light between a planar waveguide and an optical element such as an optical fiber, where the light may have a Gaussian intensity distribution. The elongate scattering elements are preferably curved, and in some embodiments, the scattering elements have elliptically curved shape. One or more of the elongate scattering elements may be segmented into various geometrical shapes, such as rectangular, square, circular and elliptical. The elongate scattering elements have at least one characteristic selected from the group consisting of grating width, height, spacing, depth and index of refraction forming the elongate scattering elements, where the magnitude of the at least one characteristic varies irregularly with position along the guiding portion of the optical waveguide grating coupler.
    Type: Grant
    Filed: February 10, 2004
    Date of Patent: August 21, 2007
    Assignee: Luxtera, Inc.
    Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime J. Rattier
  • Patent number: 7260293
    Abstract: Various configurations of elongate scattering elements in an optical waveguide grating coupler for coupling light between a planar waveguide and an optical element such as an optical fiber, where the light may have a Gaussian intensity distribution. The elongate scattering elements are preferably curved, and in some embodiments, the scattering elements have elliptically curved shape. One or more of the elongate scattering elements may be segmented into various geometrical shapes, such as rectangular, square, circular and elliptical. The elongate scattering elements have at least one characteristic selected from the group consisting of grating width, height, spacing, depth and index of refraction forming the elongate scattering elements, where the magnitude of the at least one characteristic varies irregularly with position along the guiding portion of the optical waveguide grating coupler.
    Type: Grant
    Filed: December 6, 2005
    Date of Patent: August 21, 2007
    Assignee: Luxtera, Inc.
    Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
  • Patent number: 7259031
    Abstract: Photonic interconnect reconfigurably couples integrated circuits such as microprocessor, memory or other logic components. Detector, modulator, broad-band coupler and waveguide elements provide transmit and receive capability on CMOS substrate. Computer-implemented design software and reusable component library automate photonic and circuit design and simulation for manufacturability.
    Type: Grant
    Filed: November 8, 2005
    Date of Patent: August 21, 2007
    Assignee: Luxtera, Inc.
    Inventors: Alexander G. Dickinson, Lawrence C. Gunn, III, Philip M. Neches, Andrew Shane Huang
  • Patent number: 7251403
    Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical elements such as the core of an optical waveguide or a light scatterer will damage the elements and prevent the passage of light through those sections of the elements. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.
    Type: Grant
    Filed: July 15, 2005
    Date of Patent: July 31, 2007
    Assignee: Luxtera, Inc.
    Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
  • Patent number: 7251386
    Abstract: Photonic interconnect reconfigurably couples integrated circuits such as microprocessor, memory or other logic components. Detector, modulator, broad-band coupler and waveguide elements provide transmit and receive capability on CMOS substrate. Computer-implemented design software and reusable component library automate photonic and circuit design and simulation for manufacturability.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: July 31, 2007
    Assignee: Luxtera, Inc
    Inventors: Alexander G. Dickinson, Lawrence C. Gunn, III, Andrew Shane Huang, Philip M. Neches
  • Patent number: 7251408
    Abstract: High speed optical modulators can be made of a lateral PN diode formed in a silicon optical rib waveguide, disposed on a SOI or other silicon based substrate. A PN junction is formed at the boundary of the P and N doped regions. The depletion region at the PN junction overlaps with the center of a guided optical mode propagating through the waveguide. Electrically modulating a lateral PN diode causes a phase shift in an optical wave propagating through the waveguide. Each of the doped regions can have a stepped or gradient doping profile within it or several doped sections with different doping concentrations. Forming the doped regions of a PN diode modulator with stepped or gradient doping profiles can optimize the trade off between the series resistance of the PN diode and the optical loss in the center of the waveguide due to the presence of dopants.
    Type: Grant
    Filed: April 5, 2006
    Date of Patent: July 31, 2007
    Assignee: Luxtera, Inc.
    Inventors: Lawrence C. Gunn, III, Roger Koumans, Bing Li, Guo Liang Li, Thierry J. Pinguet
  • Patent number: 7233305
    Abstract: A programmable buffer integrated circuit which can be programmed to output a set of gamma correction reference voltages to be used in LCD displays. Once programmed, the buffers will continuously output the programmed value. The device incorporates a programming interface to allow the programming of the buffer outputs to the desired values during manufacturing and test of the panel. Multiple sets of values can be programmed to provide different gamma correction curves for different user or application requirements.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: June 19, 2007
    Assignee: Alta Analog, Inc.
    Inventors: Richard V. Orlando, Trevor A. Blyth
  • Patent number: 7229845
    Abstract: Automated defect sourcing system identifies root-causes of yield excursion due to contamination, process faults, equipment failure and/or handling in timely manner and provides accurate timely feedback to address and contain the sources of yield excursion. A signature bank stores known wafer surface manufacturing defects as defect signatures. The signature of a manufacturing defect pattern is associated with a type of equipment or process, and used to source the manufacturing defects and to provide process control for changing and/or stopping yield excursion during fabrication. A defect signature recognition engine matches wafer defects against the signature bank during wafer fabrication. Once the defect signature is detected during fabrication, handling and/or disposing the root-cause of the corresponding defect is facilitated using messages according to an event handling database. Optionally, a real-time process control for wafer fabrication is provided.
    Type: Grant
    Filed: January 26, 2004
    Date of Patent: June 12, 2007
    Assignee: Si Glaz
    Inventors: Victor V. Luu, John Poreda
  • Patent number: 7224174
    Abstract: This application describes, among others, wafer designs, testing systems and techniques for wafer-level optical testing by coupling probe light to/from the top of the wafer. A wafer level test system uses an optical probe to search for and align with an optical alignment loop. The test system uses a located alignment loop as a reference point to locate other devices on the wafer. The test system tests the operation of selected devices disposed on the wafer. The alignment loop is also used as a reference device for an adjacent device of unknown performance.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: May 29, 2007
    Assignee: Luxtera, Inc.
    Inventors: Roman Malendevich, Myles Sussman, Lawrence C. Gunn, III