Patents Represented by Attorney Fernandez & Associate LLP
  • Patent number: 7221387
    Abstract: Digital television system overlays subscriber two-way communication during broadcast program delivery to create virtual audience community. Individual or group billing and advertisement is personalized per DTV receiver program viewing and/or conferencing activity. Subscriber receiver includes camera and other media I/O device for multi-way video conferencing. Participants may be added or removed dynamically during programming or conferencing.
    Type: Grant
    Filed: May 22, 2003
    Date of Patent: May 22, 2007
    Inventors: Dennis S. Fernandez, Irene Y. Hu
  • Patent number: 7218812
    Abstract: Integrated optical waveguides and methods for the production thereof which have a patterned upper cladding with a defined opening to allow at least one side or at least one end of a light transmissive element to be air clad. The at least one side or at least one end is, for preference, a lens structure unitary with the waveguide, or a bend.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: May 15, 2007
    Assignee: RPO Pty Limited
    Inventors: Ian Andrew Maxwell, Dax Kukulj, Robert B. Charters
  • Patent number: 7218826
    Abstract: A standard CMOS process is used to fabricate optical, optoelectronic and electronic devices at the same time on a monolithic integrated circuit. FIG. 12 shows an active waveguide formed by a standard CMOS process on a five layer substrate. The waveguide is a silicon strip loaded waveguide with a three layer core made of a silicon strip on a silicon slab with a silicon dioxide layer between the strip and slab. The active waveguide has two doped regions in the silicon slab adjacent to and on either side of the waveguide. FIG. 12A is a table summarizing the elements of the waveguide of FIG. 12 and the CMOS transistors of FIGS. 1 and 2, which are formed from the same materials at the same time on the same silicon substrate. In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors.
    Type: Grant
    Filed: August 29, 2005
    Date of Patent: May 15, 2007
    Assignee: Luxtera, Inc.
    Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier, Bing Li
  • Patent number: 7212279
    Abstract: For use in verifying the identity of a user, an identity verifier comprising an optical fingerprint sensor coupled to an ID (identification) card reader. In one embodiment of the present invention, the optical fingerprint sensor includes a light source on a PCB assembly, a diffuser that receives light from the light source, a right angle prism that receives light from the diffuser, a collimating lens that receives light from the prism, a first mirror that receives light from the collimating lens, a second mirror that receives light from the first mirror, a third mirror that receives light from the second mirror, an imaging lens that receives light from the third mirror, and an image sensor on the same PCB assembly as the light source that receives light from the imaging lens.
    Type: Grant
    Filed: May 20, 2002
    Date of Patent: May 1, 2007
    Assignee: Magna Chip Semiconductor Ltd.
    Inventor: Chen Feng
  • Patent number: 7211821
    Abstract: A photonic device includes a silicon semiconductor based superlattice. The superlattice has a plurality of layers that form a plurality of repeating units. At least one of the layers in the repeating unit is an optically active layer with at least one species of rare earth ion.
    Type: Grant
    Filed: April 16, 2004
    Date of Patent: May 1, 2007
    Assignee: Translucent Photonics, Inc.
    Inventors: Petar B. Atanackovic, Larry R. Marshall
  • Patent number: 7199015
    Abstract: Atomic layer epitaxy (ALE) is applied to the fabrication of new forms of rare-earth oxides, rare-earth nitrides and rare-earth phosphides. Further, ternary compounds composed of binary (rare-earth oxides, rare-earth nitrides and rare-earth phosphides) mixed with silicon and or germanium to form compound semiconductors of the formula RE-(O, N, P)—(Si,Ge) are also disclosed, where RE=at least one selection from group of rare-earth metals, O=oxygen, N=nitrogen, P=phosphorus, Si=silicon and Ge=germanium. The presented ALE growth technique and material system can be applied to silicon electronics, opto-electronic, magneto-electronics and magneto-optics devices.
    Type: Grant
    Filed: December 28, 2004
    Date of Patent: April 3, 2007
    Assignee: Translucent Photonics, Inc.
    Inventor: Petar B. Atanackovic
  • Patent number: 7194166
    Abstract: A group of waveguide grating couplers is disposed on a semiconductor substrate. The grating couplers are all within a spot illuminated on the substrate by a light from an optical fiber. The light propagating in the fiber is wavelength division multiplexed (WDM) and consists of several channels. Within the group of grating couplers, at least one grating coupler is designed to be tuned to each of the channels. The group of grating couplers demultiplexes the channels propagating in the fiber. A group of waveguide grating couplers can also be used to multiplex several channels of light into an optical fiber. Single mode and multimode fiber can be used to carry the multiplexed channels of light in an optical multiplexing and demultiplexing system.
    Type: Grant
    Filed: August 26, 2005
    Date of Patent: March 20, 2007
    Assignee: Luxtera, Inc.
    Inventor: Lawrence C. Gunn, III
  • Patent number: 7188730
    Abstract: A screening system designed to provide separation of multiple fractions of New Screens Fines. News Screens Fines (“NSF”) contain a mix of compressed, unmarketable recyclables that are generally less than four inches in size created as a by-product of current Material Recovery Facility (MRF) plant designs used to process single-stream recyclables. The NSF separation system uses a series of primary and secondary classification apparatus to separate materials into marketable products that meet legislative requirements. A series of screens, conveyors and air moving systems are designed to separate waste from fractions of glass, plastic and ferrous metals that can be sold.
    Type: Grant
    Filed: September 24, 2003
    Date of Patent: March 13, 2007
    Inventors: Michael C. Centers, Stephen A. Young
  • Patent number: 7184626
    Abstract: This application describes, among others, wafer designs, testing systems and techniques for wafer-level optical testing by coupling probe light from top of the wafer.
    Type: Grant
    Filed: April 7, 2004
    Date of Patent: February 27, 2007
    Assignee: Luxtera, Inc
    Inventors: Lawrence C. Gunn, III, Roman Malendevich, Thierry J. Pinguet, Maxime J. Rattier, Myles Sussman, Jeremy Witzens
  • Patent number: 7184625
    Abstract: An optical wavelength grating coupler incorporating one or more distributed Bragg reflectors (DBR) or other reflective elements to enhance the coupling efficiency thereof. The grating coupler has a grating comprising a plurality of scattering elements adapted to scatter light along a portion of an optical path, and the one or more DBRs are positioned with respect to the grating such that light passing through the grating towards the substrate of the grating coupler is reflected back by DBRs toward the grating. The DBR comprises a multilayer stack of various materials and may be formed on the substrate of the grating coupler. The grating coupler may include a gas-filled cavity, where the cavity is formed by a conventional etching process and is used to reflect light toward the grating. The grating coupler may also incorporate an anti-reflection coating to reduce reflective loss on the surface of the grating.
    Type: Grant
    Filed: February 10, 2004
    Date of Patent: February 27, 2007
    Assignee: Luxtera, Inc
    Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime J. Rattier
  • Patent number: 7184627
    Abstract: An optical wavelength grating coupler incorporating one or more distributed Bragg reflectors (DBR) or other reflective elements to enhance the coupling efficiency thereof. The grating coupler has a grating comprising a plurality of scattering elements adapted to scatter light along a portion of an optical path, and the one or more DBRs are positioned with respect to the grating such that light passing through the grating towards the substrate of the grating coupler is reflected back by DBRs toward the grating. The DBR comprises a multilayer stack of various materials and may be formed on the substrate of the grating coupler. The grating coupler may include a gas-filled cavity, where the cavity is formed by a conventional etching process and is used to reflect light toward the grating. The grating coupler may also incorporate an anti-reflection coating to reduce reflective loss on the surface of the grating.
    Type: Grant
    Filed: November 16, 2005
    Date of Patent: February 27, 2007
    Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
  • Patent number: 7158841
    Abstract: A feedback control-loop system that employs an active DC output control circuit is disclosed which compares an input parameter measurement against a target specification associated with the input parameter measurement. In one embodiment, the active DC output control circuit receives an input signal for laser bias adjustment. In another embodiment, the active DC output control circuit receives a motor speed input from a source, such as a tachometer, for motor speed adjustment. In another embodiment, the active DC output control circuit receives an input power amplifier measurement for wireless applications.
    Type: Grant
    Filed: April 23, 2004
    Date of Patent: January 2, 2007
    Assignee: Summit Microelectronics, Inc.
    Inventors: Theodore M. Myers, Kenneth C. Adkins, John A. Tabler, Anurag Kaplish, Thomas J. O'Brien
  • Patent number: 7149097
    Abstract: A switch mode AC/DC converter with input current shaped for unity power factor. Input current is modulated by input voltage, and input inductor and isolation transformer are driven with the same duty ratio, with a low voltage across bulk capacitor. This voltage is determined only by input voltage amplitude. Energy stored in the leakage inductance of the transformer is returned back to the internal DC source. A soft switching circuit is connected to the primary side, eliminating the need for high side drive. Sources of the main and auxiliary switches and primary winding of the transformer are connected to ground for easy primary voltage sensing. Overvoltage protection circuit of the output is connected to exclusively primary side signals. Secondary synchronous rectifier is driven by a circuit synchronized with the system clock. The circuit can be coupled to either the primary or the secondary winding of the isolation transformer.
    Type: Grant
    Filed: August 17, 2005
    Date of Patent: December 12, 2006
    Assignee: SynDiTec, Inc.
    Inventors: Anatoly Shteynberg, Harry Rodriguez
  • Patent number: 7139455
    Abstract: Electronically controllable arrayed waveguide gratings (AWGs) with integrated phase error compensation for each individual arm of the array of waveguides. These AWGs and associated methods for static and dynamic phase compensation enable the fabrication of tunable AWGs which can track one or more drifting channels of an AWG.
    Type: Grant
    Filed: March 17, 2004
    Date of Patent: November 21, 2006
    Assignee: Luxtera
    Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime J. Rattier, Jeremy Witzens
  • Patent number: 7136563
    Abstract: A standard CMOS process is used to fabricate optical, optoelectronic and electronic devices at the same time on a monolithic integrated circuit. A polysilicon strip loaded waveguide is used as an example to illustrate the invention. The waveguide has a two layer core made of a polysilicon strip on a silicon slab. In a standard CMOS process, a layer of metallic salicide is deposited for metallic contacts for electronic components, such as transistors. In the present invention, prior to the deposition of the salicide, a salicide blocking layer is selectively deposited for protecting silicon waveguide against damages. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: November 14, 2006
    Assignee: Luxtera Inc.
    Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
  • Patent number: 7136544
    Abstract: High speed optical modulators can be made of a lateral PN diode formed in a strip loaded optical waveguide on a SOI or other silicon based substrate. A PN junction is formed at the boundary of the P and N doped regions. The depletion region at the PN junction overlaps with the center of a guided optical mode propagating through the waveguide. Electrically modulating a lateral PN diode causes a phase shift in an optical wave propagating through the waveguide. Due to differences in fabrication methods, forming strip loaded waveguides with consistent properties for use in PN diode optical modulators is much easier than fabricating similar rib waveguides.
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: November 14, 2006
    Assignee: Luxtera, Inc.
    Inventors: Lawrence C. Gunn, III, Roger Koumans, Bing Li, Guo Liang Li, Thierry J. Pinguet
  • Patent number: 7135699
    Abstract: Structure and method for growing crystalline superlattice rare earth oxides, rare earth nitrides and rare earth phosphides and ternary rare-earth compounds are disclosed. The structure includes a superlattice having a plurality of layers that forming a plurality of repeating units. At least one the layers in the repeating unit is an active layer with at least one species of rare earth ion.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: November 14, 2006
    Assignee: Translucent Photonics, Inc.
    Inventor: Petar B. Atanackovic
  • Patent number: 7116853
    Abstract: High speed optical modulators can be made of a reverse biased lateral PN diode formed in a silicon rib optical waveguide disposed on a SOI or other silicon based substrate. A PN junction is formed at the boundary of the P and N doped regions. The depletion region at the PN junction overlaps with the center of a guided optical mode propagating through the waveguide. Electrically modulating a reverse biased lateral PN diode causes a phase shift in an optical wave propagating through the waveguide. Prior art forward biased PN and PIN diode modulators have been relatively low speed devices.
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: October 3, 2006
    Assignee: Luxtera, Inc.
    Inventors: Lawrence C. Gunn, III, Roger Koumans, Bing Li, Guo Liang Li, Thierry J. Pinguet
  • Patent number: 7116881
    Abstract: A standard CMOS process is modified to fabricate optical, optoelectronic and electronic devices at the same time on a monolithic integrated circuit. A polysilicon strip loaded waveguide is used as an example to illustrate the invention. The waveguide has a three layer core made of a polysilicon strip on a silicon slab with a silicon dioxide layer between the strip and the slab. In a standard CMOS process, a layer of metallic salicide is deposited for metallic contacts for electronic components, such as transistors. In the present invention, prior to the deposition of the salicide, a salicide blocking layer is selectively deposited for protecting silicon waveguide against damages. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: October 3, 2006
    Assignee: Luxtera, Inc.
    Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
  • Patent number: 7113203
    Abstract: Method and system for a single-chip camera where an image sensor is a single-chip digital color imaging device that incorporates a sensor array that captures still or full-motion video and converts the images to digital data. Moreover, the image sensor employs a built-in correlated double sampler, an internal analog-to-digital converter, and a timing circuitry. Output from the sensor is an 8-bit or more raw data, horizontal sync signals, and vertical sync signals. The output raw data may then be fed into a compression circuit that generates packets of compressed output data. The compressed data is transmitted with a USB transceiver using isochronous packets. The packets are then received, decompressed, and color processed by a host PC.
    Type: Grant
    Filed: May 7, 2002
    Date of Patent: September 26, 2006
    Assignee: Magna Chip Semiconductor, Ltd.
    Inventors: Ben S. Wu, James Cape, Shang-Hung Lin