Abstract: Contacts are formed to integrated circuit devices by first forming a conductive layer (80) on a semiconductor device. An optional dielectric layer (130) is formed over the conductive layer and a carbon containing dielectric layer (140) is formed over the optional dielectric layer (130). Contacts are formed to the conductive layer (80) by etching openings in the carbon containing dielectric layer (140) and the optional dielectric layer (130).

Abstract: A system (25) for detecting defects in a semiconductor wafer (10), such defects including voids (V) present in metal conductors (2, 4) and plugs (7), is disclosed. An x-ray source (20) irradiates the wafer (10) through a first aperture array (24) having openings (26); a second aperture array (28) is located on the opposite side of the wafer (10) from the source (20), and has openings (30) that are aligned and registered with the openings (26) in the first aperture array (24). An array of x-ray detectors (31) is located adjacent to the second aperture array (28), with each detector (31) associated with one of the openings (30) of the second aperture array (28). The detectors (31) communicate signals regarding the magnitude of x-ray energy that is transmitted through wafer (10) at locations defined by the openings (26, 30) through aperture arrays (24, 28), to an analysis computer (34). A wafer translation system (32) indexes or otherwise moves the wafer (10) between the aperture arrays (24, 28).

Abstract: An MOS transistor in the surface of a semiconductor substrate (180) of a first conductivity type, which has a grid of isolations (171) in the surface, each grid unit surrounding a rectangular semiconductor island (102). Each island contains three parallel regions of the opposite conductivity type: the center region (104) is operable as the transistor drain and the two other regions (103 and 105), abutting the isolations, are operable as transistor sources. Transistor gates (106 and 107) are between the parallel regions, completing the formation of two transistors having one common drain. Electrical contacts (108) are placed on both source regions and the drain region. The source contacts are placed so that the spacing (120) between each contact and its respective isolation is at least twice as large as the spacing (121) between each contact and the gate.

Abstract: One aspect of the invention is an amplifier (10), comprising an input stage amplifier (20) coupled to an output node (81). The amplifier (10) further comprises a class D output stage (50), which comprises at least two switching elements (P1, N1) and coupled to the output node (81). The amplifier (10) also comprises a control circuit (40) coupled to the output stage (50). The control circuit (40) is operable to produce a tri-state output of the output stage (50) in response to a sensed value proportional to an amount of current that flows to the output node (81).

Abstract: A controller (15) for a display system (10) that uses a spatial light modulator (15) to display data formatted in bit-planes. The controller (15) receives at least some of the bit-plane data from a frame memory. It has local memory that buffers data transfer and stores data for bit-planes having multiple accesses, thereby increasing the bandwidth of data transfers from the frame memory (14) to the SLM (16).

Abstract: A method of predicting the effect of blob test in GSP sample testing is disclosed.

Abstract: In a microprocessor, a method for providing a sample-rate conversion (“SRC”) filter on an input stream of sampled data provided at a first rate, to produce an output stream of data at a second rate different from the first rate. The input stream of sampled data is operated on with a first low-order interpolation filter routine to produce a first stream of intermediate data. The first stream of intermediate data is operated on with a first simplified interpolation filter routine, having a substantially small number of operations to calculate the coefficients thereof, to produce a second stream of intermediate data. The second stream of intermediate data is operated on with a first decimating filter routine to produce the output stream of data.

Abstract: Semiconductor device fabrication methods are provided in which a carbon-containing region is formed in a wafer to inhibit diffusion of dopants during fabrication. Front-end thermal processing operations, such as oxidation and/or anneal processes, are performed at high temperatures for short durations in order to mitigate out-diffusion of carbon from the carbon-containing region, such that carbon remains to inhibit or mitigate dopant diffusion.

Abstract: An internal impedance of a battery (30) is automatically determined by operating a processor (13) to analyze current flowing through the battery to determine if a transient condition due to change of current is occurring and determining when the transient condition has ended. A voltage of the battery is measured while a steady current is being supplied by the battery. The present depth of discharge (DOD) of the battery is determined and a database is accessed to determine a corresponding value of open circuit voltage. The internal impedance is computed by dividing the difference between the measured voltage of the battery and the open circuit voltage at the present DOD by an average value of the steady current.

Abstract: A system and method enable boosting a bias applied to a load so as to facilitate reversing the direction of the bias applied relative to the load. The amount of boosting provided to facilitate reversing the bias polarity, depends on a substantially fixed boost voltage, which can be programmable. Thus, by setting the boost voltage to a predetermined voltage improved performance can be achieved, including, for example, improving the rise and/or fall times of bias current applied to an inductive load.

Abstract: A method to realize low-profile semiconductor devices by grinding a resin sealed block and realize level grinding by eliminating warpage of the resin sealed block. Semiconductor devices 10 are produced by step (B) in which multiple semiconductor chips 11 are mounted face down onto the surface of substrate 12, step (C) in which molding resin 13 is injected onto substrate 12 in order to form resin sealed block 18 in which multiple semiconductor chips 11 are sealed, step (E) in which resin sealed block 18 is cut halfway from the side of substrate 12, and step (F) in which resin sealed block 18 is ground from the side of molding resin 13 in order to separate it into individual semiconductor devices 10.

Abstract: A digital radio receiver system uses a dual mode automatic gain control architecture and method to enhance signal-to-noise ratio and linearity to accommodate reception and processing of both L-band RF signals and band-III RF signals. The system architecture employs an analog AGC to control high/low gain switches associated with front end low noise amplifiers and down converters, as well as a digital AGC to control gain controlled amplifier and programmable gain amplifier gain settings. The AGC control can be implemented totally within the system architecture or optionally can be implemented via an external data processing device such as a DSP or micro-controller.

Abstract: A circuit for detecting a serial signal comprises a first circuit (400) coupled to receive the serial signal (200) during a predetermined plurality of time periods of substantially equal duration. The first circuit is coupled to receive a first code (414). The first circuit is arranged to compare a part of the serial signal corresponding to each time period of the plurality of time periods to the first code, thereby producing a match signal. The first circuit accumulates the match signal from each of the each time period of the plurality of time periods.

Abstract: An improved circuit and method is provided that can increase the slew rate of an operational amplifier without adversely affecting its response time. An operational amplifier comprises a large signal detector, a bias circuit having a bias override component, and a bias decay circuit. As a result, the operational amplifier provides the ability to control the increase in current supplied to its compensation capacitors while also providing a smooth transition to the decay phase. In accordance with an exemplary embodiment of the present invention, an exponential decay to the increased bias condition is provided.

Abstract: A cost-effective filter consuming low power and occupying minimal space. The filter may be used in a ADSL modem (or CPE) to filter the signal components other than the ADSL signals. A high pass filter first filters the low frequency components to attenuate (or remove) lower frequency components such as that caused by ADSL transmit echo signals and that used for voice transmission. The high pass filter may be modified by adding a few resistors to limit the voltages of the high frequency signals also. The output of the high pass filter is amplified and passed through a low pass filter to filter the high frequency components (HPNA included). Due to earlier filtering operation of the high pass filter, the signal can be amplified substantially before being sent to the low pass filter. The implementation of the low pass filter is simplified due to the prior amplification.

Abstract: A process for forming nickel silicide and silicon nitride structure in a semiconductor integrated circuit device is described. Good adhesion between the nickel silicide and the silicon nitride is accomplished by passivating the nickel suicide surface with nitrogen. The passivation may be performed by treating the nickel silicide surface with plasma activated nitrogen species. An alternative passivation method is to cover the nickel silicide with a film of metal nitride and heat the substrate to about 500° C. Another alternative method is to sputter deposit silicon nitride on top of nickel silicide.

Abstract: The Floating Diffusion charge detection system has incorporated a signal feedback directly into the charge-detection node. The feedback is coupled to the node from the output of the standard buffer amplifier A1 through a feedback amplifier A3, switching transistors S2 and S3, and capacitors Cf and Ch. The feedback significantly reduces kTC noise, has good linearity, and improves DR.

Abstract: A method and system for indirectly measuring the tilt angle of micromirrors in a micromirror array. The method and system aims a coherent light beam through an aperture in a screen so that it reflects off of the surface of the micromirror array and creates a pattern of reflected light on the screen. The micromirror array is loaded with a pattern that has a uniform power spectral density (such as a random, aperiodic pattern or a frequency chirped sinusoidal spatial pattern) whereby certain micromirrors will be placed in the “on” position and the other micromirrors will be placed in the “off” position. By loading the micromirror array with a pattern having a uniform power spectral density distribution, the discrete nature of the resulting diffraction pattern is reduced and a pair of [sin(x)/x]2 patterns will be generated on the screen.

Abstract: The present invention can improve and/or modify data retention lifetimes for ferroelectric devices by baking them prior to or during packaging. A ferroelectric device is programmed to a particular state and then baked for a selected period of time at a selected temperature. This pre-baking or imprinting causes the device to be imprinted or have a preference for the particular state and reduces loss of signal margin over time, thereby at least partially preserving data retention capabilities.

Abstract: A wireless receiver (UST). The receiver comprises at least one antenna (ATU) for receiving a plurality of frames (FR) in a form of a plurality of paths. Each of the plurality of frames comprises a plurality of time slots (SLN), and each of the plurality of time slots comprises a plurality of symbols. Further, each of the plurality of paths has a corresponding sample position, wherein the plurality of symbols comprise a primary synchronization code symbol (PSC). The receiver further comprises circuitry (52) for correlating a primary synchronization code across a group of the plurality of symbols and circuitry (52) for identifying a plurality of path positions within the group. Each of the plurality of path positions corresponds to a respective one of a plurality of largest-amplitude paths represented within the group as detected in response to the circuitry for correlating. The receiver further comprises circuitry (56) for defining a plurality of sub-windows.