Abstract: To provide an integrated circuit with protection against overvoltage and overcurrent conditions, the channel of a field effect transistor is connected between the d.c. supply conductor for the integrated circuit and a further conductor for connection to one pole of a d.c. source for the circuit. The channel of the transistor is provided by a region of an epitaxial layer on a substrate of opposite conductivity type which provides a back gate for the transistor. A conductor is provided for connecting the substrate to the other pole of the d.c. source. The d.c. supply line voltage for the integrated circuit is thereby limited to the pinch-off voltage of the field effect transistor and the power supply current is limited to the zero gate-bias drain current of the field effect transistor. A protection arrangement also is disclosed for limiting forward current flow through an isolation diode in an integrated circuit resulting from accidental reverse polarity connection of a d.c. source to the circuit.

Abstract: A temperature compensated, phase tolerant sense amplifier for use in a magnetic bubble memory system in which current is applied to the detector resistors only during a bubble detect operation.

Abstract: TV low cost remote control system using a microprocessor decoder. Control data is transmitted in digitally encoded form and comprises blocks of eight bits of data separated by gaps in transmission of equivalent length. Each data block consists of a start bit followed by seven bits of data for channel identification. Data is presented to the microprocessor on one input line which it samples regularly as a part of its main keyboard scan routine and in response to a start bit checks the data bits and gaps to determine presence of a valid command. The remote control information is decoded directly by the microprocessor. Using seven identification bits, a channel capacity of 128 channels is possible.

Abstract: A microelectronic integrated circuit having first and second levels of thin-film metallization separated by an insulation layer is provided with a system for electrical interconnections between metallization levels, at selected locations, without requiring extra spacing between metal paths, in either the first or second levels. Maximum circuit density is thereby permitted, with no restriction on the placement of interconnection vias. Circuit layout is greatly simplified because all metal paths have uniform widths and minimum spacings, achieved with the use of vias that are "oversized" in both the transverse and longitudinal directions. Consequently, it is required that second level metal differ in composition from first level metal, and be patterned with an etchant that does not attack first level metal.

Abstract: System for direct access to a memory associated with a microprocessor data processing device comprising a direct access interface for introducing or extracting data in the memory during interruptions of the connection between the processing device and the memory, and a buffer interface operable during a portion of the access time of the processing device to the memory, to supply data addresses contained in the memory originating from the processing device and to enable circulation of corresponding data between the processing device and the memory, and during the remainder of the access time of the processing device, to the end of the access time, to store data transferred from the memory and to prevent transmission of data to the memory. A logic circuit controls inhibition of the buffer interface or of the direct access interface and, during the periods of inhibition of the buffer interface, permits the circulation of data and of addresses between the direct access interface and the memory.

Abstract: A monolithic charge-coupled infrared imaging device (CCIRID) is fabricated on N-type HgCdTe. A native oxide layer on the semiconductor is used, in combination with ZnS to provide first level insulation. An opaque field plate over first level insulation is provided for signal channel definition. Second level insulation (ZnS) is substantially thicker than the first level, and is provided with a stepped or sloped geometry under the first level gates. Input and output diodes are provided with MIS guard rings to increase breakdown voltages.

Abstract: A uniphase, buried-channel, semiconductor charge transfer device wherein a portion of each cell includes an inversion layer, or "virtual electrode" at the semiconductor surface, shielding that region from any gate-induced change in potential. Each cell is comprised of four regions (I, II, III, IV) wherein the characteristic impurity profile of each region determines the maximum potential generated therein for the gate "on" and gate "off" conditions. Clocking the gate causes the potential maxima in regions I and II to cycle above and below the fixed potential maxima in regions III and IV beneath the virtual electrode. Directionality of charge transfer is thereby achieved, since the potential maximum for region II (.phi..sub.max II) remains greater than for region I (.phi..sub.max I) and .phi..sub.max IV>.phi..sub.max III, for both gate conditions.

Abstract: A rotary pickup arm transfers objects from a fixed pickup station to a fixed deposition station during a first part of a work cycle and is returned to the pickup station during a second part of the work cycle. The pickup arm is carried by a head having a support mounted on an X-Y table movable relative to the pickup and deposition station by step motors along X and Y axes perpendicular to the axis of rotation of the pickup arm. The X-Y table can be adjustably displaced by predetermined amounts along the X and/or Y axes during the first part of the working cycle to place an object accurately at a desired location at the deposition station and displaced by an equal and opposite amount during the second part of the working cycle to pick up a further object from the pickup station.

Abstract: A vertical magazine well accommodates a plurality of magazines lying on each other so that they can move downwardly under the action of gravity. Each magazine accommodates a plurality of strip-like workpieces at predetermined intervals above each other and which at a withdrawal or loading station level can be withdrawn from or inserted into the magazine by displacement in a longitudinal direction. Accommodated in the magazine well is a pair of cylindrical drums having vertical axes about which they are rotated in synchronism with each other by a step-drive mechanism. The surface of each drum has a helical array of pins projecting radially therefrom and which can be projected in turn into the vertical path of movement of a magazine in the magazine well. Initially, a magazine is supported by the uppermost pins of the helical arrays of the two drums and in this position the lowermost strip-like member in the magazine can be withdrawn from (or loaded into) the magazine at the loading station.

Abstract: A balanced, closed cycle silicon refinery system has been developed for producing electronic grade silicon from industrial grade silicon. Impurities comprising approximately 1% of the industrial grade silicon are removed in the refinery system to produce the purified silicon, while only a relatively small percentage of make-up chemicals are added to the system. In the refinery, hydrogen chloride is reacted with the impure silicon in a halide reactor to provide trichlorosilane and silicon tetrachloride and hydrogen. The trichlorosilane and/or silicon tetrachloride are passed through purification means, and then reacted with the hydrogen from the halide reactor in a fluidized bed reactor to produce the purified silicon and an effluent comprised of unreacted trichlorosilane, silicon tetrachloride, hydrogen, and the by-product hydrogen chloride.

Abstract: In the production of elemental silicon by chemical vapor deposition on a particulate seed bed, the continuous generation of seed particles for use or recycle is achieved by the maintenance of a separate, subsidiary reaction zone at a temperature which favors breakage of product particles; while a higher temperature, favorable for deposition, is maintained in the principal reaction zone. The separate reaction zones may be established in separate reactors, or in a single reactor.

Abstract: Method of preparing silicon nitride film by glow discharge from the decomposition of liquid trisilylamine, (SiH.sub.3).sub.3 N, which is a volatile monomer. In this connection, the use of a single monomer as diluted with an inert gas enables greater uniformity to be achieved in the deposition of silicon nitride films. Further, the presence of Si-N bonds in the monomer enables more control and better stoichiometry in the deposited films.

Abstract: Elevated metal contact bumps are provided on a microelectronic semiconductor circuit, with the use of aluminum-palladium metallization as a base for selective electroless plating. The aluminum and palladium are preferably deposited sequentially in a single operation, i.e., without exposing the aluminum surface to the atmosphere. The aluminum-palladium film is then patterned in a single step, using an etchant which attacks both metals at substantially the same rate. The metal pattern is then covered with an insulation layer wherein apertures are opened to expose palladium at selected sites for immersion in an electroless plating bath of ionic Cu or Ni for bump formation.

Abstract: An input buffer gate for integrated injection logic (I.sup.2 L) circuits, including a multiple-collector transistor wherein a first collector is electrically common with the base thereof, a second (Schottky) collector is connected to receive an input signal, and a third collector which drives internal I.sup.2 L gates. The buffer has a high input breakdown voltage, virtually no input capacitance, power-up/power-down capability at logic "1" and virtually no input current at logic "0", very low storage time, and an input "1" threshold of about 0.5 volts.

Abstract: A system for supplying arsine having automatic arsine monitoring and controls to a semiconductor reactor is described wherein arsine is electrochemically generated from an electrolyte solution such as an inorganic acid and an arsenite salt. The electrolytic cell vessel also comprises the cathode structure. A circular concentric barrier is provided to isolate the oxygen produced at the cathode in an annular region from the arsine generated at the anode located centrally within the cell.

Abstract: An integrated, monolithic array of solar cells wherein isolation between cells permits series interconnection of the cells to provide an output voltage for the array equal to the sum of the voltages of the unit cells. Although normal PN junction isolation is ineffective when exposed to light, the present structure includes a form of junction isolation that is effective when exposed to light, or to other radiation. For example, a band of heavily doped P-type silicon, formed by thermomigration of aluminum through an N-type wafer, provides such isolation.

Abstract: A metal-dielectric electron beam scanning stack and method for making the same is disclosed. The electron beam scanning stack subassembly is fabricated from a series of metal plates, each having a plurality of apertures defined therein at least one plate comprising a spacer plate. Individual apertures are aligned with corresponding apertures of all other plates to form a plurality of electron beam channels. These plates are electrically isolated from and bonded together by spacer plates coated with dielectric material. By etching isolation channels in a selected pattern in these plates, control plates are fabricated having a plurality of isolated conductive portions arranged in selected patterns. Subassemblies are bonded together using either dielectric material or dielectrically coated metal spacer plates having a plurality of correspondingly aligned apertures. Contact leads from the plurality of isolated conductive portions are isolation etched into the inactive peripheral area of the plate.

Abstract: The disclosure relates to formation of polycrystalline silicon by the fluid bed process wherein seed crystals of silicon are entered into the reactor from the bottom thereof and by means of a pressurized feed, the product being removed from the reactor through a tube entering the reactor at its bottommost portion. The removed product passes through a closed line by gravity into a closed vessel, the vessel being movable to a crystal puller apparatus without handling or exposure. The closed line is also tapped, as desired, to remove product on-line for test during operation so that the system can be immediately shut down when improper product is detected without excessive loss of pure polycrystalline silicon. The polycrystalline silicon is fed from the transfer vessel to a melt from which crystals are to be pulled via an intermediate reservoir. The silicon is transferred from the vessel to the reservoir under pressure to prevent contamination thereof.

Abstract: In a microelectronic, metal-oxide-semiconductor dynamic random access memory cell having an MOS capacitance signal storage region, leakage current has been found to have a critical dependence upon the voltage level at which the storage gate is operated (V.sub.STORE). The leakage rate undergoes a sharp transition to a low state below a certain critical V.sub.STORE. This transition is due to the shutting off of the leakage from the periphery and field region around the cell. Consequently, maximum refresh time is achieved by modifying the cell to permit operation of the storage gate below the critical voltage, which may be at or near ground level. For an n-channel cell, permanently shifting the flatband voltage at the silicon-oxide interface of the storage capacitor in the negative direction can generate a potential well for charge storage with a very small V.sub.STORE.

Abstract: Light emitting diodes in a substantially semispherical form having an outer shell-like region of semiconductor material of one conductivity type and a subsurface body of semiconductor material of an opposite conductivity type forming a p-n junction are mounted to a surface of an insulating substrate member extending therefrom to allow a portion of each diode element to protrude past the outer surface of the substrate. Metallic coatings are provided on both the outer shell-like semiconductor material having one conductivity and a second metallic coating is provided on the subsurface body semiconductor material having a second conductivity for electrical contact. A transparent conductive material is further disposed over the diode structure connecting diodes formed in an array.