Patents Represented by Attorney Gary C. Honeycutt
  • Patent number: 4152286
    Abstract: A boron doped, silicon oxide-forming film is produced on a semiconductor wafer by coating the wafer with a solution of a silicon compound and a boron compound, in a blend of two polar organic solvents, one of which has a low boiling point, and the other has a high boiling point, between 185.degree. and 300.degree. C. During a subsequent heating step, the high boiling point solvent redissolves any crystalline precipitate that forms during spin-on, giving a more uniform film for diffusion, and consequently a damage-free wafer surface.
    Type: Grant
    Filed: September 13, 1977
    Date of Patent: May 1, 1979
    Assignee: Texas Instruments Incorporated
    Inventors: Carol A. Crosson, Terry L. Brewer, Robert F. Aycock
  • Patent number: 4140814
    Abstract: A transparent conductive layer of SnO.sub.2 is deposited on a substrate by an RF-plasma assisted chemical vapor reaction of CO.sub.2 with an organic tin compound, such as tetramethyl tin, for example. A CCD optical imager is fabricated, using the method of the invention to form a transparent conductive layer thereon.
    Type: Grant
    Filed: December 1, 1977
    Date of Patent: February 20, 1979
    Assignee: Texas Instruments Incorporated
    Inventor: Jaroslav Hynecek
  • Patent number: 4140570
    Abstract: This disclosure relates to a technique of improving the quality of crystals grown by the Czochralski method by substantially eliminating the formation of electrically active oxygen complexes during growth. The oxygen which forms these complexes is liberated from the quartz liner which contains the silicon melt. It has been found that electrically active oxygen complexes (oxygen donors) are formed in the silicon lattice during crystal growth when the crystal is in the range of 300-500.degree. C. Above and below this temperature range, the formation of oxygen donors in the silicon lattice is minimal. The crystal is therefore maintained in its entirety above the temperature of 500.degree. C. and then is quenched to be quickly brought below the 300.degree. C. level. In this way, the silicon crystal is in the 300.degree. C. to 500.degree. C. range for a minimal period of time, thereby minimizing the amount of oxygen donor formation in the silicon lattice during growth.
    Type: Grant
    Filed: November 19, 1973
    Date of Patent: February 20, 1979
    Assignee: Texas Instruments Incorporated
    Inventors: Frederic W. Voltmer, Thomas G. Digges, Jr.
  • Patent number: 4137109
    Abstract: An integrated injection logic circuit, wherein the inverted, multi-collector transistor of each cell includes active base regions separated by dielectric isolation, and wherein a heavily-doped channel-stop layer is selectively located along the sidewalls of the isolation, to prevent collector-to-emitter surface inversion leakage. The isolated geometry substantially reduces parasitic capacitance between the substrate and the extrinsic base, thereby increasing the switching speed of the device.
    Type: Grant
    Filed: February 3, 1977
    Date of Patent: January 30, 1979
    Assignee: Texas Instruments Incorporated
    Inventors: James G. Aiken, Benjamin J. Sloan, Jr.
  • Patent number: 4137521
    Abstract: A system is provided for automatically actuating an alarm whenever a would-be thief attempts to remove the antenna from a vehicle equipped with a C.B. radio or other communication system. The preferred embodiment includes a hidden switch which remains depressed by the antenna until it is partially unscrewed, at which time the switch closes the alarm circuit. For example, the horn of the vehicle may be connected to the switch and serve as the alarm.
    Type: Grant
    Filed: February 9, 1977
    Date of Patent: January 30, 1979
    Inventor: Roberto Martinez
  • Patent number: 4133698
    Abstract: A solar cell having first and second closely spaced, parallel P-N junctions is fabricated, wherein the illuminated surface is totally free of metallization, i.e., the junction nearest the illuminated surface is not electrically connected, and thereby participates only indirectly in the collection of photo-generated carriers by providing a charge field to suppress the front surface recombination and to enhance collection at the back side junction. All metallization is on the back side, which preferably includes an interposed finger pattern of N+ and P+ zones.
    Type: Grant
    Filed: December 27, 1977
    Date of Patent: January 9, 1979
    Assignee: Texas Instruments Incorporated
    Inventors: Shang-Yi Chiang, Bernard G. Carbajal
  • Patent number: 4133907
    Abstract: Disclosed is a method of forming patterned electron beam resists from polymers that undergo energy intensity or electron dosage dependent reactions. Upon the introduction of sufficient energy, the polymer generates two reactive species that react with each other. However, with a lower amount of energy, the polymer generates only one reactive species. A thin film of the dosage dependent polymer is applied to a support and is subjected to a programmed electron beam scan. The electron beam irradiates a portion of the polymer film according to the programmed pattern and furnishes enough energy in the path of the beam to cause the polymer to cross link where directly irradiated, thus causing the polymer to become insoluble in certain solvents. The portion of the polymer adjacent the directly irradiated portion is subjected to electrons back-scattering from the surface of the support, which electrons are a small percentage of the total beamed at the polymer.
    Type: Grant
    Filed: November 21, 1977
    Date of Patent: January 9, 1979
    Assignee: Texas Instruments Incorporated
    Inventor: Terry L. Brewer
  • Patent number: 4131983
    Abstract: A dual injector, floating-gate MOS non-volatile semiconductor memory device (DIFMOS) has been fabricated, wherein the electron injection means comprises a p+n+ junction, the n+ region thereof having a critical dopant concentration, controlled by ion implantation. The junction is avalanched to "write" a charge on the floating gate, and a hole injector junction (n+/p-) is avalanched to "erase" the charge. An MOS sensing transistor, whose gate is an extension of the floating gate, "reads" the presence or absence of charge on the floating gate. In a preferred embodiment, the hole injection means includes an MOS "bootstrap" capacitor for coupling a voltage bias to the floating gate.
    Type: Grant
    Filed: January 10, 1977
    Date of Patent: January 2, 1979
    Assignee: Texas Instruments Incorporated
    Inventor: Walter T. Matzen
  • Patent number: 4122902
    Abstract: A motorized, hand-held garden cultivating tool having a novel assembly of parts for converting a first reciprocating motion to a second reciprocating motion at a substantial angle to the first. The conversion assembly includes a spring-connected linkage member and is free of bearings or any friction contact that would require protection from soil or grit.
    Type: Grant
    Filed: October 11, 1977
    Date of Patent: October 31, 1978
    Inventor: Warren A. Alexander
  • Patent number: 4120744
    Abstract: A plurality of silicon elements are arranged in a printing array with the major faces co-planar and the edges interconnected into a monolithic structure by a grid of polycrystalline silicon and silicon dioxide. The silicon dioxide provides an electrical and thermal barrier, and the polycrystalline silicon provides a strong mechanical interconection. In the preferred embodiment, the silicon elements are monocrystalline and contain one or more electrical components for selectively heating the elements.The method for fabricating the device includes the steps of etching V-shaped grooves in one surface of a silicon slice and then successively growing silicon dioxide and polycrystalline silicon on the etched surface to form a thick slice. The other side of the slice is then lapped away to at least the depth of the silicon dioxide in the grooves and semiconductor elements and conductors formed in and/or on the lapped side.
    Type: Grant
    Filed: July 26, 1973
    Date of Patent: October 17, 1978
    Assignee: Texas Instruments Incorporated
    Inventors: Thomas R. Payne, Harry K. James, Millard M. Judy
  • Patent number: 4117094
    Abstract: An improved method is provided for converting metallurgical grade silicon to semiconductor grade silicon, by first reacting the impure silicon with silicon tetrahalide to form a mixture of halosilanes, separating and purifying the trihalosilane, and then depositing semiconductor grade silicon by reacting the trihalosilane. The tetrahalide produced as a by-product of the deposition step is recycled to react with additional impure silicon. Improved trihalosilane yields from reacting silicon with the tetrahalide are achieved by adding hydrogen as a reactant, and by immediate quenching of the effluent with HCl. Such improved yields permit the complete system to be internally balanced so that the net production of by-products can be reduced to zero.
    Type: Grant
    Filed: June 13, 1977
    Date of Patent: September 26, 1978
    Assignee: Texas Instruments Incorporated
    Inventors: John M. Blocher, Jr., Melvin F. Browning
  • Patent number: 4104697
    Abstract: An axial-lead fixed-value capacitor comprising a metal-nitride-oxide-silicon chip in a standard diode package has been fabricated, having capacitance values in the 10 to 1000 pico-farad range. The device features a beveled-edge configuration which contributes to a low leakage current and also facilitates the sealing of the semiconductor chip in a double plug axial-lead package. The double layer dielectric medium comprises a thermally grown silicon oxide film typically 450 angstroms thick, for example, and a plasma deposited layer of silicon nitride typically 350 angstroms thick, for example.
    Type: Grant
    Filed: January 14, 1977
    Date of Patent: August 1, 1978
    Assignee: Texas Instruments Incorporated
    Inventors: Don L. Kendall, Byron T. Ahlburn, Klaus C. Wiemer
  • Patent number: 4104732
    Abstract: A static RAM cell, including two vertical, multiple-Schottky-collector switching transistors wherein a first collector of each is coupled to first and second sources of read/write data, respectively, and wherein a second collector of each transistor is cross-coupled with the base of the other transistor. The cell is implemented with I.sup.2 L technology, and also includes a complementary inverted multiple-collector NPN load transistor having its base electrically common with the emitters of the switching transistors, a first collector merged with the base of one switching transistor, and a second collector merged with the base of the other switching transistor.
    Type: Grant
    Filed: August 2, 1977
    Date of Patent: August 1, 1978
    Assignee: Texas Instruments Incorporated
    Inventor: Frank Wilson Hewlett, Jr.
  • Patent number: 4101350
    Abstract: In the fabrication of semiconductor devices, a method is provided which includes the steps of selectively doping a semiconductor substrate of one conductivity type to form therein discrete regions of opposite conductivity type, followed by selective epitaxial growth to fill the windows of the diffusion mask, whereby the epitaxially grown regions are inherently characterized by exact alignment with the doped regions. The self-aligned epitaxial structure is then subjected to further processing in accordance with numerous alternate schemes to provide a wide variety of devices.
    Type: Grant
    Filed: October 26, 1976
    Date of Patent: July 18, 1978
    Assignee: Texas Instruments Incorporated
    Inventors: Glen G. Possley, Robert G. Massey, Billy B. Williams
  • Patent number: 4101351
    Abstract: Silicon solar cells may be made from either "P" type substrates with "N" type dopants to form the geometries or with "N" type substrates and "P" type dopants forming the junction. This invention relates to the dopant species employed, the improved method of application and junction formation, formation of insitu anti-reflective coatings, and improved metallization processing for silicon solar cells. The invention does not affect preparation of the silicon substrate prior to diffusion steps, and is applicable both to planar solar cells and to vertical-multijunction cells. This invention discloses an alternate process of junction formation using arsenic as dopant. The process is uniquely different in the fact that it simplifies the number of process steps by using the doped oxide for junction formation, metallization mask and as an anti-reflection surface layer.
    Type: Grant
    Filed: November 15, 1976
    Date of Patent: July 18, 1978
    Assignee: Texas Instruments Incorporated
    Inventors: Pradeep L. Shah, Clyde R. Fuller
  • Patent number: 4092446
    Abstract: A balanced closed cycle silicon refinery has been developed for producing electronic silicon from industrial grade silicon. Impurities comprising approximately 1% of the industrial grade silicon are removed during the refinery process to produce the purified silicon, while only a relatively small percentage of make-up chemicals are added to the system. In the refinery, hydrogen chloride is reacted with the impure silicon in a halide reactor to provide trichlorosilane and silicon tetrachloride and hydrogen. The trichlorosilane and/or silicon tetrachloride are purified to remove the impurities, and then reacted with the hydrogen from the halide reactor in a fluidized bed reactor to produce the purified silicon and an effluent comprised of unreacted trichlorosilane, silicon tetrachloride, hydrogen, and the by-product hydrogen chloride.
    Type: Grant
    Filed: July 31, 1974
    Date of Patent: May 30, 1978
    Assignee: Texas Instruments Incorporated
    Inventors: Francois A. Padovani, Michael Brant Miller, James A. Moore, James H. Fowler, Malcolm Neville June, James D. Matthews, T. R. Morton, Norbert A. Stotko, Lewis B. Palmer
  • Patent number: 4081928
    Abstract: A carrier block and plug assembly for use in polishing semiconductor slices and includes a block of stainless steel onto which is secured a Delrin retainer with Delrin plugs seated on the block and within the retainer. A Mylar spacer of variable predetermined thickness is positioned between the block and retainer and around the plugs. The bottom side of the block as well as the top sides of the plug and retainer are machined to be parallel to each other. The thickness of the spacer determines the amount of the slice protruding above the retainer, thickness being based upon the thickness of the slice being polished.The slice is placed over a plug after water or other appropriate liquid has been placed on the plug or slice to provide adhesion of the slice to the plug by surface tension, whereby the slice can freely rotate on the plug and within the retainer during polishing.
    Type: Grant
    Filed: August 17, 1976
    Date of Patent: April 4, 1978
    Assignee: Texas Instruments Incorporated
    Inventors: Gerald P. Kinnebrew, Bobby Mack Watkins
  • Patent number: 4078869
    Abstract: A portable, hand-held drill, or an attachment therefor, comprising an assembly of parts for generating focused beams of light to be directed alongside the drill bit, whereby the positions of the light spots projected on the work surface serve as indicia of the angle between the drill bit and the work surface. In a preferred embodiment, the light beams are generated 90.degree. apart along the circumference of a circle concentric with the bit, and normal thereto, such that perpendicularity of the bit is indicated by positioning the light spots at equal distances from the bit. It is also preferred to include means for adjusting the beam angle, such that the projections on the work surface can be located at the same distance from the tip of a short drill bit as from the tip of a long bit.
    Type: Grant
    Filed: January 17, 1977
    Date of Patent: March 14, 1978
    Inventor: Damon P. Honeycutt
  • Patent number: 4077817
    Abstract: A semiconductor laser structure has side facets perpendicular to its substrate and a flat top. The central cavity is an elongated rectangular cavity. A substrate having (100) orientation has a mask patterned thereon with a window having an elongated central member and at least two cross members perpendicular to the axis of the elongated central member. The semiconductor material is grown thereon by liquid phase epitaxy.
    Type: Grant
    Filed: April 4, 1977
    Date of Patent: March 7, 1978
    Assignee: Texas Instruments Incorporated
    Inventor: David W. Bellavance
  • Patent number: 4075039
    Abstract: An integrated injection logic circuit having improved operating characteristics is provided, comprising an inverted, multiple-collector transistor having base regions characterized by a central active portion surrounded by a heavily-doped extrinsic base region to which the base contact is made. Using ion implantation, each active portion of the base region is provided with a dopant concentration which increases with distance from the collector junction, thereby increasing transistor speed and gain. The extrinsic portion of the base reduces series resistance for multicollector transistors, provides heavy doping at the surface for good ohmic base contacts; and most importantly, defines the active emitter-base regions. The effective or "active" collector-to-emitter area ratio of the device is improved by more than 50:1 compared with prior devices.
    Type: Grant
    Filed: August 30, 1976
    Date of Patent: February 21, 1978
    Assignee: Texas Instruments Incorporated
    Inventor: Benjamin Johnston Sloan, Jr.