Abstract: An article gripper assembly comprising a support member, a movable base member movable back and forth in a predetermined direction with respect to the support member, a pair of finger members movable toward and away from each other with respect to the base member in opposite directions parallel with the predetermined direction, a rotatable member rotatable about an axis fixed with respect to the base member and substantially perpendicular to the predetermined direction, link members coupling the rotatable member operatively to the finger members for converting rotation of the rotatable member in one direction about the axis of rotation of the rotatable member into movement of the finger members toward each other with respect to the base member and rotation of the rotatable member in the opposite direction about the axis of rotation of the rotatable member into movement of the finger members away from each other with respect to the base member, a pair of centering members fixedly positioned with respect to the

Abstract: A cordless telephone is described comprising a fixed part which includes a reception section for receiving exact reception channel frequencies lying in a predetermined frequency range at equal intervals apart and a transmission section for transmitting exact transmission channel frequencies lying at a predetermined duplex interval from the reception channel frequencies. The cordless telephone further comprises a mobile part which includes a reception section for receiving frequencies lying in the range of the transmission channel frequencies of the fixed part and a transmission part for transmitting frequencies lying in the range of the reception channel frequencies of the fixed part. The mobile part includes a frequency control loop which using the transmission channel frequency transmitted by the fixed part as reference frequency holds its reception section fixedly tuned to the received transmission channel frequency.

Abstract: A wafer process flow encompasses an arbitray repeated layered structure of heteroepitaxial layers of silicon based films with process control throughout the strata of chemical potential and recombination velocity, suitable for both high performance MOS and bipolar transistors with three dimensional transistor capability. A non-compensated doping technique preserves crystalline periodicity, as does the component delineation by means of anisotropic etching. The wafer is hermetic by means of the semi-insulation films polyimide, and the elimination of phosphorous doped silicon dioxide. A metallurgy system enables a high level integration.

Abstract: A passivated dual dielectric gate system compatible with low temperature processing utilizes a dual dielectric system with a silicon dioxide dielectric film or layer at the monocrystalline substrate surface, or termination. The dual dielectric system includes a dielectric film at the substrate surface of thicknesses of from 200 to 1000 .ANG.(or greater ). Respective layers of undoped amorphous silicon and titanium nitride overlie the top of the silicon dioxide and an aluminum gate metal layer overlies the titanium nitride layer. The structure can be patterned by selectively patterning photoresist and a dry or dry/wet etch processses. The structure is patterned and etched as desired.

Abstract: A process, and product made thereby, for bonding two wafers together to form a single wafer with a continuous interface, and for selectively burying a low impedance conductor in the wafer, by providing host and guest wafers having substantially the same crystal orientation and periodicity. A crystalline boundary n-semimetal is formed on the wafers, which are then brought into intimate contact. If desired, a unipolar conductor is fused to one of said wafers. Then, the wafers are exposed to an elevated temperature, or rapid thermal anneal, in an inert ambient, breaking up any native oxides and diffusing any excess oxygen into the wafer lattices. The guest wafer is then mechanically lapped back and chemically etched.A vertical cascode integrated half H-bridge motor driving circuit made in the guest and host wafers has a source transistor in the host wafer with with the wafer substrate forming the collector of the transistor, an isotype acceptor doped Ge.sub.x Si.sub.

Abstract: A negative resist composition including a polymeric matrix material, a polymerizable monomer, and an onium salt radiation sensitive initiator. The monomer is polymerized by irradiating the resist with an e-beam, x-ray, or ultraviolet source and heating the exposed resist. The resist is developed by a dry etchant such as plasma or a reactive ion etchant.

Abstract: Individual display modules are located along a shelf containing items for sale. The display modules are loaded via a hand-held unit with data pertaining to the items. This data has previously been downloaded from a host computer into the hand-held unit. In order to minimize human error, the hand-held unit contains a reader for reading a code from either the item or the shelf upon which the item is located. This code is then used by the hand-held unit in order to determine what data is to be downloaded into the appropriate display module. The coupling between the hand-held unit and the display modules may be of the type requiring a direct electrical connection or the close-proximity type employing optical or electro-magnetic coupling.

Abstract: The method includes generating a binary signal (S4A to S4D) which is time modulated. To do this, an alternating signal (S1) is compared with a known cyclical signal (S5) and a threshold signal. There is measured the durations between the transitions of the modulated signal by means of a high speed clock and by means of counting in the positive and negative directions of the clock pulses for one or more periods of the signal under examination. If, after counting, a residual value is found, one generates a binary signal representing the transition.

Abstract: A read only memory device with a matrix of series connected FET's addressed with X and Y decoding, a control switch between the output line and a voltage source operant to connect or not the voltage source to the output line in response to a control signal phi, and a second control switch, responsive to the same signal phi, provided between ground and each string of series connected FET's.

Abstract: In a darlington transistor having an integrated resistor connected from base to emitter of the output transistor element, the effect of the diode between collector and emitter formed when the resistor consists of an extension to the base region is reduced by forming at least part of the resistor either as an extension to the emitter region or as a separate region of the same conductivity type and connected to it. The resistor formed by the emitter region material appears in series with the diode.

Abstract: A device for use when inserting a tube into or through a rubber stopper, or other resilient sealing member. A rigid body member is provided with one or more holes shaped to support a tube in an upright position, so that a person can manually grip and push a stopper downward over the tube, without the normal difficulty of having to grip both the tube and the stopper at the same time. In a preferred embodiment the body member is also provided with a base to support the body in a stable position on a work bench or the like, and is further provided with a rigid protrusion having a suitable diameter for use in removing the tube from the stopper.

Abstract: An assembly of gates and pens, or other enclosures, for assembling, sorting, holding, and guiding animals to and from one or more processing stations. A plurality of perimeter gates define and enclose a sorting area having a second set of gates which divide the sorting area into separate sections. A number of holding pens, or other enclosures, adjoin the sorting area such that access to the sorting area from each holding pen is provided by a perimeter gate. Animals are guided from a holding pen, through the sorting area, then through a crowding area, then through a lead-up alley which exits back into the sorting area, one section of which is thus used for redirecting processed animals while another section is being used for incoming animals.

Abstract: A high frequency amplifier comprising a pair of input transistors forming a differential amplifier stage, with an impedance connected between the common terminals of the input transistors to vary the amplification factor of the amplifier stage. The variable impedance is formed by a diode bridge the a.c. terminals of which are connected to the common terminals of the input transistors and the d.c. terminals of which are connected to a circuit arrangement including current mirrors to feed a d.c. current to the diode bridge to control its impedance and hence the amplification factor of the differential amplifier stage.

Abstract: A MESFET is fabricated using a self-aligned gate process. This process uses a vertical (anisotropic) etch to self-align the gate and source/drain. The vertical etch, in conjunction with a two-level insulator, creates a barrier between the gate and source/drain, so that when metal is deposited and reacted, and any excess removed, the gate is self-aligned with the source/drain, and contacts to the source/drain and gate are well isolated. The alignment obtained by this process is advantageous in that series channel resistance is reduced, and a more compact structure is attained for improvement in packing density.

Abstract: A non-volatile JRAM cell is constructed to require only positive voltage for programming and erasing of data in the cell. The "well" region of the cell JFET device may be implanted with an impurity concentration that will permit lower breakdown voltage or the non-volatile gate may overlap the JFET gate sufficiently to be able to have the same effect, or some combination of both may be used. This allows the cell to be erased using voltages of one polarity.

Abstract: Disclosed is a method and apparatus for digital implementation and closed loop feedback of magnetic field waveforms utilizing three channels of a four channel incrementally programmable voltage source to drive field coils in each of three spatial axes, respectively. A fourth channel is utilized for signal conditioning of an output signal from a magnetic bubble memory undergoing test by injecting inverted noise to maximize the signal-to-noise ratio.

Abstract: A method for patterning layers of material on a substrate without photoresist by using a selective sublimation process. Differences in thermal conductivity of materials underneath a layer of material to be patterned cause patterning by sublimation over areas of low thermal conductivity, initiated by a pulsed or swept radiated energy source.

Abstract: A monolithic charge-coupled infrared imaging device (CCIRID) is fabricated on N-type HgCdTe. A native oxide layer on the semiconductor is used, in combination with ZnS to provide first level insulation. An opaque field plate over first level insulation is provided for signal channel definition. Second level insulation (ZnS) is substantially thicker than the first level, and is provided with a stepped or sloped geometry under the first level gates. Input and output diodes are provided with MIS guard rings to increase breakdown voltages.

Abstract: A method for preparing semiconductor material for integrated circuit device fabrication. A retaining wall is formed around islands of semiconductor material that are to include the active devices, and the islands are then subjected to transient radiation annealing. The retaining wall holds the shape of the islands during annealing, and promotes uniform crystal alignment in the material.

Abstract: An improved logic circuit is disclosed, having an improved disable circuit for disabling the logic circuit at a substantially reduced current level. A modified form of the disable circuit enables the logic circuit to operate either in a three-state mode or in an open-collector mode, as desired. A dynamic Miller shunt is also disclosed for rapidly forcing the active drive device into the non-conducting state each time the phase splitter device assumes the non-conducting state. In addition, an active Miller shunt is disclosed for maintaining the active drive device in the non-conducting state whenever the logic circuit is disabled.