Abstract: A trench cell for use in a DRAM array includes a vertical selection transistor of a first conductivity type at the—seen in the bit line direction—first side of the trench hole, a blocking doping region near the surface, of a second conductivity type, is provided adjacent to the trench hole, the blocking doping region lying opposite the vertical selection transistor. As a result, leakage currents can be avoided and, in addition, the trench cells can be disposed at a shorter distance from one another.

Abstract: A pressing body carries out pressing of shirts on a shirt-shaped inflation body, advantageously, by tensioning the shirt in a flat configuration and includes tensioning measures fixed to flat sections of the envelope of the inflation body, which draw the flat sections inwards or prevent the sections from adopting a round form on inflation. The tensioning measures can be, for example, flexible tensioning strips, connecting opposite regions of the envelope together and, furthermore, can partition those regions in which a reduced airflow occurs as a result of the thermal insulation.

Abstract: The data processing system has configurable components, which each have a configuration register for storing configuration data. A serial bus couples the configuration registers to a non-volatile memory so that a serial transmission of data from the non-volatile memory to the configuration registers is made possible, for example when the system is booted up. The system already functions even if complex bus systems, such as extensively parallel high-speed buses, for example, are not yet available in a configuration process of the system. The system can be used in all data processing systems, in particular in mobile applications.

Abstract: A trench power semiconductor component, in particular an IGBT, has an electrode (4) in a trench (3) that is laterally divided into a section (10) that serves as a gate and a section (11) that is connected to the source metallization (6). A method for making the trench power semiconductor component is also included.

Abstract: In a method for producing ferroelectric strontium bismuth tantalate having the composition SrxBiyTa2O9 (SBT) or SrxBiy(Ta, Nb)2O9 (SBTN), the element strontium, which is normally present in an amount y=2, is provided in excess in a range from 2.1≦y≦3.0. This makes it possible to carry out the heat treatment step for converting the deposited material into the ferroelectric phase at a temperature T1, which is lower than 700° C. In addition, the strontium content x can be reduced from a nominal value of 1 to 0.7.

Abstract: A method produces a thermoelectric layer structure on a substrate and the thermoelectric layer structure has at least one electrically anisotropically conductive V-VI layer, in particular a (Bi, Sb)2 (Te, Se)3 layer. The V-VI layer is formed by use of a seed layer or by a structure formed in the substrate, and disposed relative to the substrate such that an angle between the direction of the highest conductivity of the V-VI layer and the substrate is greater than 0°. The orientation can also be effected by an electric field. Components are formed of the thermoelectric layer structure in which the angle between the direction of the highest conductivity of the V-VI layer and the substrate is greater than 0°. As a result, the known anisotropy of the V-VI materials can advantageously be used for the construction of components.

Abstract: A semiconductor device is described in which an integrated circuit executes dummy operating cycles in order to generate heat if the temperature of the semiconductor device drops below a lower limit value. In this manner the semiconductor device can be rated for lower temperatures than the construction tolerances of the semiconductor device would allow.

Abstract: An adjusting device for adjusting a sheet transport cylinder in a sheet-fed rotary printing machine, depending upon various printing-material thicknesses, includes a mounting support for mounting the sheet transport cylinder so that a rotational axis of the sheet transport cylinder is adjustable from a first axial position, which corresponds to a given printing-material thickness, to a second axial position, which corresponds to another printing-material thickness and is axially parallel to the first axial position.

Abstract: A circuit configuration for the bit-parallel outputting the bits of a data word includes at least two signal lines for feeding the data signals representing the bits of the data word to driver stages and to a reference circuit. Further driver stages are connected in parallel with the driver stages and have inputs connected to the control device. The control device establishes the signal states of the data signals to be transferred on each signal line and generates a control signal depending on the type and number of the signal state changes of bit sequences to be transferred. It is possible to drive the driver stages that assigned to the signal line for which a signal state change is present.

Abstract: The invention relates to a method for adjusting a BGR circuit. In a first adjustment step, an offset adjustment of a voltage differential amplifier is performed at a predetermined temperature. In a second adjustment step, the reference voltage generated by the BGR circuit is regulated to as predetermined value of the reference voltage at the predetermined temperature by setting a variable resistance of an external circuitry of the voltage differential amplifier.

Abstract: An inking unit for a printing machine, which is assigned to a printing form, includes a first distributor roller and a second distributor roller, the first distributor roller being in rolling contact simultaneously with two ink applicator rollers, and being axially oscillatable more slowly and disposed more closely to the printing form than is the second distributor roller; and a printing machine including the inking unit.

Abstract: An integrated memory has a respective terminal for a clock signal and a data clock signal and also a data terminal. For a write operation, the memory accepts a write command on account of the clock signal and, in a manner time-delayed with respect thereto, a plurality of data at the data terminal on account of the data clock signal. An access controller serves for controlling an access to a memory cell array of the memory for the parallel writing of the accepted data to selected memory cells. The access to the memory cell array is triggered by the access controller by a phase-shifted clock signal before the clock signal has a next rising edge after the acceptance of the data. It is thus possible to increase the effective writing time from the application of the write command to the closing of a memory bank by a precharge command.

Abstract: An apparatus converts a digital value including “a” bits into an analog signal and has 2b D/A converters. Here, b is an integer number that is greater than 0. Each of the D/A converters is designed to convert a digital value having “a−b” bits. The digital value that is supplied (for i=1 . . . 2b) to the ith D/A converter for the purpose of D/A conversion corresponds to the “a−b” most significant bits in the sum of the digital value that will be converted by the apparatus and to i−1. The output signal for the apparatus is the mean value for the output signals from the D/A converters. Such an apparatus can be produced such that it can be accommodated easily and efficiently on a semiconductor chip and, irrespective of the details of protocol implementation, permits a completely linear conversion of the digital value being converted into an analog signal.

Abstract: A semiconductor component includes first and second connection zones formed in a semiconductor body, a channel zone surrounding the second connection zone in the semiconductor body, and a drift path that is formed between the channel zone and the first connection zone and contains a compensation zone. The compensation zone has a complementary conduction type with respect to the drift zone and includes at least two segments. A distance between the two adjacent segments is chosen such that the punch-through voltage between these segments lies in a voltage range that corresponds to the voltage range assumed by the voltage drop across the drift path at currents situated between the rated current and twice the rated current.

Abstract: A circuit configuration for reading out a programmable link enables programming the programmable link in addition to reading out the programmed value into a volatile memory cell. For this purpose, address lines that are present are coupled to the input of the volatile memory cell by additional switches. Given the presence of a hit signal at the output of a combination unit, the switches are driven by a control circuit in a manner dependent on a set signal. The present circuit is particularly suitable for dynamic semiconductor memories and for mass production.

Abstract: A method and device for measuring voltage of an internal reference voltage source of an integrated semiconductor circuit, in particular, a DRAM, including the steps of comparing a reference voltage to an external comparison voltage with a comparator, forming a measured value for the reference voltage to be set in accordance with a comparison result, switching a commutator by a clock- or software-control to alternatively apply the reference voltage and the comparison voltage to the comparator inputs at the same time, varying one of the reference and comparison voltage to a setpoint voltage value until the comparator output changes its logic value at each commutator switched stage, buffering the voltage values present for each switched state when the logic value changes, forming an average value for the reference voltage from the stored voltage values, and setting the reference voltage as a function of the average value formed.

Abstract: A method for roughening a surface of a semiconductor substrate includes the steps of placing the substrate in a furnace, introducing Oxygen and an inert gas, such as argon or nitrogen, into the furnace, maintaining the oxygen concentration in the furnace below 10%, and annealing the substrate at a temperature between 950° C. and 1200° C. to form mesopores in the surface of the semiconductor substrate.

Abstract: In order to obtain a minimal leakage inductance in a semiconductor component, it is necessary to provide at least two adjacent switching elements whose load current connection elements which are adjacent on one housing side to have different polarities. A multiplicity of even-numbered switching elements are advantageously disposed next to one another on an alignment line. The leads between the load current connection elements and the load current connections of the switching elements that are disposed next to one another advantageously run approximately orthogonally with respect to the alignment line. The assigned load current connection elements then alternately have the first and the second supply potential and this minimizes the leakage inductance.

Abstract: An electronic component having at least one semiconductor chip, a rewiring layer connected to the semiconductor chip, and a printed circuit board associated with the rewiring layer. The rewiring layer is provided with flexible contacts that correspond with contact faces of the printed circuit board, and the rewiring layer is solidly connected to the printed circuit board via a flat intermediate layer. A method for producing the electronic component is described.

Abstract: The apparatus monitors several system components for proper operation. Each of the system components to be monitored is assigned at least one dedicated monitoring device that can be operated independently of the system components to be monitored. Under all circumstances it is possible to detect reliably whether, and if appropriate, which of the system components to be monitored is operating in a faulty manner.