Abstract: An inverted staggered (bottom gate) thin film transistor (TFT) for active matrix liquid crystal display is processed with three masks. The first mask is used to pattern a metal film on a glass substrate as the gate of the TFT, the scan line of the TFT array, and a portion of the data line of the TFT array. The second mask is used to form a TFT mesa with a gate dielectric layer, an a-Si layer as channel, and a heavily-doped n+s-Si layer for contacting the source and the drain of the TFT. A third mask is used to pattern the transparent conductive indium-tin oxide film as the pixel electrode, the source/drain electrodes of the TFT, and the interconnections of the data line.

Abstract: A clock control circuit for sequentially enabling the clock input terminal of a number of groups of shift register stages for reducing the power consumption. The groups are seccessively activated, and the groups currently not in operation are made not to consume power. During changeover between adjacent groups of shift register stages, the clocks for the different groups overlap to insure stable operation.

Abstract: A protective garment material is constructed with a matrix of cells with protrusions. These cells are linked with polygonal connecting plates, which have cuts at the corners to form a section of a complete frame for the protrusions. The linkage is formed with aligned semicylindrical flanges extended from the edges of the connecting plate and semicydrical grooves aligned in a different direction serving as sockets for the semicylindrical flanges from a neighboring connecting plate, so that any two neighboring plate can be rotated with respect to each other. The connecting plate also serves as a protective layer for the inner cell in the unprotruded area. The protrusions dirert any frontal thrust sidewise to prevent penetration.

Abstract: A thin film switching array includes a plurality of switching elements arranged in the shape of an array on a substrate. Each switching element includes a thin film transistor and a compensation capacitor. One electrode of the compensation capacitor is formed by the same mask layer as the gate of the thin film transistor, and the other electrode of the compensation capacitor is common to the source electrode of the thin film transistor. The butting error due to multiple exposures of the number of blocks to compose a large area active matrix liquid crystal display, known as the block division effect, can be eliminated by laying out the compensation capacitor with area complementary to that of the stray capacitance such that the summation of the two capacitances remain constant. With constant capacitance, the feedthrough transient from the gate sigate to the liquid crystal display element becomes uniform, and one common compensating voltage can be used to offset the transient effect.

Abstract: Dual-mode resonators are coupled together to form a highly selective bandpass filter by means of a short section of waveguide. The short sections have cutoff frequencies beyond the passband of the filter. The coupling is adjustable over a wide range by means of adjustable screws. The coupling means is applicable to both empty cavities and dielectric-resonator-loaded cavities.

Abstract: A pixel arrangement scheme for a high resolution graphics display system, using video RAMs. Pixels are time multiplexed instead of using a temporary memory in a conventional system. Memory arrangement to implement this scheme is made to obtain higher speed and lower cost, consistent with the increased capacity of VRAMs.

Abstract: A timing control for precharged digital circuits to avoid spurious error appearing at the output due to the slow pull-down of the precharged node after precharging. A NAND gate is used to delay the precharged node siganl transmitting to the output stage until the precharged node is fully discharged. This timing control circuit is used to prevent any spurious peaking of the output of an analog-to-digital converter using precharged bit lines.

Abstract: This invention discloses a band-stop filter, which has multiple sections of non-uniform and unbalanced microstrip transmission line. Such a structure can optimize the characteristics and maximize the matching frequency range. The total length of the filter can be reduced to a half of that of a conventional filter, and the insertion loss in the pass-band is reduced to a third of that of a conventional filter. Besides, this invention suggests a structure which does not require the inward etching of the microstrip line. Instead, the microstrip line itself is used directly as the building element of a spur-line filter. Thus, the tolerance in fabrication can be greatly relaxed without effecting the required characteristics.

Abstract: A matrix display system includes an active matrix display device having an array of liquid crystal picture elements (pixel) with associated switches using thin film transistors (TFT). The pixels are arranged in groups, each having two pixels and switched by two complementary TFTs. The n-channel TFTs are switched on by a positive pulse and the p-channel TFTs are switched on by a negative pulse. The two switching signals are alternately fed from a row conductor which feeds both the n-channel TFTs and the p-channel TFTs on the same row. Each group of the two TFTs are addressed via the same row conductor and the same column conductor, which carries the data signal. In this way, either the number of row conductors are reduced by one half or the number of column conductors are reduced by one half.

Abstract: A television synchronization signal separator for a composite synchronizating signal, in which the horizontal synchronizing signal and the vertical synchronizing signals are derived and free from the interference of the equalization signals and noise during the vertical synchronization period. The odd and even fields are detected for generating the vertical synchronizing signal. All the circuits used are of digital types, so that they can be fabricated in an integrated structure.

Abstract: Switched current differentiators are used as the basic building blocks for discrete time signal processing to implement filters, biquads and high order ladder networks. These circuits can readily be implemented with MOS technology.