Patents Represented by Attorney Heller Ehrman
  • Patent number: 7176123
    Abstract: The present invention discloses methods for manufacturing a metal line of a semiconductor device that can prevent undesirable etching of an edge of an interlayer insulating film. In accordance with the method, a lower metal line exposed by a via contact hole is covered by a photoresist film pattern which is formed via an exposure and development process using an upper metal line mask. An etching process is performed using the photoresist film pattern as a mask to form the upper metal line region that is then filled to form an upper metal line after removing the photoresist film pattern.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: February 13, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventors: Yu Chang Kim, Kwang Ok Kim
  • Patent number: 7173843
    Abstract: A nonvolatile memory device features a serial diode cell as a cross-point cell using a nonvolatile ferroelectric capacitor and a serial diode chain. The serial diode cell comprises a ferroelectric capacitor and a serial diode switch. The ferroelectric capacitor, located where a word line and a bit line are crossed, stores values of logic data. The serial diode switch is connected between the ferroelectric capacitor and the bit line and selectively switched depending on voltages applied to the word line. The nonvolatile memory device using a serial diode cell comprises a plurality of serial diode cell arrays, a plurality of word line driving units and a plurality of sense amplifiers. Each of the plurality of serial diode cell arrays each includes a single serial diode cell where a word line and a bit line are crossed. The plurality of word line driving units selectively drive the word line. The plurality of sense amplifiers sense and amplify data transmitted through the bit line.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: February 6, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventor: Hee Bok Kang
  • Patent number: 7173868
    Abstract: A SENSE AMPLIFIER OF FERROELECTRIC MEMORY DEVICE features improvement of the amplification degree. The SENSE AMPLIFIER OF FERROELECTRIC MEMORY DEVICE comprises a MBL sensing unit, a voltage dropping unit, a coupling regulation unit, a pull-down regulation unit, a sensing load unit, and an amplification unit. The level of the sensed voltage is double regulated, thereby improving the amplification degree on low voltage sensing data, and a small sensing voltage of a main bit line can be embodied, thereby embodying a lower voltage memory.
    Type: Grant
    Filed: February 15, 2005
    Date of Patent: February 6, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventor: Hee Bok Kang
  • Patent number: 7170815
    Abstract: A memory apparatus for supporting a multiprocessor function enables data of different characteristics to be stored in one memory, thereby reducing the area of on the system board and decreasing delay margins on the data bus. The memory apparatus has an instruction memory unit arranged to be included in one memory chip and at least one data memory unit. The instruction memory unit includes cell array blocks having nonvolatile ferroelectric c stores instruction information required for operating a central processing unit of a system. The data memory unit is connected to the central processing unit by a data bus and is provided with cell array blocks having nonvolatile ferroelectric capacitors and stores execution data required for the execution of the instruction information.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: January 30, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventor: Hee Bok Kang
  • Patent number: 7170770
    Abstract: A nonvolatile ferroelectric perpendicular electrode cell comprises a ferroelectric capacitor and a serial PN diode switch. The ferroelectric capacitor includes a word line perpendicular electrode as a first electrode and a storage perpendicular electrode as a second electrode apart at a predetermined interval from the word line perpendicular electrode to have a column type, where a ferroelectric material is filled in a space where the first electrode are separated from the second electrode. The serial PN diode switch, which is connected between a bit line and the ferroelectric capacitor, selectively switches a current direction between the bit line and the ferroelectric capacitor depending on voltage change between the bit line and the ferroelectric capacitor.
    Type: Grant
    Filed: February 15, 2005
    Date of Patent: January 30, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventor: Hee Bok Kang
  • Patent number: 7170773
    Abstract: A nonvolatile ferroelectric memory device having a multi control function can amplify sensing voltage levels in a sensing critical voltage and determine a plurality of cell data when a plurality of reference timing strobes are applied on a basis of a time axis. In a read mode, a plurality of read data applied from a cell array block are stored in a read/write data register array unit through a common data bus unit. In a write mode, a plurality of read data stored in the read/write data register array unit or input data applied from a timing data buffer unit are stored in a cell, array block through the common data bus unit. Here, since a plurality of sensing voltage levels are set in cell data, a plurality of sensed data bits can be stored in one cell.
    Type: Grant
    Filed: December 1, 2005
    Date of Patent: January 30, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventor: Hee Bok Kang
  • Patent number: 7171597
    Abstract: The I/O compression test circuit performs test on global I/O lines divided into groups after failure occurs, thereby improving repair efficiency. The configuration of the test circuit is simplified by using a reset circuit, reducing the delay time, and thereby decreasing test time. Additionally, two strobe signals enable the I/O compression test circuit to perform a stable operation.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: January 30, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventor: Yong Deok Cho
  • Patent number: 7164594
    Abstract: A nonvolatile ferroelectric memory device features a multi-bit serial cell structure where read bit lines and write bit lines are divided to control read/write paths individually, thereby improving a transmission operation of serial data. In the nonvolatile ferroelectric memory device, a serial cell that comprises a plurality of switching devices and a plurality of ferroelectric capacitors is connected serially between a write switching device and a read switching device. The serial cell stores cell data applied from the write bit line sequentially in the plurality of ferroelectric capacitors at a write mode, and outputs the cell data stored in a plurality of ferroelectric capacitors to the read bit line at a read mode.
    Type: Grant
    Filed: March 29, 2005
    Date of Patent: January 16, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventors: Hee Bok Kang, Jin Hong Ahn
  • Patent number: 7163694
    Abstract: Bioerodible poly(ortho esters) useful as orthopedic implants or vehicles for the sustained delivery of pharmaceutical, cosmetic and agricultural agents from dioxane-based di(ketene acetals). Block copolymers contain these bioerodible poly(ortho esters). These block copolymers have both hydrophilic and hydrophobic blocks. They form micelles in aqueous solution, making them suitable for encapsulation or solubilization of hydrophobic or water-insoluble materials; and they also form bioerodible matrices for the sustained release of active agents.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: January 16, 2007
    Assignee: A.P. Pharma, Inc.
    Inventors: Jorge Heller, Steven Y. Ng
  • Patent number: 7163701
    Abstract: NGF microencapsulation compositions having controlled release characteristics, preferably with increased stability, for the NGF component, particularly human recombinant NGF (“rhNGF”) are provided that yield enhanced stability of NGF for use in promoting nerve cell growth, repair, survival, differentiation, maturation or function. Methods for making and using such compositions are also provided.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: January 16, 2007
    Assignee: Genentech, Inc.
    Inventors: Jeffrey L. Cleland, Xanthe M. Lam, Eileen T. Duenas
  • Patent number: 7161860
    Abstract: A local input/output line precharge circuit of a semiconductor memory device comprises a precharge control unit, an equalization unit and a data output unit. The precharge control unit outputs a precharge control signal to precharge a pair of local input/output lines in response to a continuous write signal activated when a write operation continues. The equalization unit precharges and equalizing the pair of local input/output lines in response to the precharge control signal. The data output unit outputs data signals of a pair of global input/output lines to the pair of local input/output lines in response to output signal from the equalization unit. In the circuit, a local input/output line precharge operation is not performed at a continuous write mode, thereby reducing current consumption.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: January 9, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sung Joo Ha, Ho Youb Cho
  • Patent number: 7161856
    Abstract: A circuit for generating a data strobe signal of a semiconductor memory device comprises a plurality of internal clock delay units, a selecting control unit and a pulse generating unit. The plurality of internal clock delay units delay an internal clock signal in response to a plurality of CAS latency signal. The selecting control unit logically combines a data latch control signal to latch input data with output signals from the plurality of internal clock delay units. The pulse generating unit generates the data strobe signal having a predetermined pulse in response to an output signal from the selecting control unit. In the circuit, a tDQSS margin is regulated depending on change of tCK of an operating frequency in response to a CAS latency signal.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: January 9, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sung Joo Ha, Ho Youb Cho
  • Patent number: 7157246
    Abstract: The present invention relates to an RNA polymerase I transcription factor TIF-IA and proteins related thereto, whose concentration and/or activity are correlated with the cell proliferation rate, and to DNA sequences encoding these proteins. The present invention also concerns ligands binding to an RNA polymerase I transcription factor TIF-IA and proteins related thereto, respectively, antagonists as well as antisense RNAs and/or ribozymes, directed against the TIF-IA expression. These compounds are of use for the prevention or treatment of diseases associated with an increased or reduced cell proliferation.
    Type: Grant
    Filed: September 14, 2001
    Date of Patent: January 2, 2007
    Assignee: Deutsches Krebsforschungszentrum Stiftung des Oeffentlichen Rechts
    Inventors: Ingrid Grummt, Martin Vingron
  • Patent number: 7158430
    Abstract: A bit line sense amplifier control circuit includes a driving signal generating unit adapted and configured to generate first through third driving signals in response to a bit line sense amplifier enable signal and an overdrive enable signal for setting an overdrive period, and to disable a first driving signal which is enabled for an overdrive period in response to a refresh signal which is enabled at a refresh mode, and a bit line sense amplifier control signal generating unit adapted and configured to generate first and second bit line sense amplifier control signals in response to the first through third driving signals. As a result, an overdrive pulse is not generated at a refresh mode to remove an overdriving period, thereby reducing current consumption at a refresh mode.
    Type: Grant
    Filed: June 15, 2005
    Date of Patent: January 2, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventor: Hee Jin Byun
  • Patent number: 7153941
    Abstract: The present invention is directed to novel polypeptides and to nucleic acid molecules encoding those polypeptides. Also provided herein are vectors and host cells comprising those nucleic acid sequences, chimeric polypeptide molecules comprising the polypeptides of the present invention fused to heterologous polypeptide sequences, antibodies which bind to the polypeptides of the present invention and to methods for producing the polypeptides of the present invention.
    Type: Grant
    Filed: May 10, 2002
    Date of Patent: December 26, 2006
    Assignee: Genentech, Inc.
    Inventors: Audrey Goddard, Paul J. Godowski, Austin L. Gurney, Victoria Smith, William I. Wood
  • Patent number: 7153426
    Abstract: The invention relates to charged filtration membranes and their use for separation of a protein from solvent, low molecular weight solutes or a mixture of proteins. Modification of the membranes to generate charge includes modification of membrane pores to alter charge within a pore and alter the size of a pore. Consequently, the protein is separated from other solutes in a mixture based on size as well as net protein charge and membrane charge.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: December 26, 2006
    Assignee: Genentech, Inc.
    Inventor: Robert D. van Reis
  • Patent number: 7154097
    Abstract: A method for measuring a dose of irradiation with a beam of ionizing radiation capable of creating Cherenkov radiation, in which a scintillator for emitting scintillation light, whose intensity is a function of the dose of this beam irradiating this scintillator, is arranged below this beam, the scintillator is coupled, via an optical fiber, to a device for measuring the light emitted by the scintillator, and the quantity of light transmitted by the optical fiber is measured, is described. The light emerging from the opposite end of the optical fiber is filtered using two bandpass filters having cutoff bands in different parts of the spectrum, the intensity of the light coming from these two filters is measured a plurality of times, and the pluralities of quantities of scintillation light and Cherenkov radiation are calculated on the basis of these measurements to deduce a first irradiation dose value.
    Type: Grant
    Filed: March 15, 2002
    Date of Patent: December 26, 2006
    Assignee: Centre National de la Recherche Scientifique (CNRS)
    Inventors: Jean-Marc Fontbonne, Bernard Tamain, Joël Tillier, Gilles Iltis, Christian Le Brun, Gilles Ban
  • Patent number: 7153946
    Abstract: A molecular conjugate is provided having the formula: wherein R1 is a de-hydroxyl or de-amino moiety respectively of a hydroxyl-bearing or amino-bearing biologically active molecule or an analog or derivative thereof, and Z is —O— or —NH—, respectively, Y is a straight or branched alkyl having 1 to 20 carbons that may be optionally substituted with one or more phenyl, a cycloalkyl optionally substituted with one or more alkyl or phenyl, or an aromatic group optionally substituted with one or more alkyl groups, electron-withdrawing groups, or electron-donating groups; and R2 is —CH?CH(W), —CH(OH)CH(OH)W, or —C(O)H, where W can be H, a straight or branched alkyl having 1 to 20 carbons that may be optionally substituted with one or more phenyl, a cycloalkyl optionally substituted with one or more alkyl or phenyl, or an aromatic group optionally substituted with one or more alkyl groups, electron-withdrawing groups, or electron-donating groups.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: December 26, 2006
    Assignee: Tapestry Pharmaceuticals, Inc.
    Inventors: James D. McChesney, Madhavi C. Chander, Teruna J. Siahaan, Christine R. Xu, Sterling K. Ainsworth
  • Patent number: 7153739
    Abstract: The present invention discloses methods for manufacturing a capacitor of a semiconductor device employing doped silicon film as an electrode and an oxide film-nitride film-oxide film as a dielectric film. An interlayer insulating film is formed on a semiconductor substrate. A storage electrode is formed consisting of a doped polysilicon on the interlayer insulating film. A first oxide film is formed on the storage electrode that is subjected to a thermal treatment in an atmosphere containing an n-type impurity to implant the impurity into the first oxide film. A nitride film is formed on the first oxide film, whereby the impurity in the first oxide film is diffused into the nitride film. A second oxide film is formed on the nitride film. A plate electrode is then formed on the second oxide film.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: December 26, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventors: Chang Rock Song, Sang Ho Woo, Dong Su Park, Cheol Hwan Park, Tae Hyeok Lee
  • Patent number: D536507
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: February 13, 2007
    Assignee: Lovells
    Inventor: Adrian Schröder