Abstract: A sleep apnea syndrome diagnosing device disclosed herein comprises: a snoring sound collector which collects snoring sound; a snoring sound holder which holds the collected snoring sound; a correlation coefficient calculator which divides a time axis of the snoring sound held in the snoring sound holder into plural cycles and which sequentially calculates a correlation coefficient between the snoring sound of one cycle and the snoring sound of a cycle next to the one cycle; and an output section which outputs the correlation coefficient calculated by the correlation coefficient calculator.

Abstract: The present invention discloses improved semiconductor device and method for manufacturing wherein one side of a source and drain region and a portion of a channel region are disposed on a buried oxide layer formed on a semiconductor substrate and the side of the source and drain region and another portion of the channel region are disposed on a Si epitaxial layer formed on a semiconductor substrate.

Abstract: The present invention is directed to novel polypeptides and to nucleic acid molecules encoding those polypeptides. Also provided herein are vectors and host cells comprising those nucleic acid sequences, chimeric polypeptide molecules comprising the polypeptides of the present invention fused to heterologous polypeptide sequences, antibodies which bind to the polypeptides of the present invention and to methods for producing the polypeptides of the present invention.

Abstract: The present invention is related to semiconductor device and method for manufacturing the same. In accordance with the semiconductor device and method for manufacturing the same, at least one opening extending between LDD regions and exposing a buried insulating layer is formed so that a gate electrode surrounds the surface of a channel region. This structure allows the formation of a relatively a thick channel region and decreases the sensitivity of characteristics of the device dependent upon the thickness of the channel region.

Abstract: A piezoresistive device senses mechanical input and converts mechanical movement of at least two relatively movable parts into an electrical output. An SOI substrate is provided. A gap extends across a portion of the substrate. The gap defines the at least two relatively moveable parts and a flexible cross-section that connects the at least two relatively moveable parts. The cross-section is made of a same material as the substrate. At least one strain sensitive element is at a surface of the substrate. The at least one strain sensitive element has two end portions interconnected by an intermediate neck portion. The neck portion is supported on a structure that concentrates strain. The structure extends across the gap and has vertical walls extending to the cross-section in the gap. The structure is made of the same material as the substrate.

Abstract: A device for controlling a temperature compensated self-refresh period clamps a self-refresh signal at high temperature over a specific temperature to maintain the self-refresh period, thereby removing dependency on temperature. In the device, an oscillating signal having a period varied depending on temperature change is generated below a specific temperature, and a period of a first period signal is compared with that of the oscillating signal applied from a temperature compensated self-refresh circuit unit over the specific temperature. When the period of the oscillating signal is shorter than that of the first signal, a pulse width of an oscillating strobe signal generated in response to a plurality of division signals each obtained by dividing the period of the oscillating signal at a predetermined ratio is controlled, so that an oscillating period of the temperature compensated self-refresh circuit unit is kept at a fixed state.

Abstract: A nonvolatile memory device features a phase change resistor cell. The nonvolatile memory device using a phase change resistor cell comprises a plurality of phase change resistor cell arrays, a plurality of word line driving units and a plurality of sense amplifiers. Each of the plurality of phase change resistor cell arrays includes unit phase change resistor cells, and each unit phase change resistor cell is located where a word line and a bit line are crossed in row and column directions. The plurality of word line driving units selectively drive the word lines. The plurality of sense amplifiers sense and amplify data transmitted through the bit lines. Here, the unit phase change resistor cell comprises a phase change resistor and a hybrid switch. The phase change resistor stores a logic data value corresponding to a resistance sate changed by a crystallization state of a phase change material depending on the amount of current supplied from a word line.

Abstract: The present invention provides an immunodeficient mouse (NOG mouse) suitable for engraftment, differentiation and proliferation of heterologous cells, and a method of producing such a mouse. This mouse is obtained by backcrossing a C.B-17-scid mouse with an NOD/Shi mouse, and further backcrossing an interleukin 2-receptor ?-chain gene-knockout mouse with the thus backcrossed mouse. It is usable for producing a human antibody and establishing a stem cell assay system, a tumor model and a virus-infection model.

Abstract: Pantropic neurotrophic factors which have multiple neurotrophic specificities are provided. The pantropic neurotrophic factors of the present invention are useful in the treatment of neuronal disorders. Nucleic acids and expression vectors encoding the pantropic neurotrophins are also provided.

Abstract: A body fluid sampling device for extracting bodily fluid from an anatomical feature is provided. The device comprises a penetrating member driver for driving a penetrating member to create a wound to extract bodily fluid; a light source positioned to indicate a point of sampling where the wound will be created, the light source indicating the point of sampling with a beam of light. The light source may be selected from one of the following: an LED, incandescent, fluorescent, or electroluminescent light source.

Abstract: A clock duty ratio correction circuit corrects a duty ratio of internal clock signals at 1:1. The clock duty ratio correction circuit comprises a clock buffer unit, a charge pump unit, a comparison control unit, a voltage comparison unit, a counter and a D/A converter. The clock duty ratio correction circuit converts a differential internal clock signal into a voltage level corresponding to the pulse width of the differential internal clock signal, and compares the voltage level to generate a count signal. Additionally, the clock duty ratio correction circuit divides a reference voltage at a predetermined ratio in response to the count signal to generate a duty ratio correcting signal, and corrects the duty ratio of the differential internal clock signal by using the voltage level difference of the duty ratio correcting signal.

Abstract: A synchronous semiconductor memory device reduces operation current by limiting unnecessary internal operations with a command interval defined in the JEDEC Standard. The synchronous semiconductor memory device comprises a clock buffer, a plurality of command buffers, a plurality of address buffers, a command decoder, a clock driving unit, and a plurality of address latches. Here, the command decoder generates an internal command in response to output signals from the plurality of command buffers synchronously with respect to an internal clock. The clock driving unit drives a clock outputted from the clock buffer to generate the internal clock, and generates a latch clock that toggles only when the internal command is generated. The plurality of address latches generates a plurality of latch addresses in response to a plurality of internal addresses outputted from the plurality of address buffers synchronously with respect to the latch clock.

Abstract: A method of inhibiting degradation of a transistor gate oxide film by high density plasma is disclosed. After a gate electrode is formed, impurity is implanted on the surface of an oxide film, thereby changing surface characteristics of the oxide film to scatter ultraviolet rays which are factors of degradation of the gate insulating film. Accordingly, the ultraviolet rays are prevented from being permeated into a gate insulating oxide film.

Abstract: A nonvolatile ferroelectric memory device has an improved cell array structure where one main bit line is connected in common to a plurality of sub bit lines, thereby reducing the layout area of the memory and facilitating the process. The nonvolatile ferroelectric memory device having a common main bit line comprises a plurality of cell array blocks, a plurality of sense amplifiers, a main amplifier unit, and a data bus unit. The plurality of cell array blocks, which include main bit lines shared by a plurality of sub bit lines each adjacent left and right to the main bit line, induce a sensing voltage of the main bit line depending on a voltage applied to the plurality of sub bit lines by cell data.

Abstract: A memory device and a test method thereof enable verification of failure of a cell region by intercepting bit lines connected to the cell region in a write-verify-read test. The memory device comprises a plurality of bit line switches and a separation control unit. The bit line switches connect the bit lines of the bit line sense amplifier to those of the selected cell array in response to a bit line separation control signal in a normal mode, separate the bit lines of the bit line sense amplifier from those of the unselected cell array, and separate the bit lines of the bit line sense amplifier from those of the cell array in response to the bit line separation control signal in a test mode. The separation control unit disables the bit line separation control signal in response to a test mode signal in the test mode.

Abstract: The present invention involves obtaining telecommunications data of a business entity from its communications vendors and providing that business entity with aggregated telecommunications data. After obtaining from multiple vendors both the detailed information of a business entity's telecommunications assets and usage of network services and/or the accompanying costs for those assets and services, the present invention aggregates the detailed information for telecommunications asset management and analysis purposes and provides the business entity with the aggregated information, for example by database or through a network interface.

Abstract: Varicella zoster virus (VZV) inimunoreactive protein VP26 and its diagnostic use are described. The invention relates to immunoreactive peptides which are homologous with the region of amino acid positions 12 to 235 (SEQ ID NO: 7) of the varicella zoster virus protein VP26, to nucleic acids which encode these peptides and to the use of the peptides or nucleic acids for diagnosing an infection with varicella zoster virus.

Abstract: A parallel test circuit performs a selective test on a specific bank. The bank selectable parallel test circuit comprises a bank selecting control unit and a plurality of bank selecting units. The bank selecting control unit outputs a test mode control signal for selecting a test mode in response to a parallel test signal for controlling a parallel test and a compression test signal for controlling bank selection in the parallel test. Each of the plurality of bank selecting units, which correspond one by one to banks, selectively activates the corresponding banks in response to the test mode control signal and a bank selecting control signal.

Abstract: This invention relates to methods of analyzing a tissue sample from a subject. In particular, the invention combines morphological staining and/or immunohistochemistry (IHC) with fluorescence in situ hybridization (FISH) within the same section of a tissue sample. The analysis can be automated or manual. The invention also relates to kits for use in the above methods.