Abstract: Provided is a semiconductor package in which an adhesion force between an insulation metal substrate and a molding member is increased by removing a solder mask layer from the insulation metal substrate and a method of fabricating the semiconductor package. The semiconductor package includes an insulation metal substrate that includes a base member, an insulating layer disposed on the base member, and conductive patterns formed on the insulating layer. Semiconductor chips are arranged on the conductive patterns. Solder mask patterns are arranged on the conductive patterns to surround the semiconductor chips. Leads are electrically connected to the conductive patterns through wires. A sealing member is arranged on an upper surface and side surfaces of the substrate to cover portions of the leads, the wires, the semiconductor chips, and the solder mask patterns.

Abstract: An integrated transistor module includes a lead frame that defines at least one low-side land and at least one high-side land. A stepped portion of the lead frame mechanically and electrically interconnects the low-side and high-side lands. A low-side transistor is mounted upon the low-side land with its drain electrically connected to the low-side land. A high-side transistor is mounted upon the high-side land with its source electrically connected to the high-side land.

Abstract: A data reader system includes a plurality of indicia readers for reading symbol indicia and producing a symbol signal representative of the symbol indicia. At least two of the indicia readers includes a processor for controlling the indicia reader, the processor having memory for storing firmware. A communication module is configured to communicate with other indicia readers and the indicia reader system is configured to transfer firmware to other indicia readers utilizing the communication modules.

Abstract: Apparatus for limiting the amount of debris that is disbursed in and around a disc type wood chipper when the disc is being treated with high pressure air. The apparatus includes a casing that surrounds the chipper disc having a stationary section and a removable section that can be detached from the stationary section to provide access to about 90° of the disc. A shield is hinged to the stationary section of the disc that has a vertical wall and an arcuate cover that can be moved over the exposed section of the disc which contains and directs debris in the chippers exhaust system when removed by high pressure air that is directed at the front face of the disc.

Abstract: A CMOS device with polysilicon protection tiles is shown in FIG. 2. LOCOS regions 12.1 and 12.2 separate adjacent active regions 16.1 from 16 and 18.1 from 18, respectively. On the upper surface of the LOCOS regions 12.1, 12.2 are polysilicon tiles 14.1, 14.2, respectively. At the corner of the gate polysilicon 14.3 and the polysilicon tiles 14.1 and 14.2 are oxide spacers 60.1-60.6. The polysilicon tiles 14.1, 14.2 have silicide layers 50.1, 50.2. Other silicide layers 50.4-50.6 are on the tops of the source, drain and polysilicon gate. An insulation layer 32 covers the substrate and metal contacts 36, 34, 38 extend from the surface of the layer 32 to the silicide layers on the source, gate and drain, respectively. The polysilicon tiles are made from the same layer of polysilicon as the gate and they are formed simultaneously with the gates. The intention of the polysilicon tiles is to reduce erosion of the field oxide between closely spaced active regions.

Abstract: A power plant with heat transfer, in which power is generated by an arbitrary number of heat engines, described above and illustrated in FIGS. 1 to 18. is disclosed. The heat engines (A) are arranged in series with a cooling medium (22) and a heating medium (30) passing through them in a counter flow principal. After exiting the last heat engine the heated-up cooling medium is used as a combustion air. The heating medium (30) exiting in the opposite direction the last heat engine (A) can be used further on for heating purposes or other heating consumers.

Abstract: Disclosed in this specification is a multiphase buck converter package and process for forming such package. The package includes at least four dice and several parallel leads. The dice are electrically connected through a plurality of die attach pads, thus eliminating the need for wirebonding.

Abstract: An energy absorber for use in a personal fall arresting system. The absorber contains upper and lower webbings which are each two ply members. The back ply of the upper webbing is mounted adjacent to the face ply of the lower webbing with said webbing being of about equal length and width. Exterior tear elements run back and forth sinusoidally between attachment points on the face ply of the upper webbing and the back ply of the lower webbing. Interior tear elements run back and forth sinusoidally between attachment points on the back ply of the upper webbing and the top ply of the lower webbing.

Abstract: The invention claimed is a packaged semiconductor device with dual exposed surfaces and a method of manufacturing the device. A thermal clip and one or multiple source pads are exposed on opposite ends of the device through a nonconductive molding material used to package the device. The thermal clip and source pad can be either top or bottom-exposed. The gate, source and drain leads are exposed through the molding material, and all leads are coplanar with the bottom-exposed surface. The device can have multiple semiconductor dies or various sized dies while still having a single, constant footprint. The method of manufacturing requires attaching the semiconductor die to a thermal clip, and then attaching the die with the attached thermal clip to a lead frame. The resulting device is then molded, marked, trimmed and singulated, in this order, creating a packaged semiconductor device with dual exposed surfaces.

Abstract: The invention is a business process embodied in a software algorithm that determines difference in practice patterns among physicians for the main cost components of given conditions.

Abstract: A semiconductor package assembly including a molded leadless package (MLP) having an exposed top emitter pad and an exposed bottom source pad. A folded heat sink is attached to the exposed top emitter pad of the MLP by a soft solder attach process. The folded heat sink has a planar member generally coextensive in size with the MLP and in electrical and thermal contact with the top emitter pad of the MLP, and also has one or more leads extending generally perpendicularly to the planar member in a direction towards the lower surface of the MLP. These heat sink leads may provide the emitter connection to a printed circuit (PC) board.

Abstract: Disclosed herein is an absorber with a hole for a metallic magnetic cryogenic detector and an aligning method. More specifically, the present invention is to provide an absorber with a small hole as an aligning mark for a temperature sensor used in a metallic magnetic cryogenic detector. A temperature sensor is bonded on the small hole of the absorber punched by a laser. Using the hole as an aligning mark the temperature sensor can be accurately positioned on the pick-up coil of the measuring means. Thus, the aligning method provides a magnetic measurement with an ideal coupling between the sensor and the pick-up loop. It eventually presents a precise measurement of the energy spectrum absorbed in a metallic magnetic cryogenic detector.

Abstract: A 3D smart power module for power control, such as a three phase power control module, includes a two sided printed circuit (PC) board with power semiconductor devices attached to one side and control semiconductor devices attached to the other side. The power semiconductor devices are die bonded to a direct bonded copper substrate which has a bottom surface exposed in the molded package. In one embodiment the module has 27 external connectors attached to one side of the PC board and arranged in the form of a ball grid array.

Abstract: By the use of program scripts, databases, and other software elements, taking as input a set of text files making up a work of literature of substantial size, converting the files to an electronically-readable form, linking the files to each other to provide readers with a rich set of associations to be explored within the work, muting the presentation of the links in order to preserve the immersive character of the reading process, and simplifying the user browsing interface to limit distractions that vitiate the immersive reading experience. By the richness and simplicity of carefully-designed outputs, offering the author a new range of opportunities for engaging the reader, offering the publisher a new opportunity for succeeding in purveying electronic literature, and presenting the reader with an “electronic literary macramé”: a new class of work permitting a level of immersive reading practice obtainable only in the world of electronic text.

Abstract: Provided are a semiconductor device and a method of fabricating the semiconductor device.

Abstract: Disclosed in this specification is a semiconductor package with a die attach pad and a lead frame which are electrically and mechanically connected to one another through a conductive wire ribbon. Such a configuration reduces the package footprint and also permits different styles of die attach pads and lead frames to be interchanged, thus reducing production costs.

Abstract: A power device package according to the one embodiment of the present invention includes an insulating substrate with an interconnection pattern disposed on the insulating substrate. The interconnection pattern comprises a single conductive layer comprising a first metal layer, and a multiple conductive layer comprising another first metal layer and a second metal layer disposed on the another first metal layer. A plurality of wires are attached to an upper surface of the single conductive layer and/or an upper surface of the second metal layer of the multiple conductive layer. Contact pads on a power control semiconductor chip and a low power semiconductor chip driving the power control semiconductor chip are electrically connected to the wires.

Abstract: A method of controlling an imager in a portable data collection device. A plurality of data structures are created with each containing a set of values for controlling an exposure process of an imager in a portable data collection device. One of the plurality of data structures is selected and the values therein are applied to the imager. Thereafter, a frame is captured by the imager and outputted.

Abstract: A semiconductor device 100 has N-well regions 18 holding PMOS devices 110, 112 and P-type regions 14 holding NMOS devices 114, 116. Devices 110 and 114 have high thresholds and devices 112 and 116 have low thresholds. The PMOS devices are junction isolated from the substrate 10 by the N-well 18 and the NMOS devices are isolated from the substrate by the N-type layer 13. Field oxide regions 20 laterally isolate the PMOS from the NMOS devices. The high threshold CMOS devices 110, 114 connect the low threshold CMOS devices to opposite rails Vdd and Vss. A control terminal 121 turns the high threshold devices on to let the low threshold devices switch rapidly. In stand-by mode, the high threshold devices are off and there is very low leakage current.