Abstract: A gas isolation box including an enclosure; a number of gas sticks contained within the enclosure, each gas stick including a process gas section comprising a first process gas inlet valve for gating the flow of a process gas into the gas stick; a purge gas section including a purge valve for gating the flow of a purge gas into the gas stick; and an evacuation section including a first evacuation valve for gating the exiting of a process gas or a purge gas from the gas stick, a bleed valve which in a closed position allows process gas to bleed through the bleed valve and in an open position allows purge gas to freely flow through the bleed valve, and a vacuum generator module which pulls a vacuum to evacuate a purge gas or any remaining process gas in the gas stick or the tool through the first evacuation valve and the bleed valve and out from the gas stick to an exhaust stream.

Abstract: A wiring structure with crossover capability is disclosed. The wiring utilizes a connection stud in a contact layer, beneath the plane of the otherwise-intersecting lines as a crossover. Thus, a first wire in a first metallization layer passes below a second wire in a second metallization layer by overlapping contact with the connection stud in the contact layer. In manufacturing the wiring structure of the present invention, no intervening insulative or via layers are used between the contact layer, the first metallization layer and the second metallization layer. However, care must be taken in device layout on the substrate to ensure that the connection stud is located above isolation areas rather than active device areas.

Abstract: A method and structure for filling an opening in a substrate which includes positioning a sheet above the substrate and punching the sheet into the opening in the substrate, wherein the sheet and the substrate have similar shrinkage characteristics when subjected to a subsequent sintering process.

Abstract: An apparatus and method are provided for loading punch pins into a punch pin holding plate of a gang-punch apparatus wherein an individual punch pin is removed from a preloaded punch pin holder or supply plate, transferred to a load station which precisely locates the punch pin shank over the pre-drilled hole in the punch pin holding plate while holding the punch perpendicular and coaxial to the hole and pushes the punch into the punch pin holding plate. A vision system is used to align the hole in the punch pin holding plate and to verify that the punch pin is properly loaded into the holding plate. The above sequence for individual punches is repeated until the desired number of punch pins are transferred from the preloaded holder to the punch pin holding plate.

Abstract: A method of forming non-spherically shaped solder interconnects, preferably conical, for attachment of electronic components in an electronic module. Preferably, the solder interconnects of the present invention are cone shaped and comprise of depositing a first solder followed by a second solder having a lower reflow temperature than the first solder. Warm placement of the electronic component at a somewhat elevated temperature than room temperature but less than the solder reflow temperature reduces the force required during placement of a semiconductor chip to a substrate. After warm placement, reflow of the module occurs at the lower reflow temperature of the second solder. The conical shape of the solder interconnects are formed by a heated coining die which may also coin a portion of the interconnects with flat surfaces for stand-offs.

Abstract: A method of interconnecting electronic components by using a plurality of conductive studs on a surface of a first electronic component and a plurality of corresponding conductive vias on the surface of a second electronic component. Camber on the surface of electronic components may be overcome by coating the surface with a dielectric, planarizing the dielectric, and forming conductive vias corresponding to the contact pads thereon. The conductive studs are substantially lead-free and preferably comprise of copper.

Abstract: An apparatus for displacing an article including first and second pallets for holding and transporting an article between two process stations; an H-bar assembly for receiving the first and second pallets at one of the two process stations; wherein, in operation, a process is performed on the articles while the first and second pallets are received by the H-bar assembly, the pallets then being transported to the second process station where a second process is performed on the articles.

Abstract: A method of joining first and second substrates through a solder element interconnect, the method including the steps of forming solder elements, such as solder balls, in a first array on a first substrate, forming pads of solder paste in a second array on a second substrate wherein the first and second arrays are mirror images of one another, establishing a standoff element on one of the first or second substrates, assembling the first and second substrates such that each of the solder elements on the first substrate are embedded in each of the solder paste pads and the standoff element is interposed between the first and second substrates, heating the first and second substrates at a preferred temperature to cause melting of the solder elements and the solder pads into single solder elements, wherein the standoff controls the separation distance between the first and second substrates.

Abstract: In integrated circuits having copper interconnect and low-k interlayer dielectrics, a problem of open circuits after heat treatment was discovered and solved by the use of a first liner layer of Cr, followed by a conformal liner layer of CVD TiN, followed in turn by a final liner layer of Ta or TaN, thus improving adhesion between the via and the underlying copper layer while maintaining low resistance.

Abstract: A method of forming an electrical connector including providing a metallic sheet having a multitude of connector blanks formed therein, each of the connector blanks having a base portion, a contact portion and a singulation arm; forming each of the connector blanks into a connector having a predetermined shape wherein each of the connectors remain connected to the metallic sheet by their respective singulation arms and wherein the singulation arms are nonplanar with respect to the metallic sheet; joining the base of each of the connectors to a first substrate; and severing the singulation arms to separate each of the connectors from the metallic sheet wherein the base of each of the connectors is joined to the first substrate. In a preferred embodiment, the contact portion contacts a second substrate.

Abstract: RIE processing chambers includes arrangements of gas outlets which force gas-flow-shadow elimination. Means are provided to control and adjust the direction of gases to the outlet to modify and control the direction of plasma flow at the wafer surface during processing. Means are provided to either move the exhaust paths for exhaust gases or to open and close exhaust paths sequentially, in a controlled manner, to modify flow directions of ions in the etching plasma. A combination of rotation/oscillation of a magnetic field imposed on the RIE chamber can be employed by rotation of permanent magnetic dipoles about the periphery of the RIE chamber or by controlling current through a coil wrapped around the periphery of the RIE process chamber to enhance the removal of the residues attributable to gas-flow-shadows formed by linear ion paths in the plasma.

Abstract: An apparatus and process for electroplating a pin grid array device having a plurality of pins, the pins having a side surface and an extremity. The apparatus comprises a contact plate defining a plane and having a plurality of electrically conductive flexible contact fingers extending from the contact plate away from the plane, the contact fingers adapted to flex when contacted by the pins. The process comprises contacting each of the plurality of pins with a flexible contact finger extending from a single electrically conductive plate, the conductive plate defining a plane, wherein the flexible contact fingers extend away from the plane.

Abstract: A composite electronic and/or optical substrate including polymeric and ceramic material wherein the composite substrate has a dielectric constant less than 4 and a coefficient of thermal expansion of 8 to 14 ppm/°C. at 100° C. The composite substrate may be either ceramic-filled polymeric material or polymer-filled ceramic material.

Abstract: An aqueous alkaline cleaning composition for efficient removal of Mo, Cu, W, or Cu/Ni-based conductive paste residue from screening masks, associated screening equipment and the like by using alkali metal salt and/or tetramethyl ammonium salt of polyacrylic acid, acrylic acid-methacrylic acid co-polymer, polyaspartic acid, polylactic acid, poly(acrylic acid-co-maleic anhydride), poly(maleic acid), with excess alkali for pH adjustment in the range of about 11.5-13.5, and a surfactant which may be a medium foam, low foam or no-foam surfactant, and is preferably an amphoteric and/or non-ionic and/or ionic surfactant.

Abstract: An eletronic package comprising a printed circuit board on which are mounted a plurality of decoupling capacitors is disclosed. A carrier component electrically connects an integrated circuit to the printed circuit board through a plurality of solder balls. The plurality of solder balls comprises at least one solder ball for the integrated circuit ground voltage connection and at least one solder ball for the integrated circuit power voltage connection. The plurality of decoupling capacitors is organized as a set of ‘n’ capacitors ranged from a lower capacitor value Clow to a higher capacitor value Chigh such that the range Clow to Chigh of the ‘n’ capacitor values is a function of the frequency range Flow to Fhigh on which the integrated circuit operates.

Abstract: A coating material used in the fabrication of electronic components such as a metallized paste is provided comprising a material to be coated on the electronic component substrate and an identifying component which identifying component can be identified and which identifying component identifies the coating material. Optical dyes visible to the eye can be used as the identifying component with a preferred dye being a UV fluorescent dye which is colorless under visible light and visible under UV light. A process for making an electronic component using the coating materials of the invention and electronic components made using the coating material are also provided.

Abstract: A method of fabricating an integrated circuit chip having a first region of a first layout rule and a second region of a second layout rule. The method includes using a first material to establish a first hard mask pattern in only the first region and using a second material to establish a second hard mask pattern on top of the first hard mask pattern. The second material is additionally used to establish a third hard mask pattern in the second region.

Abstract: A temporary attach article of a first component to a second component which includes a first component having a first volume of a fusible material; a second component having a second volume of fusible material; and the first and second components being joined together through the first and second volumes of fusible material, wherein the first volume of fusible material has a melting point higher than a melting point of the second volume of fusible material so that the first and second components may be joined together without melting of the first volume of fusible material and wherein the second volume of fusible material is 5 to 20% of the first volume of fusible material. Also disclosed is a method for temporary attach of devices to an electronic substrate.

Abstract: A detailing tool for processing electronic component substrate includes a supporting frame, a substrate carrier movable on the supporting frame to receive and secure the substrate during processing by the tool, and a pair of cutter assembly attached to said supporting frame for removing tails on said substrate. The cutter assemblies self-align “to” the substrate during initial substrate loading in a processing area of the tool. Each cutter assembly includes a pair of spaced, translatable and opposed cutters that simultaneously move towards each another while removing the tails from the corners of the substrate that remains stationary. The pair of cutter assemblies are symmetrically attached to the supporting frame with respect to an axis for indexing the substrate. Thus, the invention provides a tool for cutting tails from opposite corners on the substrate edge automatically and simultaneously during processing.

Abstract: A wrapped-gate transistor includes a substrate having an upper surface and first and second side surfaces opposing to each other. Source and drain regions are formed in the substrate with a channel region therebetween. The channel region extends from the first side surface to the second side surfaces of the substrate. A gate dielectric layer is formed on the substrate. A gate electrode is formed on the gate dielectric layer to cover the channel region from the upper surface and the first and second side surfaces with the gate dielectric therebetween. The substrate is a silicon island formed on an insulation layer of an SOI (silicon-on-insulator) substrate or on a conventional non-SOI substrate, and has four side surfaces including the first and second side surfaces. The source and drain regions are formed on the portions of the substrate adjoining the third and fourth side surfaces which are perpendicular to the first and second side surfaces.